iris/kaizen
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

logging overhaul

Browse Source
This commit is contained in:
SimoneN64
2023-06-05 17:07:20 +02:00
parent 9e37e961ba
commit df3775a559
26 changed files with 145 additions and 145 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/backend/core/registers/Cop0.cpp
View File

@@ -54,7 +54,7 @@ u32 Cop0::GetReg32(u8 addr) {
case 23: case 24: case 25:
case 31: return openbus;
default:
Util::panic("Unsupported word read from COP0 register {}\n", index);
Util::panic("Unsupported word read from COP0 register {}", index);
}
}
@@ -75,7 +75,7 @@ u64 Cop0::GetReg64(u8 addr) {
case 23: case 24: case 25:
case 31: return openbus;
default:
Util::panic("Unsupported dword read from COP0 register {}\n", index);
Util::panic("Unsupported dword read from COP0 register {}", index);
}
}
@@ -137,7 +137,7 @@ void Cop0::SetReg32(u8 addr, u32 value) {
case 23: case 24: case 25:
case 31: break;
default:
Util::panic("Unsupported word write from COP0 register {}\n", index);
Util::panic("Unsupported word write from COP0 register {}", index);
}
}
@@ -165,7 +165,7 @@ void Cop0::SetReg64(u8 addr, u64 value) {
case COP0_REG_LLADDR: LLAddr = value; break;
case COP0_REG_ERROREPC: ErrorEPC = (s64)value; break;
default:
Util::panic("Unsupported dword write to COP0 register {}\n", addr);
Util::panic("Unsupported dword write to COP0 register {}", addr);
}
}
@@ -270,7 +270,7 @@ void FireException(Registers& regs, ExceptionCode code, int cop, bool useOldPC)
regs.cop0.cause.exceptionCode = static_cast<u8>(code);
if(regs.cop0.status.bev) {
Util::panic("BEV bit set!\n");
Util::panic("BEV bit set!");
} else {
switch(code) {
case ExceptionCode::Interrupt: case ExceptionCode::TLBModification:
@@ -291,7 +291,7 @@ void FireException(Registers& regs, ExceptionCode code, int cop, bool useOldPC)
regs.SetPC32(0x80000000);
}
break;
default: Util::panic("Unhandled exception! {}\n", static_cast<u8>(code));
default: Util::panic("Unhandled exception! {}", static_cast<u8>(code));
}
}
}
@@ -309,7 +309,7 @@ void HandleTLBException(Registers& regs, u64 vaddr) {
ExceptionCode GetTLBExceptionCode(TLBError error, TLBAccessType accessType) {
switch(error) {
case NONE: Util::panic("Getting TLB exception with error NONE\n");
case NONE: Util::panic("Getting TLB exception with error NONE");
case INVALID: case MISS:
return accessType == LOAD ?
ExceptionCode::TLBLoad : ExceptionCode::TLBStore;
@@ -319,7 +319,7 @@ ExceptionCode GetTLBExceptionCode(TLBError error, TLBAccessType accessType) {
return accessType == LOAD ?
ExceptionCode::AddressErrorLoad : ExceptionCode::AddressErrorStore;
default:
Util::panic("Getting TLB exception for unknown error code! ({})\n", static_cast<u8>(error));
Util::panic("Getting TLB exception for unknown error code! ({})", static_cast<u8>(error));
}
}