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external/parallel-rdp/parallel-rdp-standalone/vulkan/shader.hpp
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228
external/parallel-rdp/parallel-rdp-standalone/vulkan/shader.hpp
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/* Copyright (c) 2017-2023 Hans-Kristian Arntzen
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include "cookie.hpp"
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#include "descriptor_set.hpp"
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#include "hash.hpp"
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#include "intrusive.hpp"
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#include "limits.hpp"
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#include "vulkan_headers.hpp"
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#include "enum_cast.hpp"
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namespace spirv_cross
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{
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struct SPIRType;
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}
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namespace Vulkan
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{
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class Device;
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enum class ShaderStage
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{
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Vertex = 0,
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TessControl = 1,
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TessEvaluation = 2,
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Geometry = 3,
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Fragment = 4,
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Compute = 5,
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Task = 6,
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Mesh = 7,
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Count
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};
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struct ResourceLayout
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{
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DescriptorSetLayout sets[VULKAN_NUM_DESCRIPTOR_SETS];
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uint32_t input_mask = 0;
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uint32_t output_mask = 0;
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uint32_t push_constant_size = 0;
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uint32_t spec_constant_mask = 0;
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uint32_t bindless_set_mask = 0;
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enum { Version = 4 };
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bool unserialize(const uint8_t *data, size_t size);
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bool serialize(uint8_t *data, size_t size) const;
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static size_t serialization_size();
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};
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static_assert(sizeof(DescriptorSetLayout) % 8 == 0, "Size of DescriptorSetLayout does not align to 64 bits.");
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struct CombinedResourceLayout
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{
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uint32_t attribute_mask = 0;
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uint32_t render_target_mask = 0;
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DescriptorSetLayout sets[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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uint32_t stages_for_bindings[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS] = {};
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uint32_t stages_for_sets[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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VkPushConstantRange push_constant_range = {};
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uint32_t descriptor_set_mask = 0;
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uint32_t bindless_descriptor_set_mask = 0;
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uint32_t spec_constant_mask[Util::ecast(ShaderStage::Count)] = {};
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uint32_t combined_spec_constant_mask = 0;
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Util::Hash push_constant_layout_hash = 0;
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};
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union ResourceBinding
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{
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struct
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{
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VkDescriptorBufferInfo dynamic;
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VkDescriptorBufferInfo push;
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} buffer;
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struct
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{
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VkDescriptorImageInfo fp;
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VkDescriptorImageInfo integer;
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} image;
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VkBufferView buffer_view;
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};
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struct ResourceBindings
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{
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ResourceBinding bindings[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint64_t cookies[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint64_t secondary_cookies[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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uint8_t push_constant_data[VULKAN_PUSH_CONSTANT_SIZE];
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};
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struct ImmutableSamplerBank
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{
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const ImmutableSampler *samplers[VULKAN_NUM_DESCRIPTOR_SETS][VULKAN_NUM_BINDINGS];
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static void hash(Util::Hasher &h, const ImmutableSamplerBank *bank);
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};
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class PipelineLayout : public HashedObject<PipelineLayout>
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{
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public:
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PipelineLayout(Util::Hash hash, Device *device, const CombinedResourceLayout &layout,
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const ImmutableSamplerBank *sampler_bank);
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~PipelineLayout();
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const CombinedResourceLayout &get_resource_layout() const
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{
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return layout;
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}
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VkPipelineLayout get_layout() const
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{
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return pipe_layout;
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}
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DescriptorSetAllocator *get_allocator(unsigned set) const
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{
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return set_allocators[set];
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}
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VkDescriptorUpdateTemplate get_update_template(unsigned set) const
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{
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return update_template[set];
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}
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uint32_t get_push_set_index() const
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{
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return push_set_index;
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}
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private:
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Device *device;
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VkPipelineLayout pipe_layout = VK_NULL_HANDLE;
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CombinedResourceLayout layout;
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DescriptorSetAllocator *set_allocators[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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VkDescriptorUpdateTemplate update_template[VULKAN_NUM_DESCRIPTOR_SETS] = {};
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uint32_t push_set_index = UINT32_MAX;
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void create_update_templates();
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};
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class Shader : public HashedObject<Shader>
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{
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public:
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Shader(Util::Hash binding, Device *device, const uint32_t *data, size_t size,
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const ResourceLayout *layout = nullptr);
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~Shader();
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const ResourceLayout &get_layout() const
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{
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return layout;
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}
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VkShaderModule get_module() const
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{
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return module;
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}
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static bool reflect_resource_layout(ResourceLayout &layout, const uint32_t *spirv_data, size_t spirv_size);
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static const char *stage_to_name(ShaderStage stage);
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static Util::Hash hash(const uint32_t *data, size_t size);
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private:
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Device *device;
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VkShaderModule module = VK_NULL_HANDLE;
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ResourceLayout layout;
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};
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struct Pipeline
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{
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VkPipeline pipeline;
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uint32_t dynamic_mask;
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};
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class Program : public HashedObject<Program>
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{
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public:
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Program(Device *device, Shader *vertex, Shader *fragment, const ImmutableSamplerBank *sampler_bank);
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Program(Device *device, Shader *task, Shader *mesh, Shader *fragment, const ImmutableSamplerBank *sampler_bank);
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Program(Device *device, Shader *compute, const ImmutableSamplerBank *sampler_bank);
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~Program();
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inline const Shader *get_shader(ShaderStage stage) const
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{
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return shaders[Util::ecast(stage)];
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}
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void set_pipeline_layout(const PipelineLayout *new_layout)
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{
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layout = new_layout;
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}
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const PipelineLayout *get_pipeline_layout() const
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{
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return layout;
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}
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Pipeline get_pipeline(Util::Hash hash) const;
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Pipeline add_pipeline(Util::Hash hash, const Pipeline &pipeline);
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void promote_read_write_to_read_only();
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private:
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void set_shader(ShaderStage stage, Shader *handle);
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Device *device;
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Shader *shaders[Util::ecast(ShaderStage::Count)] = {};
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const PipelineLayout *layout = nullptr;
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VulkanCache<Util::IntrusivePODWrapper<Pipeline>> pipelines;
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void destroy_pipeline(const Pipeline &pipeline);
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};
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}
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