Introduce memory editor and fix crash on dumping RDRAM
This commit is contained in:
@@ -14,7 +14,7 @@ using json = nlohmann::json;
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Window::Window(n64::Core& core) {
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InitSDL();
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InitParallelRDP(core.mem.GetRDRAM(), window);
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InitImgui();
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InitImgui(core);
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NFD::Init();
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}
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@@ -27,6 +27,7 @@ void Window::InitSDL() {
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SDL_Init(SDL_INIT_EVERYTHING);
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n64::InitAudio();
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windowTitle = "natsukashii";
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window = SDL_CreateWindow(
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"natsukashii",
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SDL_WINDOWPOS_CENTERED,
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@@ -48,7 +49,19 @@ static void check_vk_result(VkResult err) {
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}
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}
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void Window::InitImgui() {
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inline ImU8 readHandler(const ImU8* core_, size_t offset) {
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auto* core = reinterpret_cast<n64::Core*>(const_cast<ImU8*>(core_));
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auto& mem = core->mem;
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return mem.Read8<false, false>(core->cpu.regs, offset, core->cpu.regs.oldPC);
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}
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inline void writeHandler(ImU8* core_, size_t offset, ImU8 value) {
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auto* core = reinterpret_cast<n64::Core*>(const_cast<ImU8*>(core_));
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auto& mem = core->mem;
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mem.Write8<false, false>(core->cpu.regs, offset, value, core->cpu.regs.oldPC);
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}
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void Window::InitImgui(const n64::Core& core) {
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VkResult err;
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IMGUI_CHECKVERSION();
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@@ -122,6 +135,9 @@ void Window::InitImgui() {
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ImGui_ImplVulkan_CreateFontsTexture(commandBuffer);
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SubmitRequestedVkCommandBuffer();
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}
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memoryEditor.ReadFn = readHandler;
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memoryEditor.WriteFn = writeHandler;
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}
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Window::~Window() {
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@@ -160,6 +176,7 @@ void Window::LoadROM(n64::Core& core, const std::string &path) {
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}
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windowTitle = "natsukashii - " + name;
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shadowWindowTitle = windowTitle;
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SDL_SetWindowTitle(window, windowTitle.c_str());
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}
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@@ -167,9 +184,18 @@ void Window::LoadROM(n64::Core& core, const std::string &path) {
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void Window::Render(n64::Core& core) {
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ImGui::PushFont(uiFont);
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u32 ticks = SDL_GetTicks();
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if(!core.pause && lastFrame < ticks - 1000) {
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lastFrame = ticks;
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windowTitle += fmt::format(" | {:02d} In-Game FPS", core.mem.mmio.vi.swaps);
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core.mem.mmio.vi.swaps = 0;
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SDL_SetWindowTitle(window, windowTitle.c_str());
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windowTitle = shadowWindowTitle;
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}
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static bool showSettings = false;
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static std::string windowTitleCache = windowTitle;
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bool showMainMenuBar = windowID == SDL_GetWindowID(SDL_GetMouseFocus());
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memoryEditor.DrawWindow("Memory viewer", &core, 0x80000000);
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if(showMainMenuBar) {
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ImGui::BeginMainMenuBar();
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if (ImGui::BeginMenu("File")) {
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@@ -183,18 +209,10 @@ void Window::Render(n64::Core& core) {
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}
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}
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if (ImGui::MenuItem("Dump RDRAM")) {
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FILE *fp = fopen("rdram.dump", "wb");
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u8 *temp = core.mem.GetRDRAM();
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util::SwapBuffer32(RDRAM_SIZE, temp);
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fwrite(temp, 1, RDRAM_SIZE, fp);
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fclose(fp);
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core.mem.DumpRDRAM();
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}
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if (ImGui::MenuItem("Dump IMEM")) {
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FILE *fp = fopen("imem.dump", "wb");
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u8 *temp = core.mem.mmio.rsp.imem;
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util::SwapBuffer32(IMEM_SIZE, temp);
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fwrite(temp, 1, IMEM_SIZE, fp);
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fclose(fp);
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core.mem.DumpIMEM();
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}
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if (ImGui::MenuItem("Exit")) {
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core.done = true;
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@@ -212,12 +230,11 @@ void Window::Render(n64::Core& core) {
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}
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if (ImGui::MenuItem(core.pause ? "Resume" : "Pause", nullptr, false, core.romLoaded)) {
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core.TogglePause();
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std::string paused = " | Paused";
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if(core.pause) {
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windowTitleCache = windowTitle;
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windowTitle += paused;
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shadowWindowTitle = windowTitle;
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windowTitle += " | Paused";
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} else {
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windowTitle = windowTitleCache;
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windowTitle = shadowWindowTitle;
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}
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SDL_SetWindowTitle(window, windowTitle.c_str());
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}
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@@ -237,10 +254,10 @@ void Window::Render(n64::Core& core) {
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if (!lockVolume) {
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ImGui::SliderFloat("Volume R", &volumeR, 0, 1, "%.2f", ImGuiSliderFlags_NoInput);
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} else {
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volumeR = volumeL;
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ImGui::BeginDisabled();
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ImGui::SliderFloat("Volume R", &volumeR, 0, 1, "%.2f", ImGuiSliderFlags_NoInput);
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ImGui::EndDisabled();
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volumeR = volumeL;
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}
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ImGui::EndPopup();
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}
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@@ -3,6 +3,7 @@
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#include <imgui.h>
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#include <imgui_impl_sdl.h>
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#include <imgui_impl_vulkan.h>
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#include <imgui_memory_editor.h>
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#include <SDL.h>
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#include <Core.hpp>
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#include <vector>
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@@ -19,11 +20,12 @@ struct Window {
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void LoadROM(n64::Core& core, const std::string& path);
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private:
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bool lockVolume = true;
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bool showSettings = false;
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SDL_Window* window;
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std::string windowTitle;
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std::string shadowWindowTitle;
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u32 lastFrame = 0;
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void InitSDL();
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void InitImgui();
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void InitImgui(const n64::Core& core);
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void Render(n64::Core& core);
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VkPhysicalDevice physicalDevice{};
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@@ -34,6 +36,8 @@ private:
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VkDescriptorPool descriptorPool{};
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VkAllocationCallbacks* allocator{};
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MemoryEditor memoryEditor;
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u32 minImageCount = 2;
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bool rebuildSwapchain = false;
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};
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@@ -19,31 +19,46 @@ void MMIO::Reset() {
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si.Reset();
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}
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template <bool crashOnUnimplemented>
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u32 MMIO::Read(u32 addr) {
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switch (addr) {
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case 0x04040000 ... 0x040FFFFF: return rsp.Read(addr);
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case 0x04100000 ... 0x041FFFFF: return rdp.Read(addr);
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case 0x04300000 ... 0x043FFFFF: return mi.Read(addr);
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case 0x04400000 ... 0x044FFFFF: return vi.Read(addr);
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case 0x04040000 ... 0x040FFFFF: return rsp.Read<crashOnUnimplemented>(addr);
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case 0x04100000 ... 0x041FFFFF: return rdp.Read<crashOnUnimplemented>(addr);
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case 0x04300000 ... 0x043FFFFF: return mi.Read<crashOnUnimplemented>(addr);
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case 0x04400000 ... 0x044FFFFF: return vi.Read<crashOnUnimplemented>(addr);
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case 0x04500000 ... 0x045FFFFF: return ai.Read(addr);
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case 0x04600000 ... 0x046FFFFF: return pi.Read(mi, addr);
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case 0x04700000 ... 0x047FFFFF: return ri.Read(addr);
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case 0x04800000 ... 0x048FFFFF: return si.Read(mi, addr);
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default: util::panic("Unhandled mmio read at addr {:08X}\n", addr);
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case 0x04600000 ... 0x046FFFFF: return pi.Read<crashOnUnimplemented>(mi, addr);
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case 0x04700000 ... 0x047FFFFF: return ri.Read<crashOnUnimplemented>(addr);
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case 0x04800000 ... 0x048FFFFF: return si.Read<crashOnUnimplemented>(mi, addr);
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default:
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if constexpr (crashOnUnimplemented) {
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util::panic("Unhandled mmio read at addr {:08X}\n", addr);
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}
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return 0;
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}
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}
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template u32 MMIO::Read<true>(u32);
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template u32 MMIO::Read<false>(u32);
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template <bool crashOnUnimplemented>
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void MMIO::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
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switch (addr) {
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case 0x04040000 ... 0x040FFFFF: rsp.Write(mem, regs, addr, val); break;
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case 0x04100000 ... 0x041FFFFF: rdp.Write(mi, regs, rsp, addr, val); break;
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case 0x04300000 ... 0x043FFFFF: mi.Write(regs, addr, val); break;
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case 0x04400000 ... 0x044FFFFF: vi.Write(mi, regs, addr, val); break;
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case 0x04500000 ... 0x045FFFFF: ai.Write(mem, regs, addr, val); break;
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case 0x04600000 ... 0x046FFFFF: pi.Write(mem, regs, addr, val); break;
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case 0x04700000 ... 0x047FFFFF: ri.Write(addr, val); break;
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case 0x04800000 ... 0x048FFFFF: si.Write(mem, regs, addr, val); break;
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default: util::panic("Unhandled mmio write at addr {:08X} with val {:08X}\n", addr, val);
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case 0x04040000 ... 0x040FFFFF: rsp.Write<crashOnUnimplemented>(mem, regs, addr, val); break;
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case 0x04100000 ... 0x041FFFFF: rdp.Write<crashOnUnimplemented>(mi, regs, rsp, addr, val); break;
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case 0x04300000 ... 0x043FFFFF: mi.Write<crashOnUnimplemented>(regs, addr, val); break;
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case 0x04400000 ... 0x044FFFFF: vi.Write<crashOnUnimplemented>(mi, regs, addr, val); break;
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case 0x04500000 ... 0x045FFFFF: ai.Write<crashOnUnimplemented>(mem, regs, addr, val); break;
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case 0x04600000 ... 0x046FFFFF: pi.Write<crashOnUnimplemented>(mem, regs, addr, val); break;
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case 0x04700000 ... 0x047FFFFF: ri.Write<crashOnUnimplemented>(addr, val); break;
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case 0x04800000 ... 0x048FFFFF: si.Write<crashOnUnimplemented>(mem, regs, addr, val); break;
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default:
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if constexpr (crashOnUnimplemented) {
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util::panic("Unhandled mmio write at addr {:08X} with val {:08X}\n", addr, val);
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}
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}
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}
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template void MMIO::Write<true>(Mem&, Registers&, u32, u32);
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template void MMIO::Write<false>(Mem&, Registers&, u32, u32);
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}
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@@ -24,7 +24,9 @@ struct MMIO {
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RSP rsp;
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RDP rdp;
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template <bool crashOnUnimplemented = true>
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u32 Read(u32);
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void Write(Mem&, Registers& regs, u32, u32);
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template <bool crashOnUnimplemented = true>
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void Write(Mem&, Registers&, u32, u32);
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};
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}
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@@ -14,6 +14,8 @@ void Mem::Reset() {
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std::fill(sram.begin(), sram.end(), 0);
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romMask = 0;
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mmio.Reset();
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cart.resize(0xFC00000);
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std::fill(cart.begin(), cart.end(), 0);
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}
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CartInfo Mem::LoadROM(const std::string& filename) {
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@@ -68,7 +70,7 @@ bool MapVAddr(Registers& regs, TLBAccessType accessType, u64 vaddr, u32& paddr)
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template bool MapVAddr<true>(Registers& regs, TLBAccessType accessType, u64 vaddr, u32& paddr);
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template bool MapVAddr<false>(Registers& regs, TLBAccessType accessType, u64 vaddr, u32& paddr);
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template <bool tlb>
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template <bool tlb, bool crashOnUnimplemented>
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u8 Mem::Read8(n64::Registers ®s, u64 vaddr, s64 pc) {
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u32 paddr = vaddr;
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if(!MapVAddr<tlb>(regs, LOAD, vaddr, paddr)) {
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@@ -86,7 +88,7 @@ u8 Mem::Read8(n64::Registers ®s, u64 vaddr, s64 pc) {
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return mmio.rsp.dmem[BYTE_ADDRESS(paddr) & DMEM_DSIZE];
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case 0x04040000 ... 0x040FFFFF: case 0x04100000 ... 0x041FFFFF:
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case 0x04300000 ... 0x044FFFFF: case 0x04500000 ... 0x048FFFFF:
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return mmio.Read(paddr);
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return mmio.Read<crashOnUnimplemented>(paddr);
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case 0x10000000 ... 0x1FBFFFFF:
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paddr = (paddr + 2) & ~2;
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return cart[BYTE_ADDRESS(paddr) & romMask];
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@@ -95,9 +97,12 @@ u8 Mem::Read8(n64::Registers ®s, u64 vaddr, s64 pc) {
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case 0x1FC007C0 ... 0x1FC007FF:
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return pifRam[paddr & PIF_RAM_DSIZE];
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case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF:
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case 0x04900000 ... 0x07FFFFFF: case 0x08000000 ... 0x0FFFFFFF:
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case 0x80000000 ... 0xFFFFFFFF: case 0x1FC00800 ... 0x7FFFFFFF: return 0;
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default: util::panic("Unimplemented 8-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64)regs.pc);
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case 0x04900000 ... 0x0FFFFFFF: case 0x1FC00800 ... 0xFFFFFFFF: return 0;
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default:
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if constexpr (crashOnUnimplemented) {
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util::panic("Unimplemented 8-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64)regs.pc);
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}
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return 0;
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}
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}
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@@ -128,8 +133,7 @@ u16 Mem::Read16(n64::Registers ®s, u64 vaddr, s64 pc) {
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case 0x1FC007C0 ... 0x1FC007FF:
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return be16toh(util::ReadAccess<u16>(pifRam, paddr & PIF_RAM_DSIZE));
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case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF:
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case 0x04900000 ... 0x07FFFFFF: case 0x08000000 ... 0x0FFFFFFF:
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case 0x80000000 ... 0xFFFFFFFF: case 0x1FC00800 ... 0x7FFFFFFF: return 0;
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case 0x04900000 ... 0x0FFFFFFF: case 0x1FC00800 ... 0xFFFFFFFF: return 0;
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default: util::panic("Unimplemented 16-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64)regs.pc);
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}
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}
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@@ -160,9 +164,9 @@ u32 Mem::Read32(n64::Registers ®s, u64 vaddr, s64 pc) {
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case 0x1FC007C0 ... 0x1FC007FF:
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return be32toh(util::ReadAccess<u32>(pifRam, paddr & PIF_RAM_DSIZE));
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case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF:
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case 0x04900000 ... 0x07FFFFFF: case 0x08000000 ... 0x0FFFFFFF:
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case 0x80000000 ... 0xFFFFFFFF: case 0x1FC00800 ... 0x7FFFFFFF: return 0;
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default: util::panic("Unimplemented 32-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64)regs.pc);
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case 0x04900000 ... 0x0FFFFFFF: case 0x1FC00800 ... 0xFFFFFFFF: return 0;
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default:
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util::panic("Unimplemented 32-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64) regs.pc);
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}
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}
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@@ -192,14 +196,15 @@ u64 Mem::Read64(n64::Registers ®s, u64 vaddr, s64 pc) {
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case 0x1FC007C0 ... 0x1FC007FF:
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return be64toh(util::ReadAccess<u64>(pifRam, paddr & PIF_RAM_DSIZE));
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case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF:
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case 0x04900000 ... 0x07FFFFFF: case 0x08000000 ... 0x0FFFFFFF:
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case 0x80000000 ... 0xFFFFFFFF: case 0x1FC00800 ... 0x7FFFFFFF: return 0;
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case 0x04900000 ... 0x0FFFFFFF: case 0x1FC00800 ... 0xFFFFFFFF: return 0;
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default: util::panic("Unimplemented 32-bit read at address {:08X} (PC = {:016X})\n", paddr, (u64)regs.pc);
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}
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}
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template u8 Mem::Read8<false>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u8 Mem::Read8<true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u8 Mem::Read8<false, false>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u8 Mem::Read8<false, true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u8 Mem::Read8<true, false>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u8 Mem::Read8<true, true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u16 Mem::Read16<false>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u16 Mem::Read16<true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u32 Mem::Read32<false>(n64::Registers ®s, u64 vaddr, s64 pc);
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@@ -207,7 +212,7 @@ template u32 Mem::Read32<true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u64 Mem::Read64<false>(n64::Registers ®s, u64 vaddr, s64 pc);
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template u64 Mem::Read64<true>(n64::Registers ®s, u64 vaddr, s64 pc);
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template <bool tlb>
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template <bool tlb, bool crashOnUnimplemented>
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void Mem::Write8(Registers& regs, u64 vaddr, u32 val, s64 pc) {
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u32 paddr = vaddr;
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if(!MapVAddr<tlb>(regs, STORE, vaddr, paddr)) {
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@@ -228,7 +233,7 @@ void Mem::Write8(Registers& regs, u64 vaddr, u32 val, s64 pc) {
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util::WriteAccess<u32>(mmio.rsp.dmem, paddr & DMEM_DSIZE, val);
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break;
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case 0x04040000 ... 0x040FFFFF: case 0x04100000 ... 0x041FFFFF:
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case 0x04300000 ... 0x044FFFFF: case 0x04500000 ... 0x048FFFFF: mmio.Write(*this, regs, paddr, val); break;
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case 0x04300000 ... 0x044FFFFF: case 0x04500000 ... 0x048FFFFF: mmio.Write<crashOnUnimplemented>(*this, regs, paddr, val); break;
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case 0x10000000 ... 0x13FFFFFF: break;
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case 0x1FC007C0 ... 0x1FC007FF:
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val = val << (8 * (3 - (paddr & 3)));
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@@ -239,7 +244,10 @@ void Mem::Write8(Registers& regs, u64 vaddr, u32 val, s64 pc) {
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case 0x00800000 ... 0x03FFFFFF: case 0x04200000 ... 0x042FFFFF:
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case 0x08000000 ... 0x0FFFFFFF: case 0x04900000 ... 0x07FFFFFF:
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case 0x1FC00800 ... 0x7FFFFFFF: case 0x80000000 ... 0xFFFFFFFF: break;
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default: util::panic("Unimplemented 8-bit write at address {:08X} with value {:0X} (PC = {:016X})\n", paddr, val, (u64)regs.pc);
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default:
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if constexpr (crashOnUnimplemented) {
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util::panic("Unimplemented 8-bit write at address {:08X} with value {:0X} (PC = {:016X})\n", paddr, val, (u64)regs.pc);
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}
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}
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}
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@@ -355,8 +363,10 @@ void Mem::Write64(Registers& regs, u64 vaddr, u64 val, s64 pc) {
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}
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}
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|
||||
template void Mem::Write8<false>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write8<true>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write8<false, false>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write8<false, true>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write8<true, false>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write8<true, true>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write16<false>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write16<true>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
template void Mem::Write32<false>(Registers& regs, u64 vaddr, u32 val, s64 pc);
|
||||
|
||||
@@ -23,7 +23,7 @@ struct Mem {
|
||||
return mmio.rdp.dram.data();
|
||||
}
|
||||
|
||||
template <bool tlb = true>
|
||||
template <bool tlb = true, bool crashOnUnimplemented = true>
|
||||
u8 Read8(Registers&, u64, s64);
|
||||
template <bool tlb = true>
|
||||
u16 Read16(Registers&, u64, s64);
|
||||
@@ -31,7 +31,7 @@ struct Mem {
|
||||
u32 Read32(Registers&, u64, s64);
|
||||
template <bool tlb = true>
|
||||
u64 Read64(Registers&, u64, s64);
|
||||
template <bool tlb = true>
|
||||
template <bool tlb = true, bool crashOnUnimplemented = true>
|
||||
void Write8(Registers&, u64, u32, s64);
|
||||
template <bool tlb = true>
|
||||
void Write16(Registers&, u64, u32, s64);
|
||||
@@ -42,6 +42,26 @@ struct Mem {
|
||||
|
||||
MMIO mmio;
|
||||
u8 pifRam[PIF_RAM_SIZE]{};
|
||||
|
||||
inline void DumpRDRAM() const {
|
||||
FILE *fp = fopen("rdram.dump", "wb");
|
||||
u8 *temp = (u8*)calloc(RDRAM_SIZE, 1);
|
||||
memcpy(temp, mmio.rdp.dram.data(), RDRAM_SIZE);
|
||||
util::SwapBuffer32(RDRAM_SIZE, temp);
|
||||
fwrite(temp, 1, RDRAM_SIZE, fp);
|
||||
free(temp);
|
||||
fclose(fp);
|
||||
}
|
||||
|
||||
inline void DumpIMEM() const {
|
||||
FILE *fp = fopen("imem.dump", "wb");
|
||||
u8 *temp = (u8*)calloc(IMEM_SIZE, 1);
|
||||
memcpy(temp, mmio.rsp.imem, IMEM_SIZE);
|
||||
util::SwapBuffer32(IMEM_SIZE, temp);
|
||||
fwrite(temp, 1, IMEM_SIZE, fp);
|
||||
free(temp);
|
||||
fclose(fp);
|
||||
}
|
||||
private:
|
||||
friend struct SI;
|
||||
friend struct PI;
|
||||
|
||||
@@ -23,6 +23,7 @@ static const int cmd_lens[64] = {
|
||||
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
|
||||
};
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
auto RDP::Read(u32 addr) const -> u32{
|
||||
switch(addr) {
|
||||
case 0x04100000: return dpc.start;
|
||||
@@ -33,20 +34,33 @@ auto RDP::Read(u32 addr) const -> u32{
|
||||
case 0x04100014: return dpc.status.cmdBusy;
|
||||
case 0x04100018: return dpc.status.pipeBusy;
|
||||
case 0x0410001C: return dpc.tmem;
|
||||
default: util::panic("Unhandled DP Command Registers read (addr: {:08X})\n", addr);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled DP Command Registers read (addr: {:08X})\n", addr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
template auto RDP::Read<true>(u32 addr) const -> u32;
|
||||
template auto RDP::Read<false>(u32 addr) const -> u32;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void RDP::Write(MI& mi, Registers& regs, RSP& rsp, u32 addr, u32 val) {
|
||||
switch(addr) {
|
||||
case 0x04100000: WriteStart(val); break;
|
||||
case 0x04100004: WriteEnd(mi, regs, rsp, val); break;
|
||||
case 0x0410000C: WriteStatus(mi, regs, rsp, val); break;
|
||||
default: util::panic("Unhandled DP Command Registers write (addr: {:08X}, val: {:08X})\n", addr, val);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled DP Command Registers write (addr: {:08X}, val: {:08X})\n", addr, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void RDP::Write<true>(MI&, Registers&, RSP&, u32, u32);
|
||||
template void RDP::Write<false>(MI&, Registers&, RSP&, u32, u32);
|
||||
|
||||
void RDP::WriteStatus(MI& mi, Registers& regs, RSP& rsp, u32 val) {
|
||||
bool rdpUnfrozen = false;
|
||||
|
||||
|
||||
@@ -58,7 +58,9 @@ struct RDP {
|
||||
void Reset();
|
||||
|
||||
std::vector<u8> dram;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
[[nodiscard]] auto Read(u32 addr) const -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(MI& mi, Registers& regs, RSP& rsp, u32 addr, u32 val);
|
||||
void WriteStatus(MI& mi, Registers& regs, RSP& rsp, u32 val);
|
||||
void RunCommand(MI& mi, Registers& regs, RSP& rsp);
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
#include <n64/core/RSP.hpp>
|
||||
#include <util.hpp>
|
||||
#include <n64/core/Mem.hpp>
|
||||
#include <n64/core/mmio/Interrupt.hpp>
|
||||
|
||||
namespace n64 {
|
||||
RSP::RSP() {
|
||||
@@ -31,47 +30,54 @@ void RSP::Reset() {
|
||||
divInLoaded = false;
|
||||
}
|
||||
|
||||
inline void logRSP(const RSP& rsp, const u32 instr) {
|
||||
util::print("{:04X} {:08X} ", rsp.oldPC, instr);
|
||||
for (int i = 0; i < 32; i++) {
|
||||
util::print("{:08X} ", (u32)rsp.gpr[i]);
|
||||
}
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", rsp.vpr[i].element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
}
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", rsp.acc.h.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", rsp.acc.m.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", rsp.acc.l.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
util::print("{:04X} {:04X} {:02X}", rsp.GetVCC(), rsp.GetVCO(), rsp.GetVCE());
|
||||
|
||||
util::print("\n");
|
||||
}
|
||||
|
||||
void RSP::Step(Registers& regs, Mem& mem) {
|
||||
gpr[0] = 0;
|
||||
u32 instr = util::ReadAccess<u32>(imem, pc & IMEM_DSIZE);
|
||||
oldPC = pc & 0xFFC;
|
||||
pc = nextPC & 0xFFC;
|
||||
nextPC += 4;
|
||||
if(oldPC == 0x00E4 && gpr[1] == 0x18) {
|
||||
printf("\n");
|
||||
}
|
||||
Exec(regs, mem, instr);
|
||||
/*
|
||||
util::print("{:04X} {:08X} ", oldPC, instr);
|
||||
for (int i = 0; i < 32; i++) {
|
||||
util::print("{:08X} ", (u32)gpr[i]);
|
||||
}
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", vpr[i].element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
}
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", acc.h.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", acc.m.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
for (int e = 0; e < 8; e++) {
|
||||
util::print("{:04X}", acc.l.element[e]);
|
||||
}
|
||||
util::print(" ");
|
||||
|
||||
util::print("{:04X} {:04X} {:02X}", GetVCC(), GetVCO(), GetVCE());
|
||||
|
||||
util::print("\n");
|
||||
*/
|
||||
// logRSP(*this, instr);
|
||||
}
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
auto RSP::Read(u32 addr) -> u32{
|
||||
switch (addr) {
|
||||
case 0x04040000: return lastSuccessfulSPAddr.raw & 0x1FF8;
|
||||
@@ -83,10 +89,18 @@ auto RSP::Read(u32 addr) -> u32{
|
||||
case 0x04040018: return 0;
|
||||
case 0x0404001C: return AcquireSemaphore();
|
||||
case 0x04080000: return pc & 0xFFC;
|
||||
default: util::panic("Unimplemented SP register read {:08X}\n", addr);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unimplemented SP register read {:08X}\n", addr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
template auto RSP::Read<true>(u32 addr) -> u32;
|
||||
template auto RSP::Read<false>(u32 addr) -> u32;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void RSP::Write(Mem& mem, Registers& regs, u32 addr, u32 value) {
|
||||
MI& mi = mem.mmio.mi;
|
||||
switch (addr) {
|
||||
@@ -107,8 +121,12 @@ void RSP::Write(Mem& mem, Registers& regs, u32 addr, u32 value) {
|
||||
SetPC(value);
|
||||
} break;
|
||||
default:
|
||||
util::panic("Unimplemented SP register write {:08X}, val: {:08X}\n", addr, value);
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unimplemented SP register write {:08X}, val: {:08X}\n", addr, value);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void RSP::Write<true>(n64::Mem &mem, n64::Registers ®s, u32 addr, u32 value);
|
||||
template void RSP::Write<false>(n64::Mem &mem, n64::Registers ®s, u32 addr, u32 value);
|
||||
}
|
||||
|
||||
@@ -9,8 +9,6 @@
|
||||
#define SET_RSP_HALF(addr, buf, value) do { RSP_BYTE(addr, buf) = ((value) >> 8) & 0xFF; RSP_BYTE((addr) + 1, buf) = (value) & 0xFF;} while(0)
|
||||
#define GET_RSP_WORD(addr, buf) ((GET_RSP_HALF(addr, buf) << 16) | GET_RSP_HALF((addr) + 2, buf))
|
||||
#define SET_RSP_WORD(addr, buf, value) do { SET_RSP_HALF(addr, buf, ((value) >> 16) & 0xFFFF); SET_RSP_HALF((addr) + 2, buf, (value) & 0xFFFF);} while(0)
|
||||
#define GET_RSP_DWORD(addr, buf) (((u64)GET_RSP_WORD(addr, buf) << 32) | (u64)GET_RSP_WORD((addr) + 4, buf))
|
||||
#define SET_RSP_DWORD(addr, buf, value) do { SET_RSP_WORD(addr, buf, ((value) >> 32) & 0xFFFFFFFF); SET_RSP_WORD((addr) + 4, buf, (value) & 0xFFFFFFFF);} while(0)
|
||||
|
||||
namespace n64 {
|
||||
union SPStatus {
|
||||
@@ -98,7 +96,9 @@ union VPR {
|
||||
u16 element[8];
|
||||
u8 byte[16];
|
||||
u32 word[4];
|
||||
};
|
||||
} __attribute__((packed));
|
||||
|
||||
static_assert(sizeof(VPR) == 16);
|
||||
|
||||
struct Mem;
|
||||
struct Registers;
|
||||
@@ -113,7 +113,9 @@ struct RSP {
|
||||
RSP();
|
||||
void Reset();
|
||||
void Step(Registers& regs, Mem& mem);
|
||||
template <bool crashOnUnimplemented = true>
|
||||
auto Read(u32 addr) -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(Mem& mem, Registers& regs, u32 addr, u32 value);
|
||||
void Exec(Registers& regs, Mem& mem, u32 instr);
|
||||
SPStatus spStatus;
|
||||
@@ -147,7 +149,7 @@ struct RSP {
|
||||
nextPC = pc + 4;
|
||||
}
|
||||
|
||||
inline s64 GetACC(int e) {
|
||||
inline s64 GetACC(int e) const {
|
||||
s64 val = s64(acc.h.element[e]) << 32;
|
||||
val |= s64(acc.m.element[e]) << 16;
|
||||
val |= s64(acc.l.element[e]) << 00;
|
||||
@@ -163,7 +165,7 @@ struct RSP {
|
||||
acc.l.element[e] = val;
|
||||
}
|
||||
|
||||
inline u16 GetVCO() {
|
||||
inline u16 GetVCO() const {
|
||||
u16 value = 0;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
bool h = vco.h.element[7 - i] != 0;
|
||||
@@ -174,7 +176,7 @@ struct RSP {
|
||||
return value;
|
||||
}
|
||||
|
||||
inline u16 GetVCC() {
|
||||
inline u16 GetVCC() const {
|
||||
u16 value = 0;
|
||||
for (int i = 0; i < 8; i++) {
|
||||
bool h = vcc.h.element[7 - i] != 0;
|
||||
@@ -185,7 +187,7 @@ struct RSP {
|
||||
return value;
|
||||
}
|
||||
|
||||
inline u8 GetVCE() {
|
||||
inline u8 GetVCE() const {
|
||||
u8 value = 0;
|
||||
for(int i = 0; i < 8; i++) {
|
||||
bool l = vce.element[ELEMENT_INDEX(i)] != 0;
|
||||
@@ -194,7 +196,6 @@ struct RSP {
|
||||
return value;
|
||||
}
|
||||
|
||||
|
||||
inline void WriteStatus(MI& mi, Registers& regs, u32 value) {
|
||||
auto write = SPStatusWrite{.raw = value};
|
||||
if(write.clearHalt && !write.setHalt) {
|
||||
@@ -220,88 +221,6 @@ struct RSP {
|
||||
CLEAR_SET(spStatus.signal7, write.clearSignal7, write.setSignal7);
|
||||
}
|
||||
|
||||
inline u64 ReadDword(u32 addr, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
return GET_RSP_DWORD(addr, imem);
|
||||
} else {
|
||||
return GET_RSP_DWORD(addr, dmem);
|
||||
}
|
||||
}
|
||||
|
||||
inline void WriteDword(u32 addr, u64 val, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
SET_RSP_DWORD(addr, imem, val);
|
||||
} else {
|
||||
SET_RSP_DWORD(addr, dmem, val);
|
||||
}
|
||||
}
|
||||
|
||||
inline u32 ReadWord(u32 addr, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
return GET_RSP_WORD(addr, imem);
|
||||
} else {
|
||||
return GET_RSP_WORD(addr, dmem);
|
||||
}
|
||||
}
|
||||
|
||||
inline void WriteWord(u32 addr, u32 val, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
SET_RSP_WORD(addr, imem, val);
|
||||
} else {
|
||||
SET_RSP_WORD(addr, dmem, val);
|
||||
}
|
||||
}
|
||||
|
||||
inline u16 ReadHalf(u32 addr, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
return GET_RSP_HALF(addr, imem);
|
||||
} else {
|
||||
return GET_RSP_HALF(addr, dmem);
|
||||
}
|
||||
}
|
||||
|
||||
inline void WriteHalf(u32 addr, u16 val, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
SET_RSP_HALF(addr, imem, val);
|
||||
} else {
|
||||
SET_RSP_HALF(addr, dmem, val);
|
||||
}
|
||||
}
|
||||
|
||||
inline u8 ReadByte(u32 addr, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
return RSP_BYTE(addr, imem);
|
||||
} else {
|
||||
return RSP_BYTE(addr, dmem);
|
||||
}
|
||||
}
|
||||
|
||||
inline void WriteByte(u32 addr, u8 val, bool i) {
|
||||
addr &= 0xfff;
|
||||
if (i) {
|
||||
RSP_BYTE(addr, imem) = val;
|
||||
} else {
|
||||
RSP_BYTE(addr, dmem) = val;
|
||||
}
|
||||
}
|
||||
|
||||
inline u64 ReadDword(u32 addr) {
|
||||
addr &= 0xfff;
|
||||
return GET_RSP_DWORD(addr, dmem);
|
||||
}
|
||||
|
||||
inline void WriteDword(u32 addr, u64 val) {
|
||||
addr &= 0xfff;
|
||||
SET_RSP_DWORD(addr, dmem, val);
|
||||
}
|
||||
|
||||
inline u32 ReadWord(u32 addr) {
|
||||
addr &= 0xfff;
|
||||
return GET_RSP_WORD(addr, dmem);
|
||||
|
||||
@@ -34,6 +34,7 @@ auto AI::Read(u32 addr) const -> u32 {
|
||||
|
||||
#define max(x, y) ((x) > (y) ? (x) : (y))
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void AI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
switch(addr) {
|
||||
case 0x04500000:
|
||||
@@ -68,10 +69,16 @@ void AI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
bitrate = val & 0xF;
|
||||
dac.precision = bitrate + 1;
|
||||
break;
|
||||
default: util::panic("Unhandled AI write at addr {:08X} with val {:08X}\n", addr, val);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled AI write at addr {:08X} with val {:08X}\n", addr, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void AI::Write<true>(Mem&, Registers&, u32, u32);
|
||||
template void AI::Write<false>(Mem&, Registers&, u32, u32);
|
||||
|
||||
void AI::Step(Mem& mem, Registers& regs, int cpuCycles, float volumeL, float volumeR) {
|
||||
cycles += cpuCycles;
|
||||
while(cycles > dac.period) {
|
||||
|
||||
@@ -10,6 +10,7 @@ struct AI {
|
||||
AI() = default;
|
||||
void Reset();
|
||||
auto Read(u32) const -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(Mem&, Registers&, u32, u32);
|
||||
void Step(Mem&, Registers&, int, float, float);
|
||||
bool dmaEnable{};
|
||||
|
||||
@@ -16,17 +16,25 @@ void MI::Reset() {
|
||||
miMode = 0;
|
||||
}
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
auto MI::Read(u32 paddr) const -> u32 {
|
||||
switch(paddr & 0xF) {
|
||||
case 0x0: return miMode & 0x3FF;
|
||||
case 0x4: return MI_VERSION_REG;
|
||||
case 0x8: return miIntr.raw & 0x3F;
|
||||
case 0xC: return miIntrMask.raw & 0x3F;
|
||||
default: util::panic("Unhandled MI[{:08X}] read\n", paddr);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled MI[{:08X}] read\n", paddr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
template auto MI::Read<true>(u32 paddr) const -> u32;
|
||||
template auto MI::Read<false>(u32 paddr) const -> u32;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void MI::Write(Registers& regs, u32 paddr, u32 val) {
|
||||
switch(paddr & 0xF) {
|
||||
case 0x0:
|
||||
@@ -78,7 +86,12 @@ void MI::Write(Registers& regs, u32 paddr, u32 val) {
|
||||
UpdateInterrupt(*this, regs);
|
||||
break;
|
||||
default:
|
||||
util::panic("Unhandled MI[{:08X}] write ({:08X})\n", val, paddr);
|
||||
if(crashOnUnimplemented) {
|
||||
util::panic("Unhandled MI[{:08X}] write ({:08X})\n", val, paddr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void MI::Write<true>(Registers&, u32 paddr, u32 val);
|
||||
template void MI::Write<false>(Registers&, u32 paddr, u32 val);
|
||||
}
|
||||
|
||||
@@ -21,7 +21,9 @@ struct Registers;
|
||||
struct MI {
|
||||
MI();
|
||||
void Reset();
|
||||
template <bool crashOnUnimplemented = true>
|
||||
[[nodiscard]] auto Read(u32) const -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(Registers& regs, u32, u32);
|
||||
|
||||
u32 miMode;
|
||||
|
||||
@@ -17,6 +17,7 @@ void PI::Reset() {
|
||||
memset(stub, 0, 8);
|
||||
}
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
auto PI::Read(MI& mi, u32 addr) const -> u32 {
|
||||
switch(addr) {
|
||||
case 0x04600000: return dramAddr;
|
||||
@@ -35,10 +36,17 @@ auto PI::Read(MI& mi, u32 addr) const -> u32 {
|
||||
case 0x04600024: case 0x04600028: case 0x0460002C: case 0x04600030:
|
||||
return stub[(addr & 0xff) - 5];
|
||||
default:
|
||||
util::panic("Unhandled PI[{:08X}] read\n", addr); return 0;
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled PI[{:08X}] read\n", addr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
template auto PI::Read<true>(MI&, u32) const -> u32;
|
||||
template auto PI::Read<false>(MI&, u32) const -> u32;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void PI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
MI& mi = mem.mmio.mi;
|
||||
switch(addr) {
|
||||
@@ -86,8 +94,12 @@ void PI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
stub[(addr & 0xff) - 5] = val & 0xff;
|
||||
break;
|
||||
default:
|
||||
util::panic("Unhandled PI[{:08X}] write ({:08X})\n", val, addr);
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled PI[{:08X}] write ({:08X})\n", val, addr);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void PI::Write<true>(n64::Mem &mem, n64::Registers ®s, u32 addr, u32 val);
|
||||
template void PI::Write<false>(n64::Mem &mem, n64::Registers ®s, u32 addr, u32 val);
|
||||
}
|
||||
@@ -10,7 +10,9 @@ struct Registers;
|
||||
struct PI {
|
||||
PI();
|
||||
void Reset();
|
||||
template <bool crashOnUnimplemented = true>
|
||||
auto Read(MI&, u32) const -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(Mem&, Registers&, u32, u32);
|
||||
u32 dramAddr{}, cartAddr{};
|
||||
u32 rdLen{}, wrLen{};
|
||||
|
||||
@@ -13,24 +13,38 @@ void RI::Reset() {
|
||||
refresh = 0x63634;
|
||||
}
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
auto RI::Read(u32 addr) const -> u32 {
|
||||
switch(addr) {
|
||||
case 0x04700000: return mode;
|
||||
case 0x04700004: return config;
|
||||
case 0x0470000C: return select;
|
||||
case 0x04700010: return refresh;
|
||||
default: util::panic("Unhandled RI[{:08X}] read\n", addr); return 0;
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled RI[{:08X}] read\n", addr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
template auto RI::Read<true>(u32 addr) const -> u32;
|
||||
template auto RI::Read<false>(u32 addr) const -> u32;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void RI::Write(u32 addr, u32 val) {
|
||||
switch(addr) {
|
||||
case 0x04700000: mode = val; break;
|
||||
case 0x04700004: config = val; break;
|
||||
case 0x0470000C: select = val; break;
|
||||
case 0x04700010: refresh = val; break;
|
||||
default: util::panic("Unhandled RI[{:08X}] read\n", addr);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled RI[{:08X}] write with val {:08X}\n", addr, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void RI::Write<true>(u32 addr, u32 val);
|
||||
template void RI::Write<false>(u32 addr, u32 val);
|
||||
}
|
||||
|
||||
@@ -6,9 +6,11 @@ namespace n64 {
|
||||
struct RI {
|
||||
RI();
|
||||
void Reset();
|
||||
u32 mode{0xE}, config{0x40}, select{0x14}, refresh{0x63634};
|
||||
template <bool crashOnUnimplemented = true>
|
||||
auto Read(u32) const -> u32;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(u32, u32);
|
||||
u32 mode{0xE}, config{0x40}, select{0x14}, refresh{0x63634};
|
||||
};
|
||||
|
||||
}
|
||||
@@ -12,6 +12,7 @@ void SI::Reset() {
|
||||
controller.raw = 0;
|
||||
}
|
||||
|
||||
template<bool crashOnUnimplemented>
|
||||
auto SI::Read(MI& mi, u32 addr) const -> u32 {
|
||||
switch(addr) {
|
||||
case 0x04800000: return dramAddr;
|
||||
@@ -24,10 +25,18 @@ auto SI::Read(MI& mi, u32 addr) const -> u32 {
|
||||
val |= (status.intr << 12);
|
||||
return val;
|
||||
}
|
||||
default: return 0xFFFFFFFF;
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled SI[{:08X}] read\n", addr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
template auto SI::Read<true>(MI &mi, u32 addr) const -> u32;
|
||||
template auto SI::Read<false>(MI &mi, u32 addr) const -> u32;
|
||||
|
||||
template<bool crashOnUnimplemented>
|
||||
void SI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
switch(addr) {
|
||||
case 0x04800000:
|
||||
@@ -56,8 +65,13 @@ void SI::Write(Mem& mem, Registers& regs, u32 addr, u32 val) {
|
||||
InterruptLower(mem.mmio.mi, regs, Interrupt::SI);
|
||||
status.intr = 0;
|
||||
break;
|
||||
default: util::panic("Unhandled SI[%08X] write (%08X)\n", addr, val);
|
||||
default:
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unhandled SI[%08X] write (%08X)\n", addr, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void SI::Write<true>(Mem &mem, Registers ®s, u32 addr, u32 val);
|
||||
template void SI::Write<false>(Mem &mem, Registers ®s, u32 addr, u32 val);
|
||||
}
|
||||
@@ -27,7 +27,9 @@ struct SI {
|
||||
u32 dramAddr{};
|
||||
Controller controller{};
|
||||
|
||||
template<bool crashOnUnimplemented = true>
|
||||
auto Read(MI&, u32) const -> u32;
|
||||
template<bool crashOnUnimplemented = true>
|
||||
void Write(Mem&, Registers&, u32, u32);
|
||||
};
|
||||
}
|
||||
@@ -22,6 +22,7 @@ void VI::Reset() {
|
||||
cyclesPerHalfline = 1000;
|
||||
}
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
u32 VI::Read(u32 paddr) const {
|
||||
switch(paddr) {
|
||||
case 0x04400000: return status.raw;
|
||||
@@ -39,10 +40,17 @@ u32 VI::Read(u32 paddr) const {
|
||||
case 0x04400030: return xscale.raw;
|
||||
case 0x04400034: return yscale.raw;
|
||||
default:
|
||||
util::panic("Unimplemented VI[%08X] read\n", paddr);
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unimplemented VI[%08X] read\n", paddr);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
template u32 VI::Read<true>(u32 paddr) const;
|
||||
template u32 VI::Read<false>(u32 paddr) const;
|
||||
|
||||
template <bool crashOnUnimplemented>
|
||||
void VI::Write(MI& mi, Registers& regs, u32 paddr, u32 val) {
|
||||
switch(paddr) {
|
||||
case 0x04400000:
|
||||
@@ -81,7 +89,12 @@ void VI::Write(MI& mi, Registers& regs, u32 paddr, u32 val) {
|
||||
case 0x04400030: xscale.raw = val; break;
|
||||
case 0x04400034: yscale.raw = val; break;
|
||||
default:
|
||||
util::panic("Unimplemented VI[%08X] write (%08X)\n", paddr, val);
|
||||
if constexpr (crashOnUnimplemented) {
|
||||
util::panic("Unimplemented VI[%08X] write (%08X)\n", paddr, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
template void VI::Write<true>(n64::MI &mi, n64::Registers ®s, u32 paddr, u32 val);
|
||||
template void VI::Write<false>(n64::MI &mi, n64::Registers ®s, u32 paddr, u32 val);
|
||||
}
|
||||
@@ -88,7 +88,9 @@ struct Registers;
|
||||
struct VI {
|
||||
VI();
|
||||
void Reset();
|
||||
template <bool crashOnUnimplemented = true>
|
||||
[[nodiscard]] u32 Read(u32) const;
|
||||
template <bool crashOnUnimplemented = true>
|
||||
void Write(MI&, Registers&, u32, u32);
|
||||
AxisScale xscale{}, yscale{};
|
||||
VIHsyncLeap hsyncLeap{};
|
||||
|
||||
@@ -148,9 +148,7 @@ inline void cop2(RSP& rsp, u32 instr) {
|
||||
case 0x30: rsp.vrcp(instr); break;
|
||||
case 0x33: rsp.vmov(instr); break;
|
||||
case 0x34: rsp.vrsq(instr); break;
|
||||
case 0x37: case 0x3F:
|
||||
printf("RSP VNULL or VNOP\n");
|
||||
break;
|
||||
case 0x37: case 0x3F: break;
|
||||
default: util::panic("Unhandled RSP COP2 ({:06b})\n", mask);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -98,8 +98,8 @@ inline VPR GetVTE(const VPR& vt, u8 e) {
|
||||
break;
|
||||
case 8 ... 15: {
|
||||
int index = ELEMENT_INDEX(e - 8);
|
||||
for (u16& vteE : vte.element) {
|
||||
vteE = vt.element[index];
|
||||
for (int i = 0; i < 8; i++) {
|
||||
vte.element[i] = vt.element[index];
|
||||
}
|
||||
} break;
|
||||
}
|
||||
@@ -581,7 +581,7 @@ void RSP::vadd(u32 instr) {
|
||||
for(int i = 0; i < 8; i++) {
|
||||
s32 result = vs.selement[i] + vte.selement[i] + (vco.l.selement[i] != 0);
|
||||
acc.l.element[i] = result;
|
||||
vd.element[i] = signedClamp(result);
|
||||
vd.element[i] = (u16)signedClamp(result);
|
||||
vco.l.element[i] = 0;
|
||||
vco.h.element[i] = 0;
|
||||
}
|
||||
@@ -611,22 +611,21 @@ void RSP::vch(u32 instr) {
|
||||
s16 vsElem = vs.selement[i];
|
||||
s16 vteElem = vte.selement[i];
|
||||
|
||||
if((vsElem ^ vteElem) < 0) {
|
||||
vco.l.element[i] = ((vsElem ^ vteElem) < 0) ? 0xffff : 0;
|
||||
if(vco.l.element[i]) {
|
||||
s16 result = vsElem + vteElem;
|
||||
|
||||
acc.l.selement[i] = (result <= 0) ? -vteElem : vsElem;
|
||||
vcc.l.element[i] = result <= 0 ? 0xffff : 0;
|
||||
vcc.h.element[i] = vteElem < 0 ? 0xffff : 0;
|
||||
vco.l.element[i] = 0xffff;
|
||||
vco.h.element[i] = (result != 0 && (u16)vsElem != ((u16)vteElem ^ 0xffff)) ? 0xffff : 0;
|
||||
vco.h.element[i] = (result != 0 && (vteElem != ~vsElem)) ? 0xffff : 0;
|
||||
vce.element[i] = result == -1 ? 0xffff : 0;
|
||||
} else {
|
||||
s16 result = vsElem - vteElem;
|
||||
acc.l.element[i] = (result >= 0) ? vteElem : vsElem;
|
||||
vcc.l.element[i] = vteElem < 0 ? 0xffff : 0;
|
||||
vcc.h.element[i] = result >= 0 ? 0xffff : 0;
|
||||
vco.l.element[i] = 0;
|
||||
vco.h.element[i] = (result != 0 && (u16)vsElem != ((u16)vteElem ^ 0xffff)) ? 0xffff : 0;
|
||||
vco.h.element[i] = result != 0 ? 0xffff : 0;
|
||||
vce.element[i] = 0;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user