CocoSimone
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e335304b23
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fix bug in memory: was using fastmem's read pages for writes too.
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2023-02-19 12:17:04 +01:00 |
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CocoSimone
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f56e1bafa2
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have two different functions to set PC in r4300i, for word and dword + set the initial PC after PIF HLE instead of Registers constructor
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2023-02-19 12:16:20 +01:00 |
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CocoSimone
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abc14302cc
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move MapVAddr to Cop0.hpp and no template necessary
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2023-02-19 12:14:39 +01:00 |
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CocoSimone
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9837919678
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Vectorize RSP
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2023-02-18 00:12:59 +01:00 |
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CocoSimone
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55f792d995
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Optimizations (are they?)
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2023-02-17 17:16:56 +01:00 |
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CocoSimone
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eb10687837
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BITCH I'M BACK OUT MY COMA
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2023-02-12 23:58:26 +01:00 |
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CocoSimone
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a81587ec21
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Only use /EHa in MSVC
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2023-02-12 15:41:45 +01:00 |
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CocoSimone
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e95ca54cd1
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fix windows CI (disable gdb stub)
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2023-02-11 18:19:15 +01:00 |
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CocoSimone
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2cd82dff69
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unmap cartridge and imem/dmem from fastmem (checks outweighed the performance) + support for PAL framerate
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2023-02-11 12:58:18 +01:00 |
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CocoSimone
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30c6931f09
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fix buncha things, can't be assed to list
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2023-02-10 16:16:16 +01:00 |
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CocoSimone
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5d35fb229f
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make menu bar disappear + change way scaling works
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2023-02-10 14:22:00 +01:00 |
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CocoSimone
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0954bb23b1
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new vector instructions + fixed stupid FPU bug
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2023-02-10 03:06:12 +01:00 |
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CocoSimone
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3786a5fd3b
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new vector loads/stores
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2023-02-10 02:13:57 +01:00 |
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CocoSimone
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6d58728239
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Allocate only interpreter or dynarec + hopefully fixed some FPU bugs + hopefully it will build in Windows CI 🙏
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2023-02-10 02:13:52 +01:00 |
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CocoSimone
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ea5e4895ba
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Use physical address for indexing into blocks
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2023-01-13 19:19:51 +01:00 |
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CocoSimone
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60d0dd2c31
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More JIT work
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2023-01-05 01:20:34 +01:00 |
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CocoSimone
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64630ea06b
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No more segfault in JIT. Keeps executing the same blocks over and over though...
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2023-01-04 16:50:33 +01:00 |
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CocoSimone
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5da1e2a443
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Emitting all instructions. Still boogs
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2023-01-03 00:38:03 +01:00 |
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CocoSimone
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f45f1417e8
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Boogs
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2023-01-02 22:28:12 +01:00 |
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CocoSimone
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c915ebc11d
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Dynarec + CMake restructure
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2023-01-02 22:07:30 +01:00 |
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CocoSimone
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408e369df5
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Dynarec ground work
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2022-12-29 23:05:11 +01:00 |
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CocoSimone
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138c3f6a98
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Share registers between both cores
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2022-12-25 00:01:31 +01:00 |
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CocoSimone
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2fad0d8b98
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Fix windows, hopefully
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2022-12-24 18:35:31 +01:00 |
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CocoSimone
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2ea4a88ae8
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A bit more refactoring
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2022-12-23 22:52:17 +01:00 |
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CocoSimone
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4adb7a46f8
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Restructure
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2022-12-22 23:08:37 +01:00 |
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