iris
00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
104 lines
3.6 KiB
C
104 lines
3.6 KiB
C
/* Capstone Disassembly Engine */
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/* BPF Backend by david942j <david942j@gmail.com>, 2019 */
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/* SPDX-FileCopyrightText: 2024 Roee Toledano <roeetoledano10@gmail.com> */
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/* SPDX-License-Identifier: BSD-3 */
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/* This file defines constants and macros used for parsing a BPF instruction */
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#ifndef CS_BPF_CONSTANTS_H
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#define CS_BPF_CONSTANTS_H
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#define BPF_CLASS(code) ((code) & 0x7)
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///< Instruction classes
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#define BPF_CLASS_LD 0x00
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#define BPF_CLASS_LDX 0x01
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#define BPF_CLASS_ST 0x02
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#define BPF_CLASS_STX 0x03
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#define BPF_CLASS_ALU 0x04
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#define BPF_CLASS_JMP 0x05
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#define BPF_CLASS_RET 0x06 ///< cBPF only
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#define BPF_CLASS_JMP32 0x06 ///< eBPF only
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#define BPF_CLASS_MISC 0x07 ///< cBPF only
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#define BPF_CLASS_ALU64 0x07 ///< eBPF only
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#define BPF_OP(code) ((code) & 0xf0)
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///< Types of ALU instruction
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#define BPF_ALU_ADD 0x00
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#define BPF_ALU_SUB 0x10
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#define BPF_ALU_MUL 0x20
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#define BPF_ALU_DIV 0x30
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#define BPF_ALU_OR 0x40
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#define BPF_ALU_AND 0x50
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#define BPF_ALU_LSH 0x60
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#define BPF_ALU_RSH 0x70
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#define BPF_ALU_NEG 0x80
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#define BPF_ALU_MOD 0x90
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#define BPF_ALU_XOR 0xa0
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#define BPF_ALU_MOV 0xb0 ///< eBPF only: mov reg to reg
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#define BPF_ALU_ARSH 0xc0 ///< eBPF only: sign extending shift right
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#define BPF_ALU_END 0xd0 ///< eBPF only: endianness conversion
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///< Types of jmp instruction
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#define BPF_JUMP_JA 0x00 ///< goto
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#define BPF_JUMP_JEQ 0x10 ///< '=='
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#define BPF_JUMP_JGT 0x20 ///< unsigned '>'
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#define BPF_JUMP_JGE 0x30 ///< unsigned '>='
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#define BPF_JUMP_JSET 0x40 ///< '&'
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#define BPF_JUMP_JNE 0x50 ///< eBPF only: '!=' */
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#define BPF_JUMP_JSGT 0x60 ///< eBPF only: signed '>'
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#define BPF_JUMP_JSGE 0x70 ///< eBPF only: signed '>='
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#define BPF_JUMP_CALL 0x80 ///< eBPF only: function call
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#define BPF_JUMP_EXIT 0x90 ///< eBPF only: exit
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#define BPF_JUMP_JLT 0xa0 ///< eBPF only: unsigned '<'
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#define BPF_JUMP_JLE 0xb0 ///< eBPF only: unsigned '<='
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#define BPF_JUMP_JSLT 0xc0 ///< eBPF only: signed '<'
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#define BPF_JUMP_JSLE 0xd0 ///< eBPF only: signed '<='
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///< Types of complex atomic instructions
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#define BPF_ATOMIC_XCHG 0xe0 ///< eBPF only: atomic exchange
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#define BPF_ATOMIC_CMPXCHG 0xf0 ///< eBPF only: atomic compare and exchange
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#define BPF_SRC(code) ((code) & 0x08)
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#define BPF_RVAL(code) ((code) & 0x18) /* cBPF only: for return types */
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///< Source operand
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#define BPF_SRC_K 0x00
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#define BPF_SRC_X 0x08
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#define BPF_SRC_A 0x10 /* cBPF only */
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#define BPF_SRC_LITTLE BPF_SRC_K
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#define BPF_SRC_BIG BPF_SRC_X
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#define BPF_SIZE(code) ((code) & 0x18)
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///< Size modifier
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#define BPF_SIZE_W 0x00 ///< word
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#define BPF_SIZE_H 0x08 ///< half word
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#define BPF_SIZE_B 0x10 ///< byte
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#define BPF_SIZE_DW 0x18 ///< eBPF only: double word
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#define BPF_MODE(code) ((code) & 0xe0)
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///< Mode modifier
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#define BPF_MODE_IMM 0x00 ///< used for 32-bit mov in cBPF and 64-bit in eBPF
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#define BPF_MODE_ABS \
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0x20 ///< absolute indexing of socket buffer. eBPF only, but deprecated in new versions
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#define BPF_MODE_IND \
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0x40 ///< indirect indexing of socket buffer. eBPF only, but deprecated in new versions
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#define BPF_MODE_MEM 0x60
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#define BPF_MODE_LEN 0x80 ///< cBPF only, reserved in eBPF
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#define BPF_MODE_MSH 0xa0 ///< cBPF only, reserved in eBPF
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#define BPF_MODE_ATOMIC \
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0xc0 ///< eBPF only: atomic operations. Originally BPF_MODE_XADD
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#define BPF_MODE_FETCH \
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0x01 /* eBPF only: overwrite 'src' with what was in the modified mem address before it was modified.
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NOTE: in contrast to regular modifiers, this one is encoded in the 'imm' field, not opcode!
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Must be used for BPF_XCHG and BPF_CMPXCHG. Optional for the other atomic operations. */
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#define BPF_MISCOP(code) ((code) & 0x80)
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///< Operation of misc
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#define BPF_MISCOP_TAX 0x00
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#define BPF_MISCOP_TXA 0x80
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#endif
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