Files
kaizen/external/capstone/arch/BPF/BPFInstPrinter.c
T
iris 00cc9309cb Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd
de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
2026-06-15 11:56:38 +02:00

371 lines
9.2 KiB
C

/* Capstone Disassembly Engine */
/* BPF Backend by david942j <david942j@gmail.com>, 2019 */
/* SPDX-FileCopyrightText: 2024 Roee Toledano <roeetoledano10@gmail.com> */
/* SPDX-License-Identifier: BSD-3 */
#include <capstone/platform.h>
#include "BPFConstants.h"
#include "BPFInstPrinter.h"
#include "BPFMapping.h"
#include "../../Mapping.h"
static cs_bpf_op *expand_bpf_operands(cs_bpf *bpf)
{
assert(bpf->op_count < 3);
return &bpf->operands[bpf->op_count++];
}
static void push_op_reg(cs_bpf *bpf, bpf_op_type val, uint8_t ac_mode)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_REG;
op->reg = val;
op->access = ac_mode;
}
static void push_op_imm(cs_bpf *bpf, uint64_t val, const bool is_signed)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_IMM;
op->imm = val;
op->is_signed = is_signed;
}
static void push_op_off(cs_bpf *bpf, uint32_t val, const bool is_signed)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_OFF;
op->off = val;
op->is_signed = is_signed;
}
static void push_op_mem(cs_bpf *bpf, bpf_reg reg, uint32_t val,
const bool is_signed, const bool is_pkt)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_MEM;
op->mem.base = reg;
op->mem.disp = val;
op->is_signed = is_signed;
op->is_pkt = is_pkt;
}
static void push_op_mmem(cs_bpf *bpf, uint32_t val)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_MMEM;
op->mmem = val;
}
static void push_op_msh(cs_bpf *bpf, uint32_t val)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_MSH;
op->msh = val;
}
static void push_op_ext(cs_bpf *bpf, bpf_ext_type val)
{
cs_bpf_op *op = expand_bpf_operands(bpf);
op->type = BPF_OP_EXT;
op->ext = val;
}
static void convert_operands(MCInst *MI, cs_bpf *bpf)
{
unsigned opcode = MCInst_getOpcode(MI);
unsigned mc_op_count = MCInst_getNumOperands(MI);
MCOperand *op;
MCOperand *op2;
bpf->op_count = 0;
if (BPF_CLASS(opcode) == BPF_CLASS_LD ||
BPF_CLASS(opcode) == BPF_CLASS_LDX) {
switch (BPF_MODE(opcode)) {
case BPF_MODE_IMM:
if (EBPF_MODE(MI->csh->mode)) {
push_op_reg(bpf,
MCOperand_getReg(
MCInst_getOperand(MI, 0)),
CS_AC_WRITE);
push_op_imm(bpf,
MCOperand_getImm(
MCInst_getOperand(MI, 1)),
false);
} else {
push_op_imm(bpf,
MCOperand_getImm(
MCInst_getOperand(MI, 0)),
false);
}
break;
case BPF_MODE_ABS:
op = MCInst_getOperand(MI, 0);
push_op_mem(bpf, BPF_REG_INVALID,
(uint32_t)MCOperand_getImm(op), EBPF_MODE(MI->csh->mode), true);
break;
case BPF_MODE_IND:
op = MCInst_getOperand(MI, 0);
if (EBPF_MODE(MI->csh->mode))
push_op_mem(bpf, MCOperand_getReg(op), 0x0,
true, true);
else {
op2 = MCInst_getOperand(MI, 1);
push_op_mem(bpf, MCOperand_getReg(op),
(uint32_t)MCOperand_getImm(op2),
false, true);
}
break;
case BPF_MODE_MEM:
if (EBPF_MODE(MI->csh->mode)) {
/* ldx{w,h,b,dw} dst, [src+off] */
push_op_reg(bpf,
MCOperand_getReg(
MCInst_getOperand(MI, 0)),
CS_AC_WRITE);
op = MCInst_getOperand(MI, 1);
op2 = MCInst_getOperand(MI, 2);
push_op_mem(bpf, MCOperand_getReg(op),
(uint32_t)MCOperand_getImm(op2),
true, false);
} else {
push_op_mmem(bpf,
(uint32_t)MCOperand_getImm(
MCInst_getOperand(MI, 0)));
}
break;
case BPF_MODE_LEN:
push_op_ext(bpf, BPF_EXT_LEN);
break;
case BPF_MODE_MSH:
op = MCInst_getOperand(MI, 0);
push_op_msh(bpf, (uint32_t)MCOperand_getImm(op));
break;
/* case BPF_MODE_XADD: // not exists */
}
return;
}
if (BPF_CLASS(opcode) == BPF_CLASS_ST ||
BPF_CLASS(opcode) == BPF_CLASS_STX) {
if (!EBPF_MODE(MI->csh->mode)) {
// cBPF has only one case - st* M[k]
push_op_mmem(bpf, (uint32_t)MCOperand_getImm(
MCInst_getOperand(MI, 0)));
return;
}
/* eBPF has two cases:
* - st [dst + off], src
* - xadd [dst + off], src
* they have same form of operands.
*/
op = MCInst_getOperand(MI, 0);
op2 = MCInst_getOperand(MI, 1);
push_op_mem(bpf, MCOperand_getReg(op),
(uint32_t)MCOperand_getImm(op2), true, false);
op = MCInst_getOperand(MI, 2);
if (MCOperand_isImm(op))
push_op_imm(bpf, MCOperand_getImm(op), false);
else if (MCOperand_isReg(op))
push_op_reg(bpf, MCOperand_getReg(op), CS_AC_READ);
return;
}
{
const bool is_jmp32 = EBPF_MODE(MI->csh->mode) &&
(BPF_CLASS(opcode) == BPF_CLASS_JMP32);
if (BPF_CLASS(opcode) == BPF_CLASS_JMP || is_jmp32) {
for (size_t i = 0; i < mc_op_count; i++) {
op = MCInst_getOperand(MI, i);
if (MCOperand_isImm(op)) {
/* Decide if we're using IMM or OFF here (and if OFF, then signed or unsigned):
*
* 1. any jump/jump32 + signed off (not including exit/call and ja on jump32) // eBPF
* 2. exit/call/ja + k // eBPF
* 3. ja + unsigned off // cBPF (cBPF programs can only jump forwards)
* 4. any jump {x,k}, +jt, +jf // cBPF
* */
if ((BPF_OP(opcode) == BPF_JUMP_JA &&
!is_jmp32) ||
(!EBPF_MODE(MI->csh->mode) &&
i >= 1) ||
(EBPF_MODE(MI->csh->mode) &&
i == 2))
push_op_off(
bpf,
MCOperand_getImm(op),
EBPF_MODE(
MI->csh->mode));
else
push_op_imm(
bpf,
MCOperand_getImm(op),
true);
} else if (MCOperand_isReg(op)) {
push_op_reg(bpf, MCOperand_getReg(op),
CS_AC_READ);
}
}
return;
}
}
if (!EBPF_MODE(MI->csh->mode)) {
/* In cBPF mode, all registers in operands are accessed as read */
for (size_t i = 0; i < mc_op_count; i++) {
op = MCInst_getOperand(MI, i);
if (MCOperand_isImm(op))
push_op_imm(bpf, MCOperand_getImm(op), false);
else if (MCOperand_isReg(op))
push_op_reg(bpf, MCOperand_getReg(op),
CS_AC_READ);
}
return;
}
/* remain cases are: eBPF mode && ALU */
/* if (BPF_CLASS(opcode) == BPF_CLASS_ALU || BPF_CLASS(opcode) == BPF_CLASS_ALU64) */
/* We have three types:
* 1. {l,b}e dst // dst = byteswap(dst)
* 2. neg dst // dst = -dst
* 3. <op> dst, {src_reg, imm} // dst = dst <op> src
* so we can simply check the number of operands,
* exactly one operand means we are in case 1. and 2.,
* otherwise in case 3.
*/
if (mc_op_count == 1) {
op = MCInst_getOperand(MI, 0);
push_op_reg(bpf, MCOperand_getReg(op),
CS_AC_READ | CS_AC_WRITE);
} else { // if (mc_op_count == 2)
op = MCInst_getOperand(MI, 0);
push_op_reg(bpf, MCOperand_getReg(op),
CS_AC_READ | CS_AC_WRITE);
op = MCInst_getOperand(MI, 1);
if (MCOperand_isImm(op))
push_op_imm(bpf, MCOperand_getImm(op), false);
else if (MCOperand_isReg(op))
push_op_reg(bpf, MCOperand_getReg(op), CS_AC_READ);
}
}
static void print_operand(MCInst *MI, struct SStream *O, const cs_bpf_op *op)
{
switch (op->type) {
case BPF_OP_INVALID:
SStream_concat(O, "invalid");
break;
case BPF_OP_REG:
SStream_concat(O, BPF_reg_name((csh)MI->csh, op->reg));
break;
case BPF_OP_IMM:
if (op->is_signed)
printInt32Hex(O, op->imm);
else
SStream_concat(O, "0x%" PRIx64, op->imm);
break;
case BPF_OP_OFF:
if (op->is_signed)
printInt16HexOffset(O, op->off);
else
SStream_concat(O, "+0x%" PRIx32, op->off);
break;
case BPF_OP_MEM:
SStream_concat(O, "[");
if (op->is_pkt && EBPF_MODE(MI->csh->mode)) {
SStream_concat(O, "skb");
if (op->mem.base != BPF_REG_INVALID)
SStream_concat(O, "+%s",
BPF_reg_name((csh)MI->csh,
op->mem.base));
else {
if (op->is_signed)
printInt32HexOffset(O, op->mem.disp);
else
SStream_concat(O, "+0x%" PRIx32,
op->mem.disp);
}
} else {
if (op->mem.base != BPF_REG_INVALID)
SStream_concat(O, BPF_reg_name((csh)MI->csh,
op->mem.base));
if (op->mem.disp != 0) {
if (op->mem.base != BPF_REG_INVALID) {
// if operation is signed, then it always uses off, not k
if (op->is_signed)
printInt16HexOffset(
O, op->mem.disp);
else if (op->is_pkt)
SStream_concat(O, "+0x%" PRIx32,
op->mem.disp);
else
SStream_concat(O, "+0x%" PRIx16,
op->mem.disp);
} else
SStream_concat(O, "0x%" PRIx32,
op->mem.disp);
}
if (op->mem.base == BPF_REG_INVALID &&
op->mem.disp == 0)
SStream_concat(O, "0x0");
}
SStream_concat(O, "]");
break;
case BPF_OP_MMEM:
SStream_concat(O, "m[0x%x]", op->mmem);
break;
case BPF_OP_MSH:
SStream_concat(O, "4*([0x%x]&0xf)", op->msh);
break;
case BPF_OP_EXT:
switch (op->ext) {
case BPF_EXT_LEN:
SStream_concat(O, "#len");
break;
}
break;
}
}
/*
* 1. human readable mnemonic
* 2. set pubOpcode (BPF_INSN_*)
* 3. set detail->bpf.operands
* */
void BPF_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo)
{
cs_bpf bpf = { 0 };
/* set pubOpcode as instruction id */
SStream_concat(O, BPF_insn_name((csh)MI->csh, MCInst_getOpcodePub(MI)));
convert_operands(MI, &bpf);
for (size_t i = 0; i < bpf.op_count; i++) {
if (i == 0)
SStream_concat(O, "\t");
else
SStream_concat(O, ", ");
print_operand(MI, O, &bpf.operands[i]);
}
#ifndef CAPSTONE_DIET
if (detail_is_set(MI)) {
MI->flat_insn->detail->bpf = bpf;
}
#endif
}