00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
371 lines
9.2 KiB
C
371 lines
9.2 KiB
C
/* Capstone Disassembly Engine */
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/* BPF Backend by david942j <david942j@gmail.com>, 2019 */
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/* SPDX-FileCopyrightText: 2024 Roee Toledano <roeetoledano10@gmail.com> */
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/* SPDX-License-Identifier: BSD-3 */
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#include <capstone/platform.h>
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#include "BPFConstants.h"
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#include "BPFInstPrinter.h"
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#include "BPFMapping.h"
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#include "../../Mapping.h"
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static cs_bpf_op *expand_bpf_operands(cs_bpf *bpf)
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{
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assert(bpf->op_count < 3);
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return &bpf->operands[bpf->op_count++];
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}
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static void push_op_reg(cs_bpf *bpf, bpf_op_type val, uint8_t ac_mode)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_REG;
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op->reg = val;
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op->access = ac_mode;
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}
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static void push_op_imm(cs_bpf *bpf, uint64_t val, const bool is_signed)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_IMM;
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op->imm = val;
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op->is_signed = is_signed;
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}
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static void push_op_off(cs_bpf *bpf, uint32_t val, const bool is_signed)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_OFF;
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op->off = val;
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op->is_signed = is_signed;
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}
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static void push_op_mem(cs_bpf *bpf, bpf_reg reg, uint32_t val,
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const bool is_signed, const bool is_pkt)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_MEM;
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op->mem.base = reg;
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op->mem.disp = val;
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op->is_signed = is_signed;
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op->is_pkt = is_pkt;
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}
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static void push_op_mmem(cs_bpf *bpf, uint32_t val)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_MMEM;
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op->mmem = val;
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}
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static void push_op_msh(cs_bpf *bpf, uint32_t val)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_MSH;
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op->msh = val;
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}
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static void push_op_ext(cs_bpf *bpf, bpf_ext_type val)
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{
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cs_bpf_op *op = expand_bpf_operands(bpf);
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op->type = BPF_OP_EXT;
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op->ext = val;
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}
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static void convert_operands(MCInst *MI, cs_bpf *bpf)
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{
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unsigned opcode = MCInst_getOpcode(MI);
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unsigned mc_op_count = MCInst_getNumOperands(MI);
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MCOperand *op;
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MCOperand *op2;
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bpf->op_count = 0;
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if (BPF_CLASS(opcode) == BPF_CLASS_LD ||
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BPF_CLASS(opcode) == BPF_CLASS_LDX) {
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switch (BPF_MODE(opcode)) {
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case BPF_MODE_IMM:
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if (EBPF_MODE(MI->csh->mode)) {
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push_op_reg(bpf,
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MCOperand_getReg(
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MCInst_getOperand(MI, 0)),
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CS_AC_WRITE);
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push_op_imm(bpf,
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MCOperand_getImm(
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MCInst_getOperand(MI, 1)),
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false);
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} else {
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push_op_imm(bpf,
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MCOperand_getImm(
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MCInst_getOperand(MI, 0)),
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false);
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}
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break;
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case BPF_MODE_ABS:
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op = MCInst_getOperand(MI, 0);
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push_op_mem(bpf, BPF_REG_INVALID,
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(uint32_t)MCOperand_getImm(op), EBPF_MODE(MI->csh->mode), true);
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break;
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case BPF_MODE_IND:
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op = MCInst_getOperand(MI, 0);
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if (EBPF_MODE(MI->csh->mode))
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push_op_mem(bpf, MCOperand_getReg(op), 0x0,
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true, true);
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else {
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op2 = MCInst_getOperand(MI, 1);
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push_op_mem(bpf, MCOperand_getReg(op),
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(uint32_t)MCOperand_getImm(op2),
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false, true);
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}
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break;
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case BPF_MODE_MEM:
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if (EBPF_MODE(MI->csh->mode)) {
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/* ldx{w,h,b,dw} dst, [src+off] */
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push_op_reg(bpf,
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MCOperand_getReg(
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MCInst_getOperand(MI, 0)),
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CS_AC_WRITE);
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op = MCInst_getOperand(MI, 1);
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op2 = MCInst_getOperand(MI, 2);
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push_op_mem(bpf, MCOperand_getReg(op),
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(uint32_t)MCOperand_getImm(op2),
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true, false);
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} else {
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push_op_mmem(bpf,
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(uint32_t)MCOperand_getImm(
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MCInst_getOperand(MI, 0)));
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}
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break;
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case BPF_MODE_LEN:
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push_op_ext(bpf, BPF_EXT_LEN);
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break;
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case BPF_MODE_MSH:
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op = MCInst_getOperand(MI, 0);
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push_op_msh(bpf, (uint32_t)MCOperand_getImm(op));
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break;
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/* case BPF_MODE_XADD: // not exists */
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}
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return;
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}
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if (BPF_CLASS(opcode) == BPF_CLASS_ST ||
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BPF_CLASS(opcode) == BPF_CLASS_STX) {
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if (!EBPF_MODE(MI->csh->mode)) {
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// cBPF has only one case - st* M[k]
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push_op_mmem(bpf, (uint32_t)MCOperand_getImm(
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MCInst_getOperand(MI, 0)));
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return;
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}
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/* eBPF has two cases:
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* - st [dst + off], src
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* - xadd [dst + off], src
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* they have same form of operands.
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*/
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op = MCInst_getOperand(MI, 0);
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op2 = MCInst_getOperand(MI, 1);
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push_op_mem(bpf, MCOperand_getReg(op),
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(uint32_t)MCOperand_getImm(op2), true, false);
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op = MCInst_getOperand(MI, 2);
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if (MCOperand_isImm(op))
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push_op_imm(bpf, MCOperand_getImm(op), false);
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else if (MCOperand_isReg(op))
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push_op_reg(bpf, MCOperand_getReg(op), CS_AC_READ);
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return;
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}
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{
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const bool is_jmp32 = EBPF_MODE(MI->csh->mode) &&
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(BPF_CLASS(opcode) == BPF_CLASS_JMP32);
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if (BPF_CLASS(opcode) == BPF_CLASS_JMP || is_jmp32) {
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for (size_t i = 0; i < mc_op_count; i++) {
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op = MCInst_getOperand(MI, i);
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if (MCOperand_isImm(op)) {
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/* Decide if we're using IMM or OFF here (and if OFF, then signed or unsigned):
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*
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* 1. any jump/jump32 + signed off (not including exit/call and ja on jump32) // eBPF
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* 2. exit/call/ja + k // eBPF
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* 3. ja + unsigned off // cBPF (cBPF programs can only jump forwards)
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* 4. any jump {x,k}, +jt, +jf // cBPF
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* */
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if ((BPF_OP(opcode) == BPF_JUMP_JA &&
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!is_jmp32) ||
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(!EBPF_MODE(MI->csh->mode) &&
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i >= 1) ||
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(EBPF_MODE(MI->csh->mode) &&
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i == 2))
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push_op_off(
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bpf,
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MCOperand_getImm(op),
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EBPF_MODE(
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MI->csh->mode));
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else
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push_op_imm(
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bpf,
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MCOperand_getImm(op),
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true);
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} else if (MCOperand_isReg(op)) {
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push_op_reg(bpf, MCOperand_getReg(op),
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CS_AC_READ);
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}
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}
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return;
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}
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}
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if (!EBPF_MODE(MI->csh->mode)) {
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/* In cBPF mode, all registers in operands are accessed as read */
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for (size_t i = 0; i < mc_op_count; i++) {
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op = MCInst_getOperand(MI, i);
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if (MCOperand_isImm(op))
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push_op_imm(bpf, MCOperand_getImm(op), false);
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else if (MCOperand_isReg(op))
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push_op_reg(bpf, MCOperand_getReg(op),
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CS_AC_READ);
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}
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return;
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}
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/* remain cases are: eBPF mode && ALU */
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/* if (BPF_CLASS(opcode) == BPF_CLASS_ALU || BPF_CLASS(opcode) == BPF_CLASS_ALU64) */
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/* We have three types:
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* 1. {l,b}e dst // dst = byteswap(dst)
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* 2. neg dst // dst = -dst
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* 3. <op> dst, {src_reg, imm} // dst = dst <op> src
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* so we can simply check the number of operands,
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* exactly one operand means we are in case 1. and 2.,
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* otherwise in case 3.
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*/
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if (mc_op_count == 1) {
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op = MCInst_getOperand(MI, 0);
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push_op_reg(bpf, MCOperand_getReg(op),
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CS_AC_READ | CS_AC_WRITE);
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} else { // if (mc_op_count == 2)
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op = MCInst_getOperand(MI, 0);
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push_op_reg(bpf, MCOperand_getReg(op),
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CS_AC_READ | CS_AC_WRITE);
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op = MCInst_getOperand(MI, 1);
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if (MCOperand_isImm(op))
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push_op_imm(bpf, MCOperand_getImm(op), false);
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else if (MCOperand_isReg(op))
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push_op_reg(bpf, MCOperand_getReg(op), CS_AC_READ);
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}
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}
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static void print_operand(MCInst *MI, struct SStream *O, const cs_bpf_op *op)
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{
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switch (op->type) {
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case BPF_OP_INVALID:
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SStream_concat(O, "invalid");
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break;
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case BPF_OP_REG:
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SStream_concat(O, BPF_reg_name((csh)MI->csh, op->reg));
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break;
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case BPF_OP_IMM:
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if (op->is_signed)
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printInt32Hex(O, op->imm);
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else
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SStream_concat(O, "0x%" PRIx64, op->imm);
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break;
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case BPF_OP_OFF:
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if (op->is_signed)
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printInt16HexOffset(O, op->off);
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else
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SStream_concat(O, "+0x%" PRIx32, op->off);
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break;
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case BPF_OP_MEM:
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SStream_concat(O, "[");
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if (op->is_pkt && EBPF_MODE(MI->csh->mode)) {
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SStream_concat(O, "skb");
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if (op->mem.base != BPF_REG_INVALID)
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SStream_concat(O, "+%s",
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BPF_reg_name((csh)MI->csh,
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op->mem.base));
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else {
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if (op->is_signed)
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printInt32HexOffset(O, op->mem.disp);
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else
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SStream_concat(O, "+0x%" PRIx32,
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op->mem.disp);
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}
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} else {
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if (op->mem.base != BPF_REG_INVALID)
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SStream_concat(O, BPF_reg_name((csh)MI->csh,
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op->mem.base));
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if (op->mem.disp != 0) {
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if (op->mem.base != BPF_REG_INVALID) {
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// if operation is signed, then it always uses off, not k
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if (op->is_signed)
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printInt16HexOffset(
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O, op->mem.disp);
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else if (op->is_pkt)
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SStream_concat(O, "+0x%" PRIx32,
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op->mem.disp);
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else
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SStream_concat(O, "+0x%" PRIx16,
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op->mem.disp);
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} else
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SStream_concat(O, "0x%" PRIx32,
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op->mem.disp);
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}
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if (op->mem.base == BPF_REG_INVALID &&
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op->mem.disp == 0)
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SStream_concat(O, "0x0");
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}
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SStream_concat(O, "]");
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break;
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case BPF_OP_MMEM:
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SStream_concat(O, "m[0x%x]", op->mmem);
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break;
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case BPF_OP_MSH:
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SStream_concat(O, "4*([0x%x]&0xf)", op->msh);
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break;
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case BPF_OP_EXT:
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switch (op->ext) {
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case BPF_EXT_LEN:
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SStream_concat(O, "#len");
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break;
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}
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break;
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}
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}
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/*
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* 1. human readable mnemonic
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* 2. set pubOpcode (BPF_INSN_*)
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* 3. set detail->bpf.operands
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* */
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void BPF_printInst(MCInst *MI, struct SStream *O, void *PrinterInfo)
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{
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cs_bpf bpf = { 0 };
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/* set pubOpcode as instruction id */
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SStream_concat(O, BPF_insn_name((csh)MI->csh, MCInst_getOpcodePub(MI)));
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convert_operands(MI, &bpf);
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for (size_t i = 0; i < bpf.op_count; i++) {
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if (i == 0)
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SStream_concat(O, "\t");
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else
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SStream_concat(O, ", ");
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print_operand(MI, O, &bpf.operands[i]);
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}
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#ifndef CAPSTONE_DIET
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if (detail_is_set(MI)) {
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MI->flat_insn->detail->bpf = bpf;
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}
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#endif
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}
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