iris
00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
/* Capstone Disassembly Engine */
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/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
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#ifndef CS_M680XDISASSEMBLERINTERNALS_H
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#define CS_M680XDISASSEMBLERINTERNALS_H
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#include "../../MCInst.h"
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#include "../../include/capstone/m680x.h"
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typedef enum e_cpu_type {
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M680X_CPU_TYPE_INVALID,
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M680X_CPU_TYPE_6301, // M680X Hitachi HD6301,HD6303 mode
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M680X_CPU_TYPE_6309, // M680X Hitachi HD6309 mode
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M680X_CPU_TYPE_6800, // M680X Motorola 6800,6802 mode
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M680X_CPU_TYPE_6801, // M680X Motorola 6801,6803 mode
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M680X_CPU_TYPE_6805, // M680X Motorola/Freescale M68HC05 mode
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M680X_CPU_TYPE_6808, // M680X Motorola/Freescale M68HC08 mode
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M680X_CPU_TYPE_6809, // M680X Motorola 6809 mode
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M680X_CPU_TYPE_6811, // M680X Motorola/Freescale M68HC11 mode
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M680X_CPU_TYPE_CPU12, // M680X Motorola/Freescale CPU12 mode
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// used on M68HC12/HCS12
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M680X_CPU_TYPE_HCS08, // M680X Freescale HCS08 mode
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M680X_CPU_TYPE_ENDING,
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} e_cpu_type;
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struct inst_page1;
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struct inst_pageX;
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typedef struct {
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const struct inst_page1 *inst_page1_table;
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const struct inst_pageX *inst_overlay_table[2];
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size_t overlay_table_size[2];
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uint8_t pageX_prefix[3];
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const struct inst_pageX *inst_pageX_table[3];
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size_t pageX_table_size[3];
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const uint8_t *reg_byte_size;
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const bool *tfr_reg_valid;
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m680x_insn insn_cc_not_modified[2];
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} cpu_tables;
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/* Private, For internal use only */
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typedef struct m680x_info {
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const uint8_t *code; // code buffer
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uint32_t size; // byte size of code
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uint16_t offset; // address offset of first byte in code buffer
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e_cpu_type cpu_type; // The CPU type to be used for disassembling
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cs_m680x m680x; // M680X specific properties
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const cpu_tables *cpu;
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m680x_insn insn; // Instruction ID
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uint8_t insn_size; // byte size of instruction
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} m680x_info;
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extern cs_err M680X_disassembler_init(cs_struct *ud);
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extern cs_err M680X_instprinter_init(cs_struct *ud);
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#endif
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