iris
00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
391 lines
12 KiB
Ruby
391 lines
12 KiB
Ruby
#!/usr/bin/env ruby
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out = Array.new(256, "NULL");
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code_list = <<EOF
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MOV_i #imm,Rn 1110nnnniiiiiiii
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MOV.W @(disp*,PC),Rn 1001nnnndddddddd
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MOV.L @(disp*,PC),Rn 1101nnnndddddddd
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MOV Rm,Rn 0110nnnnmmmm0011
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MOV.B Rm,@Rn 0010nnnnmmmm0000
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MOV.W Rm,@Rn 0010nnnnmmmm0001
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MOV.L Rm,@Rn 0010nnnnmmmm0010
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MOV.B @Rm,Rn 0110nnnnmmmm0000
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MOV.W @Rm,Rn 0110nnnnmmmm0001
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MOV.L @Rm,Rn 0110nnnnmmmm0010
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MOV.B Rm,@-Rn 0010nnnnmmmm0100
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MOV.W Rm,@-Rn 0010nnnnmmmm0101
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MOV.L Rm,@-Rn 0010nnnnmmmm0110
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MOV.B @Rm+,Rn 0110nnnnmmmm0100
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MOV.W @Rm+,Rn 0110nnnnmmmm0101
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MOV.L @Rm+,Rn 0110nnnnmmmm0110
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MOV.B R0,@(disp*,Rn) 10000000nnnndddd
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MOV.W R0,@(disp*,Rn) 10000001nnnndddd
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MOV.L Rm,@(disp*,Rn) 0001nnnnmmmmdddd
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MOV.B @(disp*,Rm),R0 10000100mmmmdddd
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MOV.W @(disp*,Rm),R0 10000101mmmmdddd
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MOV.L @(disp*,Rm),Rn 0101nnnnmmmmdddd
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MOV.B Rm,@(R0,Rn) 0000nnnnmmmm0100
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MOV.W Rm,@(R0,Rn) 0000nnnnmmmm0101
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MOV.L Rm,@(R0,Rn) 0000nnnnmmmm0110
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MOV.B @(R0,Rm),Rn 0000nnnnmmmm1100
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MOV.W @(R0,Rm),Rn 0000nnnnmmmm1101
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MOV.L @(R0,Rm),Rn 0000nnnnmmmm1110
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MOV.B R0,@(disp*,GBR) 11000000dddddddd
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MOV.W R0,@(disp*,GBR) 11000001dddddddd
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MOV.L R0,@(disp*,GBR) 11000010dddddddd
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MOV.B @(disp*,GBR),R0 11000100dddddddd
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MOV.W @(disp*,GBR),R0 11000101dddddddd
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MOV.L @(disp*,GBR),R0 11000110dddddddd
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MOVA @(disp*,PC),R0 11000111dddddddd
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MOVCO.L R0,@Rn 0000nnnn01110011
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MOVLI.L @Rm,R0 0000mmmm01100011
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MOVUA.L @Rm,R0 0100mmmm10101001
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MOVUA.L @Rm+,R0 0100mmmm11101001
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MOVT Rn 0000nnnn00101001
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SWAP.B Rm,Rn 0110nnnnmmmm1000
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SWAP.W Rm,Rn 0110nnnnmmmm1001
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XTRCT Rm,Rn 0010nnnnmmmm1101
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ADD_r Rm,Rn 0011nnnnmmmm1100
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ADD_i #imm,Rn 0111nnnniiiiiiii
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ADDC Rm,Rn 0011nnnnmmmm1110
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ADDV Rm,Rn 0011nnnnmmmm1111
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CMP/EQ #imm,R0 10001000iiiiiiii
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CMP/EQ Rm,Rn 0011nnnnmmmm0000
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CMP/HS Rm,Rn 0011nnnnmmmm0010
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CMP/GE Rm,Rn 0011nnnnmmmm0011
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CMP/HI Rm,Rn 0011nnnnmmmm0110
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CMP/GT Rm,Rn 0011nnnnmmmm0111
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CMP/PZ Rn 0100nnnn00010001
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CMP/PL Rn 0100nnnn00010101
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CMP/STR Rm,Rn 0010nnnnmmmm1100
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DIV1 Rm,Rn 0011nnnnmmmm0100
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DIV0S Rm,Rn 0010nnnnmmmm0111
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DIV0U 0000000000011001
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DMULS.L Rm,Rn 0011nnnnmmmm1101
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DMULU.L Rm,Rn 0011nnnnmmmm0101
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DT Rn 0100nnnn00010000
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EXTS.B Rm,Rn 0110nnnnmmmm1110
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EXTS.W Rm,Rn 0110nnnnmmmm1111
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EXTU.B Rm,Rn 0110nnnnmmmm1100
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EXTU.W Rm,Rn 0110nnnnmmmm1101
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MAC.L @Rm+,@Rn+ 0000nnnnmmmm1111
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MAC.W @Rm+,@Rn+ 0100nnnnmmmm1111
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MUL.L Rm,Rn 0000nnnnmmmm0111
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MULS.W Rm,Rn 0010nnnnmmmm1111
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MULU.W Rm,Rn 0010nnnnmmmm1110
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NEG Rm,Rn 0110nnnnmmmm1011
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NEGC Rm,Rn 0110nnnnmmmm1010
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SUB Rm,Rn 0011nnnnmmmm1000
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SUBC Rm,Rn 0011nnnnmmmm1010
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SUBV Rm,Rn 0011nnnnmmmm1011
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AND Rm,Rn 0010nnnnmmmm1001
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AND_i #imm,R0 11001001iiiiiiii
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AND.B #imm,@(R0,GBR) 11001101iiiiiiii
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NOT Rm,Rn 0110nnnnmmmm0111
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OR Rm,Rn 0010nnnnmmmm1011
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OR_i #imm,R0 11001011iiiiiiii
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OR.B #imm,@(R0,GBR) 11001111iiiiiiii
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TAS.B @Rn 0100nnnn00011011
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TST Rm,Rn 0010nnnnmmmm1000
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TST_i #imm,R0 11001000iiiiiiii
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TST.B #imm,@(R0,GBR) 11001100iiiiiiii
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XOR Rm,Rn 0010nnnnmmmm1010
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XOR_i #imm,R0 11001010iiiiiiii
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XOR.B #imm,@(R0,GBR) 11001110iiiiiiii
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ROTL Rn 0100nnnn00000100
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ROTR Rn 0100nnnn00000101
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ROTCL Rn 0100nnnn00100100
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ROTCR Rn 0100nnnn00100101
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SHAD Rm,Rn 0100nnnnmmmm1100
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SHAL Rn 0100nnnn00100000
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SHAR Rn 0100nnnn00100001
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SHLD Rm,Rn 0100nnnnmmmm1101
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SHLL Rn 0100nnnn00000000
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SHLR Rn 0100nnnn00000001
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SHLL2 Rn 0100nnnn00001000
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SHLR2 Rn 0100nnnn00001001
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SHLL8 Rn 0100nnnn00011000
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SHLR8 Rn 0100nnnn00011001
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SHLL16 Rn 0100nnnn00101000
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SHLR16 Rn 0100nnnn00101001
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BF label 10001011dddddddd
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BF/S label 10001111dddddddd
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BT label 10001001dddddddd
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BT/S label 10001101dddddddd
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BRA label 1010dddddddddddd
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BRAF Rn 0000nnnn00100011
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BSR label 1011dddddddddddd
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BSRF Rn 0000nnnn00000011
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JMP @Rn 0100nnnn00101011
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JSR @Rn 0100nnnn00001011
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RTS 0000000000001011
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CLRMAC 0000000000101000
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CLRS 0000000001001000
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CLRT 0000000000001000
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ICBI @Rn 0000nnnn11100011
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LDC Rm,SR 0100mmmm00001110
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LDC Rm,GBR 0100mmmm00011110
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LDC Rm,VBR 0100mmmm00101110
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LDC Rm,SGR 0100mmmm00111010
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LDC Rm,SSR 0100mmmm00111110
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LDC Rm,SPC 0100mmmm01001110
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LDC Rm,DBR 0100mmmm11111010
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LDC Rm,Rn_BANK 0100mmmm1nnn1110
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LDC.L @Rm+,SR 0100mmmm00000111
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LDC.L @Rm+,GBR 0100mmmm00010111
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LDC.L @Rm+,VBR 0100mmmm00100111
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LDC.L @Rm+,SGR 0100mmmm00110110
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LDC.L @Rm+,SSR 0100mmmm00110111
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LDC.L @Rm+,SPC 0100mmmm01000111
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LDC.L @Rm+,DBR 0100mmmm11110110
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LDC.L @Rm+,Rn_BANK 0100mmmm1nnn0111
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LDS Rm,MACH 0100mmmm00001010
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LDS Rm,MACL 0100mmmm00011010
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LDS Rm,PR 0100mmmm00101010
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LDS.L @Rm+,MACH 0100mmmm00000110
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LDS.L @Rm+,MACL 0100mmmm00010110
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LDS.L @Rm+,PR 0100mmmm00100110
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LDTLB 0000000000111000
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MOVCA.L R0,@Rn 0000nnnn11000011
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NOP 0000000000001001
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OCBI @Rn 0000nnnn10010011
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OCBP @Rn 0000nnnn10100011
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OCBWB @Rn 0000nnnn10110011
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PREF @Rn 0000nnnn10000011
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PREFI @Rn 0000nnnn11010011
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RTE 0000000000101011
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SETS 0000000001011000
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SETT 0000000000011000
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SLEEP 0000000000011011
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STC SR,Rn 0000nnnn00000010
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STC GBR,Rn 0000nnnn00010010
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STC VBR,Rn 0000nnnn00100010
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STC SSR,Rn 0000nnnn00110010
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STC SPC,Rn 0000nnnn01000010
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STC SGR,Rn 0000nnnn00111010
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STC DBR,Rn 0000nnnn11111010
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STC Rm_BANK,Rn 0000nnnn1mmm0010
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STC.L SR,@-Rn 0100nnnn00000011
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STC.L GBR,@-Rn 0100nnnn00010011
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STC.L VBR,@-Rn 0100nnnn00100011
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STC.L SSR,@-Rn 0100nnnn00110011
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STC.L SPC,@-Rn 0100nnnn01000011
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STC.L SGR,@-Rn 0100nnnn00110010
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STC.L DBR,@-Rn 0100nnnn11110010
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STC.L Rm_BANK,@-Rn 0100nnnn1mmm0011
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STS MACH,Rn 0000nnnn00001010
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STS MACL,Rn 0000nnnn00011010
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STS PR,Rn 0000nnnn00101010
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STS.L MACH,@-Rn 0100nnnn00000010
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STS.L MACL,@-Rn 0100nnnn00010010
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STS.L PR,@-Rn 0100nnnn00100010
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SYNCO 0000000010101011
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TRAPA #imm 11000011iiiiiiii
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FLDI0 FRn 1111nnnn10001101
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FLDI1 FRn 1111nnnn10011101
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FMOV FRm,FRn 1111nnnnmmmm1100
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FMOV.S @Rm,FRn 1111nnnnmmmm1000
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FMOV.S @(R0,Rm),FRn 1111nnnnmmmm0110
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FMOV.S @Rm+,FRn 1111nnnnmmmm1001
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FMOV.S FRm,@Rn 1111nnnnmmmm1010
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FMOV.S FRm,@-Rn 1111nnnnmmmm1011
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FMOV.S FRm,@(R0,Rn) 1111nnnnmmmm0111
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FMOV DRm,DRn 1111nnn0mmm01100
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FMOV @Rm,DRn 1111nnn0mmmm1000
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FMOV @(R0,Rm),DRn 1111nnn0mmmm0110
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FMOV @Rm+,DRn 1111nnn0mmmm1001
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FMOV DRm,@Rn 1111nnnnmmm01010
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FMOV DRm,@-Rn 1111nnnnmmm01011
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FMOV DRm,@(R0,Rn) 1111nnnnmmm00111
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FLDS FRm,FPUL 1111mmmm00011101
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FSTS FPUL,FRn 1111nnnn00001101
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FABS FRn 1111nnnn01011101
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FADD FRm,FRn 1111nnnnmmmm0000
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FCMP/EQ FRm,FRn 1111nnnnmmmm0100
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FCMP/GT FRm,FRn 1111nnnnmmmm0101
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FDIV FRm,FRn 1111nnnnmmmm0011
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FLOAT FPUL,FRn 1111nnnn00101101
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FMAC FR0,FRm,FRn 1111nnnnmmmm1110
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FMUL FRm,FRn 1111nnnnmmmm0010
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FNEG FRn 1111nnnn01001101
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FSQRT FRn 1111nnnn01101101
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FSUB FRm,FRn 1111nnnnmmmm0001
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FTRC FRm,FPUL 1111mmmm00111101
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FABS DRn 1111nnn001011101
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FADD DRm,DRn 1111nnn0mmm00000
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FCMP/EQ DRm,DRn 1111nnn0mmm00100
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FCMP/GT DRm,DRn 1111nnn0mmm00101
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FDIV DRm,DRn 1111nnn0mmm00011
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FCNVDS DRm,FPUL 1111mmm010111101
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FCNVSD FPUL,DRn 1111nnn010101101
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FLOAT FPUL,DRn 1111nnn000101101
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FMUL DRm,DRn 1111nnn0mmm00010
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FNEG DRn 1111nnn001001101
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FSQRT DRn 1111nnn001101101
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FSUB DRm,DRn 1111nnn0mmm00001
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FTRC DRm,FPUL 1111mmm000111101
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LDS Rm,FPSCR 0100mmmm01101010
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LDS Rm,FPUL 0100mmmm01011010
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LDS.L @Rm+,FPSCR 0100mmmm01100110
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LDS.L @Rm+,FPUL 0100mmmm01010110
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STS FPSCR,Rn 0000nnnn01101010
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STS FPUL,Rn 0000nnnn01011010
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STS.L FPSCR,@-Rn 0100nnnn01100010
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STS.L FPUL,@-Rn 0100nnnn01010010
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FMOV DRm,XDn 1111nnn1mmm01100
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FMOV XDm,DRn 1111nnn0mmm11100
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FMOV XDm,XDn 1111nnn1mmm11100
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FMOV @Rm,XDn 1111nnn1mmmm1000
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FMOV @Rm+,XDn 1111nnn1mmmm1001
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FMOV @(R0,Rm),XDn 1111nnn1mmmm0110
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FMOV XDm,@Rn 1111nnnnmmm11010
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FMOV XDm,@-Rn 1111nnnnmmm11011
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FMOV XDm,@(R0,Rn) 1111nnnnmmm10111
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FIPR FVm,FVn 1111nnmm11101101
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FTRV XMTRX,FVn 1111nn0111111101
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FRCHG 1111101111111101
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FSCHG 1111001111111101
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FPCHG 1111011111111101
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FSRRA FRn 1111nnnn01111101
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FSCA FPUL,DRn 1111nnn011111101
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MOV.B R0,@Rn+ 0100nnnn10001011
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MOV.W R0,@Rn+ 0100nnnn10011011
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MOV.L R0,@Rn+ 0100nnnn10101011
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MOV.B @-Rm,R0 0100mmmm11001011
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MOV.W @-Rm,R0 0100mmmm11011011
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MOV.L @-Rm,R0 0100mmmm11101011
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MOV.B Rm,@(disp12,Rn) 0011nnnnmmmm00010000dddddddddddd
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MOV.W Rm,@(disp12,Rn) 0011nnnnmmmm00010001dddddddddddd
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MOV.L Rm,@(disp12,Rn) 0011nnnnmmmm00010010dddddddddddd
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MOV.B @(disp12,Rm),Rn 0011nnnnmmmm00010100dddddddddddd
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MOV.W @(disp12,Rm),Rn 0011nnnnmmmm00010101dddddddddddd
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MOV.L @(disp12,Rm),Rn 0011nnnnmmmm00010110dddddddddddd
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MOVI20 #imm20,Rn 0000nnnniiii0000iiiiiiiiiiiiiiii
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MOVI20S #imm20,Rn 0000nnnniiii0001iiiiiiiiiiiiiiii
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MOVML.L Rm,@-R15 0100mmmm11110001
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MOVML.L @R15+,Rn 0100nnnn11110101
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MOVMU.L Rm,@-R15 0100mmmm11110000
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MOVMU.L @R15+,Rn 0100nnnn11110100
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MOVRT Rn 0000nnnn00111001
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MOVU.B @(disp12,Rm),Rn 0011nnnnmmmm00011000dddddddddddd
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MOVU.W @(disp12,Rm),Rn 0011nnnnmmmm00011001dddddddddddd
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NOTT 0000000001101000
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CLIPS.B Rn 0100nnnn10010001
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CLIPS.W Rn 0100nnnn10010101
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CLIPU.B Rn 0100nnnn10000001
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CLIPU.W Rn 0100nnnn10000101
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DIVS R0,Rn 0100nnnn10010100
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DIVU R0,Rn 0100nnnn10000100
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MULR R0,Rn 0100nnnn10000000
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JSR/N @Rm 0100mmmm01001011
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JSR/N @@(disp8,TBR) 10000011dddddddd
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RTS/N 0000000001101011
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RTV/N Rm 0000mmmm01111011
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LDBANK @Rm,R0 0100mmmm11100101
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LDC Rm,TBR 0100mmmm01001010
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RESBANK 0000000001011011
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STBANK R0,@Rn 0100nnnn11100001
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STC TBR,Rn 0000nnnn01001010
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FMOV.S @(disp12,Rm),FRn 0011nnnnmmmm00010111dddddddddddd
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FMOV.D @(disp12,Rm),DRn 0011nnn0mmmm00010111dddddddddddd
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FMOV.S FRm,@(disp12,Rn) 0011nnnnmmmm00010011dddddddddddd
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FMOV.D DRm,@(disp12,Rn) 0011nnnnmmm000010011dddddddddddd
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FMOV.S FRm,@(disp12,Rn) 0011nnnnmmmm00010011dddddddddddd
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FMOV.D DRm,@(disp12,Rn) 0011nnnnmmm000010011dddddddddddd
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BAND.B #imm3,@(disp12,Rn) 0011nnnn0iii10010100dddddddddddd
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BANDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii10011100dddddddddddd
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BCLR.B #imm3,@(disp12,Rn) 0011nnnn0iii10010000dddddddddddd
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BCLR #imm3,Rn 10000110nnnn0iii
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BLD.B #imm3,@(disp12,Rn) 0011nnnn0iii10010011dddddddddddd
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BLD #imm3,Rn 10000111nnnn1iii
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BLDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii10011011dddddddddddd
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BOR.B #imm3,@(disp12,Rn) 0011nnnn0iii10010101dddddddddddd
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BORNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii10011101dddddddddddd
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BSET.B #imm3,@(disp12,Rn) 0011nnnn0iii10010001dddddddddddd
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BSET #imm3,Rn 10000110nnnn1iii
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BST.B #imm3,@(disp12,Rn) 0011nnnn0iii10010010dddddddddddd
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BST #imm3,Rn 10000111nnnn0iii
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BXOR.B #imm3,@(disp12,Rn) 0011nnnn0iii10010110dddddddddddd
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LDRE @(disp,PC) 10001110dddddddd
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LDRS @(disp,PC) 10001100dddddddd
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SETRC Rm 0100mmmm00010100
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SETRC #imm 10000010iiiiiiii
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LDRC #imm 10001010iiiiiiii
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EOF
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code_list.each_line { |line|
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l = line.split
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l[2] = l[1] if (l.length < 3)
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if l[2].length > 16 then
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l[2] = l[2][0..15]
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end
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if l[2][0..3].to_i(2) < 8 || l[2][0..3].to_i(2) == 15 then
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b = l[2][0..3] + l[2][12..15]
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else
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b = l[2][0..7]
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end
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if b =~ /^\d+$/ then
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no = b.to_i(2)
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if no == 0x00 || no == 0x01 || no == 0x31 || no == 0x39 then
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# SH2A 32bit instructions prefix
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next
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end
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next if out[no] == "op" + l[0]
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if (no >= 0x20 && no <= 0x22) || (no >= 0x60 && no <= 0x62)then
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l[0] = "MOV_rind"
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end
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if no >= 0x24 && no <= 0x26 then
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l[0] = "MOV_rpd"
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end
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if no >= 0x64 && no <= 0x66 then
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l[0] = "MOV_rpi"
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end
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if no == 0x80 || no == 0x81 || no == 0x84 || no == 0x85 then
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l[0] = "MOV_BW_dsp"
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end
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if no == 0x88 then
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l[0] = "CMP_EQi"
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end
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if no == 0xc0 || no == 0xc1 || no == 0xc2 || no == 0xc4 || no == 0xc5 || no == 0xc6 then
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l[0] = "MOV_gbr"
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end
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if out[no] == "NULL" then
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out[no] = "op" + l[0]
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else
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hi = b.to_i(2) / 16
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lo = b.to_i(2) % 16
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if (hi < 0x8) || (hi >= 0x0f) then
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out[no] = "op" + hi.to_s(16) + "xx" + lo.to_s(16)
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else
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out[no] = "op" + hi.to_s(16) + lo.to_s(16) + "xx"
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end
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end
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else
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n = (l[2][0..3].to_i(2)) * 16
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if n != 0x80 && n != 0xc0 then
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if n == 0x10 || n == 0x50 then
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l[0] = "MOV_L_dsp"
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end
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if n == 0x90 || n == 0xd0 then
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l[0] = "MOV_pc"
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end
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16.times { |i|
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out[n + i] = "op" + l[0]
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}
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end
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end
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}
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code = 0
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print "bool (*decode[])(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode, sh_info *info, cs_detail *detail) = {\n"
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(256 / 8).times { |i|
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bit = "0000000" + code.to_s(2)
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print "\t/// ", bit[-8,8], "\n\t"
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8.times { |j|
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o = out[i * 8 + j].gsub(/[\.\/]/, '_')
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print o, ", "
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code = code.succ
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}
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print "\n"
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}
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print "};\n"
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