Files
kaizen/external/capstone/arch/SystemZ/SystemZMapping.c
T
iris 00cc9309cb Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd
de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
2026-06-15 11:56:38 +02:00

369 lines
11 KiB
C

/* Capstone Disassembly Engine */
/* By Rot127 <unisono@quyllur.org> 2022-2023 */
#ifdef CAPSTONE_HAS_SYSTEMZ
#include <stdio.h> // debug
#include <string.h>
#include "../../Mapping.h"
#include "../../utils.h"
#include "../../cs_simple_types.h"
#include <capstone/cs_operand.h>
#include "SystemZMCTargetDesc.h"
#include "SystemZMapping.h"
#include "SystemZLinkage.h"
#ifndef CAPSTONE_DIET
static const char *const insn_name_maps[] = {
#include "SystemZGenCSMappingInsnName.inc"
};
static const name_map insn_alias_mnem_map[] = {
#include "SystemZGenCSAliasMnemMap.inc"
{ SYSTEMZ_INS_ALIAS_END, NULL },
};
static const map_insn_ops insn_operands[] = {
#include "SystemZGenCSMappingInsnOp.inc"
};
#endif
#define GET_REGINFO_MC_DESC
#include "SystemZGenRegisterInfo.inc"
const insn_map systemz_insns[] = {
#include "SystemZGenCSMappingInsn.inc"
};
void SystemZ_set_instr_map_data(MCInst *MI, const uint8_t *Bytes, size_t BytesLen)
{
map_cs_id(MI, systemz_insns, ARR_SIZE(systemz_insns));
map_implicit_reads(MI, systemz_insns);
map_implicit_writes(MI, systemz_insns);
map_groups(MI, systemz_insns);
const systemz_suppl_info *suppl_info =
map_get_suppl_info(MI, systemz_insns);
if (suppl_info) {
SystemZ_get_detail(MI)->format = suppl_info->form;
}
}
void SystemZ_init_mri(MCRegisterInfo *MRI)
{
MCRegisterInfo_InitMCRegisterInfo(
MRI, SystemZRegDesc, AARCH64_REG_ENDING, 0, 0,
SystemZMCRegisterClasses, ARR_SIZE(SystemZMCRegisterClasses), 0,
0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists,
ARR_SIZE(SystemZSubRegIdxLists), 0);
}
const char *SystemZ_reg_name(csh handle, unsigned int reg)
{
return SystemZ_LLVM_getRegisterName(reg);
}
void SystemZ_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
{
MI->MRI = (MCRegisterInfo *)info;
MI->fillDetailOps = detail_is_set(MI);
SystemZ_LLVM_printInstruction(MI, "", O);
#ifndef CAPSTONE_DIET
map_set_alias_id(MI, O, insn_alias_mnem_map,
ARR_SIZE(insn_alias_mnem_map));
#endif
}
void SystemZ_init_cs_detail(MCInst *MI) {
if (!detail_is_set(MI)) {
return;
}
memset(get_detail(MI), 0, sizeof(cs_detail));
if (detail_is_set(MI)) {
SystemZ_get_detail(MI)->cc = SYSTEMZ_CC_INVALID;
}
}
bool SystemZ_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
MCInst *MI, uint16_t *size, uint64_t address,
void *info)
{
SystemZ_init_cs_detail(MI);
MI->MRI = (MCRegisterInfo *)info;
DecodeStatus Result = SystemZ_LLVM_getInstruction(
handle, bytes, bytes_len, MI, size, address, info);
SystemZ_set_instr_map_data(MI, bytes, bytes_len);
if (Result == MCDisassembler_SoftFail) {
MCInst_setSoftFail(MI);
}
return Result != MCDisassembler_Fail;
}
// given internal insn id, return public instruction info
void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
{
// We do this after Instruction disassembly.
}
const char *SystemZ_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id < SYSTEMZ_INS_ALIAS_END && id > SYSTEMZ_INS_ALIAS_BEGIN) {
if (id - SYSTEMZ_INS_ALIAS_BEGIN >=
ARR_SIZE(insn_alias_mnem_map))
return NULL;
return insn_alias_mnem_map[id - SYSTEMZ_INS_ALIAS_BEGIN - 1]
.name;
}
if (id >= SYSTEMZ_INS_ENDING)
return NULL;
if (id < ARR_SIZE(insn_name_maps))
return insn_name_maps[id];
// not found
return NULL;
#else
return NULL;
#endif
}
#ifndef CAPSTONE_DIET
static const name_map group_name_maps[] = {
// generic groups
{ SYSTEMZ_GRP_INVALID, NULL },
{ SYSTEMZ_GRP_JUMP, "jump" },
{ SYSTEMZ_GRP_CALL, "call" },
{ SYSTEMZ_GRP_RET, "return" },
{ SYSTEMZ_GRP_INT, "int" },
{ SYSTEMZ_GRP_IRET, "iret" },
{ SYSTEMZ_GRP_PRIVILEGE, "privilege" },
{ SYSTEMZ_GRP_BRANCH_RELATIVE, "branch_relative" },
#include "SystemZGenCSFeatureName.inc"
};
#endif
const char *SystemZ_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
#else
return NULL;
#endif
}
void SystemZ_add_cs_detail(MCInst *MI, int /* aarch64_op_group */ op_group,
va_list args)
{
#ifndef CAPSTONE_DIET
if (!detail_is_set(MI) || !map_fill_detail_ops(MI))
return;
unsigned op_num = va_arg(args, unsigned);
switch (op_group) {
default:
printf("Operand group %d not handled\n", op_group);
break;
case SystemZ_OP_GROUP_Operand: {
cs_op_type secondary_op_type = map_get_op_type(MI, op_num) &
~(CS_OP_MEM | CS_OP_BOUND);
if (secondary_op_type == CS_OP_IMM) {
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 0);
} else if (secondary_op_type == CS_OP_REG) {
SystemZ_set_detail_op_reg(MI, op_num,
MCInst_getOpVal(MI, op_num));
} else {
CS_ASSERT_RET(0 && "Op type not handled.");
}
break;
}
case SystemZ_OP_GROUP_Cond4Operand: {
systemz_cc cc = MCInst_getOpVal(MI, op_num);
SystemZ_get_detail(MI)->cc = cc;
break;
}
case SystemZ_OP_GROUP_BDAddrOperand:
CS_ASSERT_RET(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT_RET(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT_RET(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT_RET(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
0,
0,
SYSTEMZ_AM_BD
);
break;
case SystemZ_OP_GROUP_BDVAddrOperand:
case SystemZ_OP_GROUP_BDXAddrOperand: {
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
0,
MCInst_getOpVal(MI, (op_num + 2)),
(op_group == SystemZ_OP_GROUP_BDXAddrOperand ? SYSTEMZ_AM_BDX : SYSTEMZ_AM_BDV)
);
break;
}
case SystemZ_OP_GROUP_BDLAddrOperand:
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
MCInst_getOpVal(MI, (op_num + 2)),
0,
SYSTEMZ_AM_BDL
);
break;
case SystemZ_OP_GROUP_BDRAddrOperand:
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
MCInst_getOpVal(MI, (op_num + 2)),
0,
SYSTEMZ_AM_BDL
);
break;
case SystemZ_OP_GROUP_PCRelOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 0);
break;
case SystemZ_OP_GROUP_U1ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 1);
break;
case SystemZ_OP_GROUP_U2ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 2);
break;
case SystemZ_OP_GROUP_U3ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 3);
break;
case SystemZ_OP_GROUP_U4ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 4);
break;
case SystemZ_OP_GROUP_U8ImmOperand:
case SystemZ_OP_GROUP_S8ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 8);
break;
case SystemZ_OP_GROUP_U12ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 12);
break;
case SystemZ_OP_GROUP_U16ImmOperand:
case SystemZ_OP_GROUP_S16ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 16);
break;
case SystemZ_OP_GROUP_U32ImmOperand:
case SystemZ_OP_GROUP_S32ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 32);
break;
case SystemZ_OP_GROUP_U48ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 48);
break;
}
#endif
}
#ifndef CAPSTONE_DIET
void SystemZ_set_detail_op_imm(MCInst *MI, unsigned op_num, int64_t Imm, size_t width)
{
if (!detail_is_set(MI))
return;
CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_IMM);
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
SystemZ_get_detail_op(MI, 0)->imm = Imm;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_get_detail_op(MI, 0)->imm_width = width;
SystemZ_inc_op_count(MI);
}
void SystemZ_set_detail_op_reg(MCInst *MI, unsigned op_num, systemz_reg Reg)
{
if (!detail_is_set(MI))
return;
CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_REG);
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_REG;
SystemZ_get_detail_op(MI, 0)->reg = Reg;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_inc_op_count(MI);
}
void SystemZ_set_detail_op_mem(MCInst *MI, unsigned op_num, systemz_reg base, int64_t disp, uint64_t length, systemz_reg index, systemz_addr_mode am)
{
if (!detail_is_set(MI))
return;
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_MEM;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_get_detail_op(MI, 0)->mem.am = am;
switch(am) {
default:
CS_ASSERT(0 && "Address mode not handled\n");
break;
case SYSTEMZ_AM_BD:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
break;
case SYSTEMZ_AM_BDX:
case SYSTEMZ_AM_BDV:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.index = index;
break;
case SYSTEMZ_AM_BDL:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.length = length;
break;
case SYSTEMZ_AM_BDR:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.length = length;
break;
}
SystemZ_inc_op_count(MI);
}
#endif
#endif