00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
247 lines
8.4 KiB
C
247 lines
8.4 KiB
C
/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include "capstone/aarch64.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <capstone/capstone.h>
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#include "cstool.h"
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void print_insn_detail_aarch64(csh handle, cs_insn *ins)
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{
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cs_aarch64 *aarch64;
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int i;
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cs_regs regs_read, regs_write;
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uint8_t regs_read_count, regs_write_count;
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uint8_t access;
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// detail can be NULL if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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aarch64 = &(ins->detail->aarch64);
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if (aarch64->op_count)
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printf("\top_count: %u\n", aarch64->op_count);
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for (i = 0; i < aarch64->op_count; i++) {
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cs_aarch64_op *op = &(aarch64->operands[i]);
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switch(op->type) {
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default:
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printf("\t\tOperand type %" PRId32 " not handled\n", op->type);
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break;
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case AARCH64_OP_REG:
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printf("\t\toperands[%u].type: REG = %s%s\n", i, cs_reg_name(handle, op->reg), op->is_vreg ? " (vreg)" : "");
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if (op->is_list_member) {
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printf("\t\toperands[%u].is_list_member: true\n", i);
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}
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break;
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case AARCH64_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
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break;
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case AARCH64_OP_FP:
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#if defined(_KERNEL_MODE)
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// Issue #681: Windows kernel does not support formatting float point
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printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
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#else
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printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
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#endif
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break;
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case AARCH64_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.base != AARCH64_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
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if (op->mem.index != AARCH64_REG_INVALID)
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printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
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if (op->mem.disp != 0 || op->mem.base == AARCH64_REG_INVALID)
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printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
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if (ins->detail->aarch64.post_index)
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printf("\t\t\tpost-indexed: true\n");
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break;
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case AARCH64_OP_SME:
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printf("\t\toperands[%u].type: SME_MATRIX\n", i);
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printf("\t\toperands[%u].sme.type: %d\n", i, op->sme.type);
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if (op->sme.tile != AARCH64_REG_INVALID)
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printf("\t\toperands[%u].sme.tile: %s\n", i, cs_reg_name(handle, op->sme.tile));
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if (op->sme.slice_reg != AARCH64_REG_INVALID)
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printf("\t\toperands[%u].sme.slice_reg: %s\n", i, cs_reg_name(handle, op->sme.slice_reg));
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if (op->sme.slice_offset.imm != AARCH64_SLICE_IMM_INVALID || op->sme.slice_offset.imm_range.first != AARCH64_SLICE_IMM_RANGE_INVALID) {
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printf("\t\toperands[%u].sme.slice_offset: ", i);
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if (op->sme.has_range_offset)
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printf("%hhd:%hhd\n", op->sme.slice_offset.imm_range.first, op->sme.slice_offset.imm_range.offset);
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else
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printf("%d\n", op->sme.slice_offset.imm);
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}
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if (op->sme.slice_reg != AARCH64_REG_INVALID || op->sme.slice_offset.imm != AARCH64_SLICE_IMM_INVALID)
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printf("\t\toperands[%u].sme.is_vertical: %s\n", i, (op->sme.is_vertical ? "true" : "false"));
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break;
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case AARCH64_OP_PRED:
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printf("\t\toperands[%u].type: PREDICATE\n", i);
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if (op->pred.reg != AARCH64_REG_INVALID)
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printf("\t\toperands[%u].pred.reg: %s\n", i, cs_reg_name(handle, op->pred.reg));
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if (op->pred.vec_select != AARCH64_REG_INVALID)
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printf("\t\toperands[%u].pred.vec_select: %s\n", i, cs_reg_name(handle, op->pred.vec_select));
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if (op->pred.imm_index != -1)
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printf("\t\toperands[%u].pred.imm_index: %d\n", i, op->pred.imm_index);
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break;
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case AARCH64_OP_CIMM:
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printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
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break;
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case AARCH64_OP_SYSREG:
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printf("\t\toperands[%u].type: SYS REG:\n", i);
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switch (op->sysop.sub_type) {
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default:
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printf("Sub type %d not handled.\n", op->sysop.sub_type);
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break;
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case AARCH64_OP_REG_MRS:
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printf("\t\toperands[%u].subtype: REG_MRS = 0x%x\n", i, op->sysop.reg.sysreg);
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break;
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case AARCH64_OP_REG_MSR:
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printf("\t\toperands[%u].subtype: REG_MSR = 0x%x\n", i, op->sysop.reg.sysreg);
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break;
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case AARCH64_OP_TLBI:
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printf("\t\toperands[%u].subtype TLBI = 0x%x\n", i, op->sysop.reg.tlbi);
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break;
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case AARCH64_OP_IC:
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printf("\t\toperands[%u].subtype IC = 0x%x\n", i, op->sysop.reg.ic);
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break;
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}
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break;
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case AARCH64_OP_SYSALIAS:
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printf("\t\toperands[%u].type: SYS ALIAS:\n", i);
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switch (op->sysop.sub_type) {
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default:
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printf("Sub type %d not handled.\n", op->sysop.sub_type);
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break;
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case AARCH64_OP_SVCR:
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if(op->sysop.alias.svcr == AARCH64_SVCR_SVCRSM)
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printf("\t\t\toperands[%u].svcr: BIT = SM\n", i);
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else if(op->sysop.alias.svcr == AARCH64_SVCR_SVCRZA)
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printf("\t\t\toperands[%u].svcr: BIT = ZA\n", i);
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else if(op->sysop.alias.svcr == AARCH64_SVCR_SVCRSMZA)
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printf("\t\t\toperands[%u].svcr: BIT = SM & ZA\n", i);
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break;
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case AARCH64_OP_AT:
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printf("\t\toperands[%u].subtype AT = 0x%x\n", i, op->sysop.alias.at);
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break;
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case AARCH64_OP_DB:
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printf("\t\toperands[%u].subtype DB = 0x%x\n", i, op->sysop.alias.db);
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break;
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case AARCH64_OP_DC:
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printf("\t\toperands[%u].subtype DC = 0x%x\n", i, op->sysop.alias.dc);
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break;
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case AARCH64_OP_ISB:
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printf("\t\toperands[%u].subtype ISB = 0x%x\n", i, op->sysop.alias.isb);
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break;
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case AARCH64_OP_TSB:
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printf("\t\toperands[%u].subtype TSB = 0x%x\n", i, op->sysop.alias.tsb);
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break;
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case AARCH64_OP_PRFM:
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printf("\t\toperands[%u].subtype PRFM = 0x%x\n", i, op->sysop.alias.prfm);
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break;
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case AARCH64_OP_SVEPRFM:
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printf("\t\toperands[%u].subtype SVEPRFM = 0x%x\n", i, op->sysop.alias.sveprfm);
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break;
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case AARCH64_OP_RPRFM:
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printf("\t\toperands[%u].subtype RPRFM = 0x%x\n", i, op->sysop.alias.rprfm);
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break;
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case AARCH64_OP_PSTATEIMM0_15:
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printf("\t\toperands[%u].subtype PSTATEIMM0_15 = 0x%x\n", i, op->sysop.alias.pstateimm0_15);
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break;
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case AARCH64_OP_PSTATEIMM0_1:
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printf("\t\toperands[%u].subtype PSTATEIMM0_1 = 0x%x\n", i, op->sysop.alias.pstateimm0_1);
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break;
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case AARCH64_OP_PSB:
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printf("\t\toperands[%u].subtype PSB = 0x%x\n", i, op->sysop.alias.psb);
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break;
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case AARCH64_OP_BTI:
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printf("\t\toperands[%u].subtype BTI = 0x%x\n", i, op->sysop.alias.bti);
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break;
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case AARCH64_OP_SVEPREDPAT:
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printf("\t\toperands[%u].subtype SVEPREDPAT = 0x%x\n", i, op->sysop.alias.svepredpat);
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break;
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case AARCH64_OP_SVEVECLENSPECIFIER:
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printf("\t\toperands[%u].subtype SVEVECLENSPECIFIER = 0x%x\n", i, op->sysop.alias.sveveclenspecifier);
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break;
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}
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break;
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case AARCH64_OP_SYSIMM:
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printf("\t\toperands[%u].type: SYS IMM:\n", i);
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switch(op->sysop.sub_type) {
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default:
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printf("Sub type %d not handled.\n", op->sysop.sub_type);
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break;
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case AARCH64_OP_EXACTFPIMM:
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printf("\t\toperands[%u].subtype EXACTFPIMM = %d\n", i, op->sysop.imm.exactfpimm);
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printf("\t\toperands[%u].fp = %.1f\n", i, op->fp);
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break;
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case AARCH64_OP_DBNXS:
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printf("\t\toperands[%u].subtype DBNXS = %d\n", i, op->sysop.imm.dbnxs);
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break;
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}
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break;
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}
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access = op->access;
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switch(access) {
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default:
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break;
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case CS_AC_READ:
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printf("\t\toperands[%u].access: READ\n", i);
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break;
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case CS_AC_WRITE:
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printf("\t\toperands[%u].access: WRITE\n", i);
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break;
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case CS_AC_READ | CS_AC_WRITE:
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printf("\t\toperands[%u].access: READ | WRITE\n", i);
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break;
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}
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if (op->shift.type != AARCH64_SFT_INVALID &&
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op->shift.value)
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printf("\t\t\tShift: type = %u, value = %u\n",
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op->shift.type, op->shift.value);
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if (op->ext != AARCH64_EXT_INVALID)
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printf("\t\t\tExt: %u\n", op->ext);
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if (op->vas != AARCH64LAYOUT_INVALID)
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printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
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if (op->vector_index != -1)
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printf("\t\t\tVector Index: %u\n", op->vector_index);
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}
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if (aarch64->update_flags)
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printf("\tUpdate-flags: True\n");
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if (ins->detail->writeback)
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printf("\tWrite-back: True\n");
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if (aarch64->cc != AArch64CC_Invalid)
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printf("\tCode-condition: %u\n", aarch64->cc);
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// Print out all registers accessed by this instruction (either implicit or explicit)
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if (!cs_regs_access(handle, ins,
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regs_read, ®s_read_count,
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regs_write, ®s_write_count)) {
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if (regs_read_count) {
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printf("\tRegisters read:");
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for(i = 0; i < regs_read_count; i++) {
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printf(" %s", cs_reg_name(handle, regs_read[i]));
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}
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printf("\n");
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}
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if (regs_write_count) {
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printf("\tRegisters modified:");
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for(i = 0; i < regs_write_count; i++) {
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printf(" %s", cs_reg_name(handle, regs_write[i]));
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}
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printf("\n");
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}
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}
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}
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