00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
351 lines
8.9 KiB
C
351 lines
8.9 KiB
C
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include <stdio.h>
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#include <stdlib.h>
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#include <capstone/capstone.h>
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#include "cstool.h"
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void print_string_hex(const char *comment, unsigned char *str, size_t len);
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static const char *get_eflag_name(uint64_t flag)
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{
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switch(flag) {
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default:
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return NULL;
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case X86_EFLAGS_UNDEFINED_OF:
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return "UNDEF_OF";
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case X86_EFLAGS_UNDEFINED_SF:
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return "UNDEF_SF";
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case X86_EFLAGS_UNDEFINED_ZF:
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return "UNDEF_ZF";
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case X86_EFLAGS_MODIFY_AF:
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return "MOD_AF";
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case X86_EFLAGS_UNDEFINED_PF:
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return "UNDEF_PF";
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case X86_EFLAGS_MODIFY_CF:
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return "MOD_CF";
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case X86_EFLAGS_MODIFY_SF:
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return "MOD_SF";
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case X86_EFLAGS_MODIFY_ZF:
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return "MOD_ZF";
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case X86_EFLAGS_UNDEFINED_AF:
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return "UNDEF_AF";
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case X86_EFLAGS_MODIFY_PF:
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return "MOD_PF";
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case X86_EFLAGS_UNDEFINED_CF:
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return "UNDEF_CF";
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case X86_EFLAGS_MODIFY_OF:
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return "MOD_OF";
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case X86_EFLAGS_RESET_OF:
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return "RESET_OF";
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case X86_EFLAGS_RESET_CF:
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return "RESET_CF";
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case X86_EFLAGS_RESET_DF:
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return "RESET_DF";
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case X86_EFLAGS_RESET_IF:
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return "RESET_IF";
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case X86_EFLAGS_RESET_ZF:
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return "RESET_ZF";
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case X86_EFLAGS_TEST_OF:
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return "TEST_OF";
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case X86_EFLAGS_TEST_SF:
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return "TEST_SF";
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case X86_EFLAGS_TEST_ZF:
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return "TEST_ZF";
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case X86_EFLAGS_TEST_PF:
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return "TEST_PF";
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case X86_EFLAGS_TEST_CF:
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return "TEST_CF";
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case X86_EFLAGS_RESET_SF:
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return "RESET_SF";
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case X86_EFLAGS_RESET_AF:
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return "RESET_AF";
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case X86_EFLAGS_RESET_TF:
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return "RESET_TF";
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case X86_EFLAGS_RESET_NT:
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return "RESET_NT";
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case X86_EFLAGS_PRIOR_OF:
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return "PRIOR_OF";
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case X86_EFLAGS_PRIOR_SF:
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return "PRIOR_SF";
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case X86_EFLAGS_PRIOR_ZF:
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return "PRIOR_ZF";
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case X86_EFLAGS_PRIOR_AF:
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return "PRIOR_AF";
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case X86_EFLAGS_PRIOR_PF:
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return "PRIOR_PF";
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case X86_EFLAGS_PRIOR_CF:
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return "PRIOR_CF";
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case X86_EFLAGS_PRIOR_TF:
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return "PRIOR_TF";
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case X86_EFLAGS_PRIOR_IF:
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return "PRIOR_IF";
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case X86_EFLAGS_PRIOR_DF:
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return "PRIOR_DF";
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case X86_EFLAGS_TEST_NT:
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return "TEST_NT";
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case X86_EFLAGS_TEST_DF:
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return "TEST_DF";
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case X86_EFLAGS_RESET_PF:
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return "RESET_PF";
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case X86_EFLAGS_PRIOR_NT:
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return "PRIOR_NT";
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case X86_EFLAGS_MODIFY_TF:
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return "MOD_TF";
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case X86_EFLAGS_MODIFY_IF:
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return "MOD_IF";
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case X86_EFLAGS_MODIFY_DF:
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return "MOD_DF";
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case X86_EFLAGS_MODIFY_NT:
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return "MOD_NT";
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case X86_EFLAGS_MODIFY_RF:
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return "MOD_RF";
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case X86_EFLAGS_SET_CF:
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return "SET_CF";
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case X86_EFLAGS_SET_DF:
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return "SET_DF";
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case X86_EFLAGS_SET_IF:
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return "SET_IF";
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case X86_EFLAGS_SET_OF:
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return "SET_OF";
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case X86_EFLAGS_SET_SF:
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return "SET_SF";
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case X86_EFLAGS_SET_ZF:
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return "SET_ZF";
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case X86_EFLAGS_SET_AF:
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return "SET_AF";
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case X86_EFLAGS_SET_PF:
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return "SET_PF";
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case X86_EFLAGS_TEST_AF:
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return "TEST_AF";
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case X86_EFLAGS_TEST_TF:
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return "TEST_TF";
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case X86_EFLAGS_TEST_RF:
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return "TEST_RF";
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case X86_EFLAGS_RESET_0F:
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return "RESET_0F";
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case X86_EFLAGS_RESET_AC:
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return "RESET_AC";
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}
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}
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static const char *get_fpu_flag_name(uint64_t flag)
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{
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switch (flag) {
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default:
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return NULL;
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case X86_FPU_FLAGS_MODIFY_C0:
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return "MOD_C0";
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case X86_FPU_FLAGS_MODIFY_C1:
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return "MOD_C1";
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case X86_FPU_FLAGS_MODIFY_C2:
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return "MOD_C2";
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case X86_FPU_FLAGS_MODIFY_C3:
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return "MOD_C3";
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case X86_FPU_FLAGS_RESET_C0:
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return "RESET_C0";
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case X86_FPU_FLAGS_RESET_C1:
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return "RESET_C1";
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case X86_FPU_FLAGS_RESET_C2:
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return "RESET_C2";
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case X86_FPU_FLAGS_RESET_C3:
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return "RESET_C3";
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case X86_FPU_FLAGS_SET_C0:
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return "SET_C0";
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case X86_FPU_FLAGS_SET_C1:
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return "SET_C1";
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case X86_FPU_FLAGS_SET_C2:
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return "SET_C2";
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case X86_FPU_FLAGS_SET_C3:
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return "SET_C3";
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case X86_FPU_FLAGS_UNDEFINED_C0:
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return "UNDEF_C0";
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case X86_FPU_FLAGS_UNDEFINED_C1:
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return "UNDEF_C1";
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case X86_FPU_FLAGS_UNDEFINED_C2:
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return "UNDEF_C2";
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case X86_FPU_FLAGS_UNDEFINED_C3:
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return "UNDEF_C3";
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case X86_FPU_FLAGS_TEST_C0:
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return "TEST_C0";
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case X86_FPU_FLAGS_TEST_C1:
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return "TEST_C1";
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case X86_FPU_FLAGS_TEST_C2:
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return "TEST_C2";
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case X86_FPU_FLAGS_TEST_C3:
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return "TEST_C3";
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}
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}
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void print_insn_detail_x86(csh ud, cs_mode mode, cs_insn *ins)
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{
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int count, i;
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cs_x86 *x86;
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cs_regs regs_read, regs_write;
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uint8_t regs_read_count, regs_write_count;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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x86 = &(ins->detail->x86);
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print_string_hex("\tPrefix:", x86->prefix, 4);
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print_string_hex("\tOpcode:", x86->opcode, 4);
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printf("\trex: 0x%x\n", x86->rex);
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printf("\taddr_size: %u\n", x86->addr_size);
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printf("\tmodrm: 0x%x\n", x86->modrm);
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printf("\tdisp: 0x%" PRIx64 "\n", x86->disp);
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// SIB is not available in 16-bit mode
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if ((mode & CS_MODE_16) == 0) {
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printf("\tsib: 0x%x\n", x86->sib);
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if (x86->sib_base != X86_REG_INVALID)
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printf("\t\tsib_base: %s\n", cs_reg_name(ud, x86->sib_base));
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if (x86->sib_index != X86_REG_INVALID)
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printf("\t\tsib_index: %s\n", cs_reg_name(ud, x86->sib_index));
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if (x86->sib_scale != 0)
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printf("\t\tsib_scale: %d\n", x86->sib_scale);
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}
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// XOP code condition
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if (x86->xop_cc != X86_XOP_CC_INVALID) {
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printf("\txop_cc: %u\n", x86->xop_cc);
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}
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// SSE code condition
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if (x86->sse_cc != X86_SSE_CC_INVALID) {
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printf("\tsse_cc: %u\n", x86->sse_cc);
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}
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// AVX code condition
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if (x86->avx_cc != X86_AVX_CC_INVALID) {
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printf("\tavx_cc: %u\n", x86->avx_cc);
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}
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// AVX Suppress All Exception
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if (x86->avx_sae) {
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printf("\tavx_sae: %u\n", x86->avx_sae);
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}
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// AVX Rounding Mode
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if (x86->avx_rm != X86_AVX_RM_INVALID) {
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printf("\tavx_rm: %u\n", x86->avx_rm);
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}
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// Print out all immediate operands
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count = cs_op_count(ud, ins, X86_OP_IMM);
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if (count > 0) {
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printf("\timm_count: %u\n", count);
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for (i = 1; i < count + 1; i++) {
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int index = cs_op_index(ud, ins, X86_OP_IMM, i);
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if (index < 0) {
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printf("Operand was not found!\n");
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break;
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}
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printf("\t\timms[%u]: 0x%" PRIx64 "\n", i, x86->operands[index].imm);
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}
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}
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if (x86->op_count)
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printf("\top_count: %u\n", x86->op_count);
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// Print out all operands
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for (i = 0; i < x86->op_count; i++) {
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cs_x86_op *op = &(x86->operands[i]);
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switch((int)op->type) {
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case X86_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(ud, op->reg));
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break;
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case X86_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
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break;
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case X86_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.segment != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.segment: REG = %s\n", i, cs_reg_name(ud, op->mem.segment));
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if (op->mem.base != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(ud, op->mem.base));
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if (op->mem.index != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(ud, op->mem.index));
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if (op->mem.scale != 1)
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printf("\t\t\toperands[%u].mem.scale: %u\n", i, op->mem.scale);
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if (op->mem.disp != 0)
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printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp);
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break;
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default:
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break;
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}
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// AVX broadcast type
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if (op->avx_bcast != X86_AVX_BCAST_INVALID)
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printf("\t\toperands[%u].avx_bcast: %u\n", i, op->avx_bcast);
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// AVX zero opmask {z}
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if (op->avx_zero_opmask != false)
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printf("\t\toperands[%u].avx_zero_opmask: TRUE\n", i);
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printf("\t\toperands[%u].size: %u\n", i, op->size);
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switch(op->access) {
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default:
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break;
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case CS_AC_READ:
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printf("\t\toperands[%u].access: READ\n", i);
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break;
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case CS_AC_WRITE:
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printf("\t\toperands[%u].access: WRITE\n", i);
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break;
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case CS_AC_READ | CS_AC_WRITE:
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printf("\t\toperands[%u].access: READ | WRITE\n", i);
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break;
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}
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}
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// Print out all registers accessed by this instruction (either implicit or explicit)
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if (!cs_regs_access(ud, ins,
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regs_read, ®s_read_count,
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regs_write, ®s_write_count)) {
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if (regs_read_count) {
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printf("\tRegisters read:");
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for(i = 0; i < regs_read_count; i++) {
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printf(" %s", cs_reg_name(ud, regs_read[i]));
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}
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printf("\n");
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}
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if (regs_write_count) {
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printf("\tRegisters modified:");
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for(i = 0; i < regs_write_count; i++) {
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printf(" %s", cs_reg_name(ud, regs_write[i]));
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}
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printf("\n");
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}
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}
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if (x86->eflags || x86->fpu_flags) {
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for(i = 0; i < ins->detail->groups_count; i++) {
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if (ins->detail->groups[i] == X86_GRP_FPU) {
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printf("\tFPU_FLAGS:");
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for(i = 0; i <= 63; i++)
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if (x86->fpu_flags & ((uint64_t)1 << i)) {
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printf(" %s", get_fpu_flag_name((uint64_t)1 << i));
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}
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printf("\n");
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break;
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}
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}
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if (i == ins->detail->groups_count) {
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printf("\tEFLAGS:");
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for(i = 0; i <= 63; i++)
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if (x86->eflags & ((uint64_t)1 << i)) {
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printf(" %s", get_eflag_name((uint64_t)1 << i));
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}
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printf("\n");
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}
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}
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}
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