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00cc9309cb3a9e41afe5def8dcb9bf5b089b9a21
kaizen/external/capstone/suite/MC/AArch64/armv8.9a-the.txt.cs
T
iris 00cc9309cb Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd 
de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
2026-06-15 11:56:38 +02:00

135 lines
6.1 KiB
C#
Raw Blame History

# CS_ARCH_AARCH64, 0, None
0xc3,0xd0,0x38,0xd5 == mrs x3, RCWMASK_EL1
0xc1,0xd0,0x18,0xd5 == msr RCWMASK_EL1, x1
0x63,0xd0,0x38,0xd5 == mrs x3, RCWSMASK_EL1
0x61,0xd0,0x18,0xd5 == msr RCWSMASK_EL1, x1
0x81,0x08,0x20,0x19 == rcwcas x0, x1, [x4]
0x81,0x08,0xa0,0x19 == rcwcasa x0, x1, [x4]
0x81,0x08,0xe0,0x19 == rcwcasal x0, x1, [x4]
0x81,0x08,0x60,0x19 == rcwcasl x0, x1, [x4]
0xe5,0x0b,0x23,0x19 == rcwcas x3, x5, [sp]
0xe5,0x0b,0xa3,0x19 == rcwcasa x3, x5, [sp]
0xe5,0x0b,0xe3,0x19 == rcwcasal x3, x5, [sp]
0xe5,0x0b,0x63,0x19 == rcwcasl x3, x5, [sp]
0x81,0x08,0x20,0x59 == rcwscas x0, x1, [x4]
0x81,0x08,0xa0,0x59 == rcwscasa x0, x1, [x4]
0x81,0x08,0xe0,0x59 == rcwscasal x0, x1, [x4]
0x81,0x08,0x60,0x59 == rcwscasl x0, x1, [x4]
0xe5,0x0b,0x23,0x59 == rcwscas x3, x5, [sp]
0xe5,0x0b,0xa3,0x59 == rcwscasa x3, x5, [sp]
0xe5,0x0b,0xe3,0x59 == rcwscasal x3, x5, [sp]
0xe5,0x0b,0x63,0x59 == rcwscasl x3, x5, [sp]
0x86,0x0c,0x20,0x19 == rcwcasp x0, x1, x6, x7, [x4]
0x86,0x0c,0xa0,0x19 == rcwcaspa x0, x1, x6, x7, [x4]
0x86,0x0c,0xe0,0x19 == rcwcaspal x0, x1, x6, x7, [x4]
0x86,0x0c,0x60,0x19 == rcwcaspl x0, x1, x6, x7, [x4]
0xe6,0x0f,0x24,0x19 == rcwcasp x4, x5, x6, x7, [sp]
0xe6,0x0f,0xa4,0x19 == rcwcaspa x4, x5, x6, x7, [sp]
0xe6,0x0f,0xe4,0x19 == rcwcaspal x4, x5, x6, x7, [sp]
0xe6,0x0f,0x64,0x19 == rcwcaspl x4, x5, x6, x7, [sp]
0x86,0x0c,0x20,0x59 == rcwscasp x0, x1, x6, x7, [x4]
0x86,0x0c,0xa0,0x59 == rcwscaspa x0, x1, x6, x7, [x4]
0x86,0x0c,0xe0,0x59 == rcwscaspal x0, x1, x6, x7, [x4]
0x86,0x0c,0x60,0x59 == rcwscaspl x0, x1, x6, x7, [x4]
0xe6,0x0f,0x24,0x59 == rcwscasp x4, x5, x6, x7, [sp]
0xe6,0x0f,0xa4,0x59 == rcwscaspa x4, x5, x6, x7, [sp]
0xe6,0x0f,0xe4,0x59 == rcwscaspal x4, x5, x6, x7, [sp]
0xe6,0x0f,0x64,0x59 == rcwscaspl x4, x5, x6, x7, [sp]
0x81,0x90,0x20,0x38 == rcwclr x0, x1, [x4]
0x81,0x90,0xa0,0x38 == rcwclra x0, x1, [x4]
0x81,0x90,0xe0,0x38 == rcwclral x0, x1, [x4]
0x81,0x90,0x60,0x38 == rcwclrl x0, x1, [x4]
0xe5,0x93,0x23,0x38 == rcwclr x3, x5, [sp]
0xe5,0x93,0xa3,0x38 == rcwclra x3, x5, [sp]
0xe5,0x93,0xe3,0x38 == rcwclral x3, x5, [sp]
0xe5,0x93,0x63,0x38 == rcwclrl x3, x5, [sp]
0x81,0x90,0x20,0x78 == rcwsclr x0, x1, [x4]
0x81,0x90,0xa0,0x78 == rcwsclra x0, x1, [x4]
0x81,0x90,0xe0,0x78 == rcwsclral x0, x1, [x4]
0x81,0x90,0x60,0x78 == rcwsclrl x0, x1, [x4]
0xe5,0x93,0x23,0x78 == rcwsclr x3, x5, [sp]
0xe5,0x93,0xa3,0x78 == rcwsclra x3, x5, [sp]
0xe5,0x93,0xe3,0x78 == rcwsclral x3, x5, [sp]
0xe5,0x93,0x63,0x78 == rcwsclrl x3, x5, [sp]
0x81,0x90,0x20,0x19 == rcwclrp x1, x0, [x4]
0x81,0x90,0xa0,0x19 == rcwclrpa x1, x0, [x4]
0x81,0x90,0xe0,0x19 == rcwclrpal x1, x0, [x4]
0x81,0x90,0x60,0x19 == rcwclrpl x1, x0, [x4]
0xe5,0x93,0x23,0x19 == rcwclrp x5, x3, [sp]
0xe5,0x93,0xa3,0x19 == rcwclrpa x5, x3, [sp]
0xe5,0x93,0xe3,0x19 == rcwclrpal x5, x3, [sp]
0xe5,0x93,0x63,0x19 == rcwclrpl x5, x3, [sp]
0x81,0x90,0x20,0x59 == rcwsclrp x1, x0, [x4]
0x81,0x90,0xa0,0x59 == rcwsclrpa x1, x0, [x4]
0x81,0x90,0xe0,0x59 == rcwsclrpal x1, x0, [x4]
0x81,0x90,0x60,0x59 == rcwsclrpl x1, x0, [x4]
0xe5,0x93,0x23,0x59 == rcwsclrp x5, x3, [sp]
0xe5,0x93,0xa3,0x59 == rcwsclrpa x5, x3, [sp]
0xe5,0x93,0xe3,0x59 == rcwsclrpal x5, x3, [sp]
0xe5,0x93,0x63,0x59 == rcwsclrpl x5, x3, [sp]
0x81,0xb0,0x20,0x38 == rcwset x0, x1, [x4]
0x81,0xb0,0xa0,0x38 == rcwseta x0, x1, [x4]
0x81,0xb0,0xe0,0x38 == rcwsetal x0, x1, [x4]
0x81,0xb0,0x60,0x38 == rcwsetl x0, x1, [x4]
0xe5,0xb3,0x23,0x38 == rcwset x3, x5, [sp]
0xe5,0xb3,0xa3,0x38 == rcwseta x3, x5, [sp]
0xe5,0xb3,0xe3,0x38 == rcwsetal x3, x5, [sp]
0xe5,0xb3,0x63,0x38 == rcwsetl x3, x5, [sp]
0x81,0xb0,0x20,0x78 == rcwsset x0, x1, [x4]
0x81,0xb0,0xa0,0x78 == rcwsseta x0, x1, [x4]
0x81,0xb0,0xe0,0x78 == rcwssetal x0, x1, [x4]
0x81,0xb0,0x60,0x78 == rcwssetl x0, x1, [x4]
0xe5,0xb3,0x23,0x78 == rcwsset x3, x5, [sp]
0xe5,0xb3,0xa3,0x78 == rcwsseta x3, x5, [sp]
0xe5,0xb3,0xe3,0x78 == rcwssetal x3, x5, [sp]
0xe5,0xb3,0x63,0x78 == rcwssetl x3, x5, [sp]
0x81,0xb0,0x20,0x19 == rcwsetp x1, x0, [x4]
0x81,0xb0,0xa0,0x19 == rcwsetpa x1, x0, [x4]
0x81,0xb0,0xe0,0x19 == rcwsetpal x1, x0, [x4]
0x81,0xb0,0x60,0x19 == rcwsetpl x1, x0, [x4]
0xe5,0xb3,0x23,0x19 == rcwsetp x5, x3, [sp]
0xe5,0xb3,0xa3,0x19 == rcwsetpa x5, x3, [sp]
0xe5,0xb3,0xe3,0x19 == rcwsetpal x5, x3, [sp]
0xe5,0xb3,0x63,0x19 == rcwsetpl x5, x3, [sp]
0x81,0xb0,0x20,0x59 == rcwssetp x1, x0, [x4]
0x81,0xb0,0xa0,0x59 == rcwssetpa x1, x0, [x4]
0x81,0xb0,0xe0,0x59 == rcwssetpal x1, x0, [x4]
0x81,0xb0,0x60,0x59 == rcwssetpl x1, x0, [x4]
0xe5,0xb3,0x23,0x59 == rcwssetp x5, x3, [sp]
0xe5,0xb3,0xa3,0x59 == rcwssetpa x5, x3, [sp]
0xe5,0xb3,0xe3,0x59 == rcwssetpal x5, x3, [sp]
0xe5,0xb3,0x63,0x59 == rcwssetpl x5, x3, [sp]
0x81,0xa0,0x20,0x38 == rcwswp x0, x1, [x4]
0x81,0xa0,0xa0,0x38 == rcwswpa x0, x1, [x4]
0x81,0xa0,0xe0,0x38 == rcwswpal x0, x1, [x4]
0x81,0xa0,0x60,0x38 == rcwswpl x0, x1, [x4]
0xe5,0xa3,0x23,0x38 == rcwswp x3, x5, [sp]
0xe5,0xa3,0xa3,0x38 == rcwswpa x3, x5, [sp]
0xe5,0xa3,0xe3,0x38 == rcwswpal x3, x5, [sp]
0xe5,0xa3,0x63,0x38 == rcwswpl x3, x5, [sp]
0x81,0xa0,0x20,0x78 == rcwsswp x0, x1, [x4]
0x81,0xa0,0xa0,0x78 == rcwsswpa x0, x1, [x4]
0x81,0xa0,0xe0,0x78 == rcwsswpal x0, x1, [x4]
0x81,0xa0,0x60,0x78 == rcwsswpl x0, x1, [x4]
0xe5,0xa3,0x23,0x78 == rcwsswp x3, x5, [sp]
0xe5,0xa3,0xa3,0x78 == rcwsswpa x3, x5, [sp]
0xe5,0xa3,0xe3,0x78 == rcwsswpal x3, x5, [sp]
0xe5,0xa3,0x63,0x78 == rcwsswpl x3, x5, [sp]
0x81,0xa0,0x20,0x19 == rcwswpp x1, x0, [x4]
0x81,0xa0,0xa0,0x19 == rcwswppa x1, x0, [x4]
0x81,0xa0,0xe0,0x19 == rcwswppal x1, x0, [x4]
0x81,0xa0,0x60,0x19 == rcwswppl x1, x0, [x4]
0xe5,0xa3,0x23,0x19 == rcwswpp x5, x3, [sp]
0xe5,0xa3,0xa3,0x19 == rcwswppa x5, x3, [sp]
0xe5,0xa3,0xe3,0x19 == rcwswppal x5, x3, [sp]
0xe5,0xa3,0x63,0x19 == rcwswppl x5, x3, [sp]
0x81,0xa0,0x20,0x59 == rcwsswpp x1, x0, [x4]
0x81,0xa0,0xa0,0x59 == rcwsswppa x1, x0, [x4]
0x81,0xa0,0xe0,0x59 == rcwsswppal x1, x0, [x4]
0x81,0xa0,0x60,0x59 == rcwsswppl x1, x0, [x4]
0xe5,0xa3,0x23,0x59 == rcwsswpp x5, x3, [sp]
0xe5,0xa3,0xa3,0x59 == rcwsswppa x5, x3, [sp]
0xe5,0xa3,0xe3,0x59 == rcwsswppal x5, x3, [sp]
0xe5,0xa3,0x63,0x59 == rcwsswppl x5, x3, [sp]
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