b102f1b8 Update Actions (#2593) 86293136 Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support (#2594) 27da950c Clarify between machine used vs. Capstone module affected. (#2586) 186f7aa0 Fix linking issue on Windows. (#2587) e160cbc5 Fix complex atomic instructions handling (#2584) 9907b22d Update v6 to have Debian Packages (#2579) efbbc3bb cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally (#2581) be6be784 x86: update read/write registers for transfer instructions (#2578) 812e654c Update BPF arch (#2568) 2c4b05f6 Clean up the cstest documentation and build instructions. (#2580) 4dc14ba1 Fix 2572 (#2574) b25aa841 PPC regressions (#2575) 0a29bf80 Small arm64 compat header fixes (#2563) b42e0903 Make thumb, v8 and m-class positional cstool arguments. (#2557) 89aee400 Add arm64 and sysz compatibility layer to Python bindings (#2559) a4281337 Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 (#2558) ef74d449 Arm regressions (#2556) 93a104c0 PPC LLVM 18 (#2540) e46838ed Merge branch 'v6' into next cf3600e7 Update Changelog Version to 6.0.0-Alpha2 (#2553) b295cf57 Prepare for update (#2552) fc59da4d fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… (#2551) 7d01d7e7 Auto-Sync reproducability + ARM update (#2532) 6ad2608d Python package building rework (#2538) e3bc578d Move debian package generation to a dispatch only workflow (#2543) abbf32b4 fix coverity (#2546) 1ecfb5b0 xtensa: update to espressif/llvm-project (#2533) 379e2a41 Rename build arguments: (#2534) d7be5f9f Change CI to create Debian Package to Release (#2521) f6f96796 tricore: fixes #2474 (#2523) 09f35961 This time actually fix big endian issue. (#2530) 306d5716 Fix endianess issue during assignment. (#2528) 2cfca35e Add CC and VAS compatibility macros (#2525) 32519c01 Fix stringop-truncation warning some compilers raise. (#2522) 5026c2c4 Merge pull request #2507 from thestr4ng3r/no-varargs-aarch64 cecb5ede Fix #2509. (#2510) f97e2705 xtensa: Fix Branch Target (#2516) 1d13a12f AArch64: Replace vararg add_cs_detail by multiple concrete functions 8b618528 Update libcyaml dependency in cstest to 1.4.2 (#2508) ea081286 Tricore EA calculation (#2504) 7db9a080 Fix cstest build with Ninja (#2506) 76242699 Only trigger on released action. (#2497) 981d648b Add hard asserts to all SStream functions and memset MCInst. (#2501) d667a627 Update labeler with Xtensa and v6 files. (#2500) 52b54ee3 Fixing UB santizer, `LITBASE` and assert errors. (#2499) 97db712c Remove irrelevant changes. (#2496) 5bd05e34 Remove irrelevant changes. (#2495) 616488c7 Update changelog for V6.0.0-Alpha1 (#2493) (#2494) c5955b92 Update changelog for V6.0.0-Alpha1 (#2493) a424e709 Be ready for V6-Alpha1 (#2492) 235ba8e0 SystemZ fixes (#2488) 5dffa75b Fix LDR not assigning immediate as memory offset. (#2487) 21f7bc85 Xtensa Support (#2380) 29d87734 Several small fixups (#2489) a34901e9 Update sponsors and remove empty file. (#2485) 3120932d Fix Coverity CID 509730: overflow before widen (#2486) 1014864d Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. (#2482) 0c90fe13 Replace `assert` with `CS_ASSERT` in modules (#2478) 823bfd53 AArch64 issues (#2473) git-subtree-dir: external/capstone git-subtree-split: b102f1b89e0455c072a751d287ab64378c14205f
249 lines
6.4 KiB
C
249 lines
6.4 KiB
C
/* Capstone Disassembly Engine, https://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2024 */
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/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Do not edit. */
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/* Capstone's LLVM TableGen Backends: */
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/* https://github.com/capstone-engine/llvm-capstone */
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#ifdef GET_SUBTARGETINFO_ENUM
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#undef GET_SUBTARGETINFO_ENUM
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enum {
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ARM_ARMv4 = 0,
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ARM_ARMv4t = 1,
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ARM_ARMv5t = 2,
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ARM_ARMv5te = 3,
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ARM_ARMv5tej = 4,
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ARM_ARMv6 = 5,
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ARM_ARMv6j = 6,
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ARM_ARMv6k = 7,
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ARM_ARMv6kz = 8,
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ARM_ARMv6m = 9,
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ARM_ARMv6sm = 10,
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ARM_ARMv6t2 = 11,
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ARM_ARMv7a = 12,
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ARM_ARMv7em = 13,
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ARM_ARMv7k = 14,
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ARM_ARMv7m = 15,
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ARM_ARMv7r = 16,
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ARM_ARMv7s = 17,
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ARM_ARMv7ve = 18,
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ARM_ARMv8a = 19,
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ARM_ARMv8mBaseline = 20,
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ARM_ARMv8mMainline = 21,
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ARM_ARMv8r = 22,
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ARM_ARMv9a = 23,
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ARM_ARMv81a = 24,
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ARM_ARMv81mMainline = 25,
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ARM_ARMv82a = 26,
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ARM_ARMv83a = 27,
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ARM_ARMv84a = 28,
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ARM_ARMv85a = 29,
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ARM_ARMv86a = 30,
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ARM_ARMv87a = 31,
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ARM_ARMv88a = 32,
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ARM_ARMv89a = 33,
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ARM_ARMv91a = 34,
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ARM_ARMv92a = 35,
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ARM_ARMv93a = 36,
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ARM_ARMv94a = 37,
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ARM_ARMv95a = 38,
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ARM_Feature8MSecExt = 39,
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ARM_FeatureAAPCSFrameChain = 40,
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ARM_FeatureAAPCSFrameChainLeaf = 41,
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ARM_FeatureAClass = 42,
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ARM_FeatureAES = 43,
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ARM_FeatureAcquireRelease = 44,
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ARM_FeatureAtomics32 = 45,
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ARM_FeatureAvoidMOVsShOp = 46,
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ARM_FeatureAvoidPartialCPSR = 47,
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ARM_FeatureBF16 = 48,
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ARM_FeatureCLRBHB = 49,
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ARM_FeatureCRC = 50,
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ARM_FeatureCheapPredicableCPSR = 51,
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ARM_FeatureCheckVLDnAlign = 52,
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ARM_FeatureCoprocCDE0 = 53,
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ARM_FeatureCoprocCDE1 = 54,
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ARM_FeatureCoprocCDE2 = 55,
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ARM_FeatureCoprocCDE3 = 56,
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ARM_FeatureCoprocCDE4 = 57,
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ARM_FeatureCoprocCDE5 = 58,
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ARM_FeatureCoprocCDE6 = 59,
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ARM_FeatureCoprocCDE7 = 60,
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ARM_FeatureCrypto = 61,
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ARM_FeatureD32 = 62,
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ARM_FeatureDB = 63,
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ARM_FeatureDFB = 64,
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ARM_FeatureDSP = 65,
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ARM_FeatureDontWidenVMOVS = 66,
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ARM_FeatureDotProd = 67,
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ARM_FeatureExecuteOnly = 68,
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ARM_FeatureExpandMLx = 69,
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ARM_FeatureFP16 = 70,
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ARM_FeatureFP16FML = 71,
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ARM_FeatureFP64 = 72,
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ARM_FeatureFPAO = 73,
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ARM_FeatureFPARMv8 = 74,
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ARM_FeatureFPARMv8_D16 = 75,
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ARM_FeatureFPARMv8_D16_SP = 76,
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ARM_FeatureFPARMv8_SP = 77,
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ARM_FeatureFPRegs = 78,
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ARM_FeatureFPRegs16 = 79,
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ARM_FeatureFPRegs64 = 80,
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ARM_FeatureFixCMSE_CVE_2021_35465 = 81,
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ARM_FeatureFixCortexA57AES1742098 = 82,
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ARM_FeatureFullFP16 = 83,
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ARM_FeatureFuseAES = 84,
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ARM_FeatureFuseLiterals = 85,
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ARM_FeatureHWDivARM = 86,
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ARM_FeatureHWDivThumb = 87,
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ARM_FeatureHardenSlsBlr = 88,
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ARM_FeatureHardenSlsNoComdat = 89,
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ARM_FeatureHardenSlsRetBr = 90,
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ARM_FeatureHasNoBranchPredictor = 91,
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ARM_FeatureHasRetAddrStack = 92,
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ARM_FeatureHasSlowFPVFMx = 93,
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ARM_FeatureHasSlowFPVMLx = 94,
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ARM_FeatureHasVMLxHazards = 95,
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ARM_FeatureLOB = 96,
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ARM_FeatureLongCalls = 97,
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ARM_FeatureMClass = 98,
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ARM_FeatureMP = 99,
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ARM_FeatureMVEVectorCostFactor1 = 100,
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ARM_FeatureMVEVectorCostFactor2 = 101,
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ARM_FeatureMVEVectorCostFactor4 = 102,
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ARM_FeatureMatMulInt8 = 103,
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ARM_FeatureMuxedUnits = 104,
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ARM_FeatureNEON = 105,
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ARM_FeatureNEONForFP = 106,
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ARM_FeatureNEONForFPMovs = 107,
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ARM_FeatureNaClTrap = 108,
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ARM_FeatureNoARM = 109,
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ARM_FeatureNoBTIAtReturnTwice = 110,
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ARM_FeatureNoMovt = 111,
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ARM_FeatureNoNegativeImmediates = 112,
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ARM_FeatureNoPostRASched = 113,
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ARM_FeatureNonpipelinedVFP = 114,
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ARM_FeaturePACBTI = 115,
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ARM_FeaturePerfMon = 116,
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ARM_FeaturePref32BitThumb = 117,
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ARM_FeaturePrefISHSTBarrier = 118,
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ARM_FeaturePrefLoopAlign32 = 119,
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ARM_FeaturePreferVMOVSR = 120,
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ARM_FeatureProfUnpredicate = 121,
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ARM_FeatureRAS = 122,
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ARM_FeatureRClass = 123,
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ARM_FeatureReadTpTPIDRPRW = 124,
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ARM_FeatureReadTpTPIDRURO = 125,
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ARM_FeatureReadTpTPIDRURW = 126,
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ARM_FeatureReserveR9 = 127,
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ARM_FeatureSB = 128,
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ARM_FeatureSHA2 = 129,
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ARM_FeatureSlowFPBrcc = 130,
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ARM_FeatureSlowLoadDSubreg = 131,
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ARM_FeatureSlowOddRegister = 132,
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ARM_FeatureSlowVDUP32 = 133,
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ARM_FeatureSlowVGETLNi32 = 134,
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ARM_FeatureSplatVFPToNeon = 135,
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ARM_FeatureStrictAlign = 136,
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ARM_FeatureThumb2 = 137,
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ARM_FeatureTrustZone = 138,
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ARM_FeatureUseMIPipeliner = 139,
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ARM_FeatureUseMISched = 140,
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ARM_FeatureUseWideStrideVFP = 141,
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ARM_FeatureV7Clrex = 142,
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ARM_FeatureVFP2 = 143,
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ARM_FeatureVFP2_SP = 144,
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ARM_FeatureVFP3 = 145,
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ARM_FeatureVFP3_D16 = 146,
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ARM_FeatureVFP3_D16_SP = 147,
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ARM_FeatureVFP3_SP = 148,
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ARM_FeatureVFP4 = 149,
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ARM_FeatureVFP4_D16 = 150,
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ARM_FeatureVFP4_D16_SP = 151,
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ARM_FeatureVFP4_SP = 152,
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ARM_FeatureVMLxForwarding = 153,
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ARM_FeatureVirtualization = 154,
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ARM_FeatureZCZeroing = 155,
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ARM_HasCDEOps = 156,
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ARM_HasMVEFloatOps = 157,
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ARM_HasMVEIntegerOps = 158,
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ARM_HasV4TOps = 159,
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ARM_HasV5TEOps = 160,
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ARM_HasV5TOps = 161,
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ARM_HasV6KOps = 162,
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ARM_HasV6MOps = 163,
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ARM_HasV6Ops = 164,
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ARM_HasV6T2Ops = 165,
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ARM_HasV7Ops = 166,
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ARM_HasV8MBaselineOps = 167,
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ARM_HasV8MMainlineOps = 168,
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ARM_HasV8Ops = 169,
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ARM_HasV8_1MMainlineOps = 170,
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ARM_HasV8_1aOps = 171,
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ARM_HasV8_2aOps = 172,
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ARM_HasV8_3aOps = 173,
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ARM_HasV8_4aOps = 174,
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ARM_HasV8_5aOps = 175,
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ARM_HasV8_6aOps = 176,
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ARM_HasV8_7aOps = 177,
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ARM_HasV8_8aOps = 178,
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ARM_HasV8_9aOps = 179,
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ARM_HasV9_0aOps = 180,
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ARM_HasV9_1aOps = 181,
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ARM_HasV9_2aOps = 182,
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ARM_HasV9_3aOps = 183,
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ARM_HasV9_4aOps = 184,
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ARM_HasV9_5aOps = 185,
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ARM_IWMMXT = 186,
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ARM_IWMMXT2 = 187,
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ARM_ModeBigEndianInstructions = 188,
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ARM_ModeSoftFloat = 189,
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ARM_ModeThumb = 190,
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ARM_ProcA5 = 191,
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ARM_ProcA7 = 192,
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ARM_ProcA8 = 193,
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ARM_ProcA9 = 194,
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ARM_ProcA12 = 195,
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ARM_ProcA15 = 196,
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ARM_ProcA17 = 197,
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ARM_ProcA32 = 198,
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ARM_ProcA35 = 199,
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ARM_ProcA53 = 200,
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ARM_ProcA55 = 201,
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ARM_ProcA57 = 202,
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ARM_ProcA72 = 203,
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ARM_ProcA73 = 204,
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ARM_ProcA75 = 205,
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ARM_ProcA76 = 206,
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ARM_ProcA77 = 207,
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ARM_ProcA78 = 208,
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ARM_ProcA78C = 209,
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ARM_ProcA710 = 210,
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ARM_ProcExynos = 211,
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ARM_ProcKrait = 212,
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ARM_ProcKryo = 213,
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ARM_ProcM3 = 214,
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ARM_ProcM7 = 215,
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ARM_ProcR4 = 216,
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ARM_ProcR5 = 217,
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ARM_ProcR7 = 218,
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ARM_ProcR52 = 219,
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ARM_ProcSwift = 220,
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ARM_ProcV1 = 221,
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ARM_ProcX1 = 222,
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ARM_ProcX1C = 223,
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ARM_XScale = 224,
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ARM_NumSubtargetFeatures = 225
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};
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#endif // GET_SUBTARGETINFO_ENUM
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