5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705) 99f018ac Python binding: (#2742) a07baf83 Auto-Sync update Sparc LLVM-18 (#2704) 81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733) a25d4980 Add warning about naive search and replace to patch reg names. (#2728) 7ac87d17 Print immediate only memory operands for AArch64. (#2732) c34034c8 Add x30 implicit read to the RET alias. (#2739) 95a4ca3e Update source list before installing valgrind. (#2730) 6909724e Make assertion hit warnings optional in release builds. (#2729) fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723) 21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721) df26583f clang-format: change license to BSD-3-Clause (#2724) 280b749e Remove unused files. (#2709) 87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707) efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720) 2ae64133 Fix missing sp register read in ret instruction (#2719) 8df252a6 Fix arm pop reg access (#2718) 14612272 ARM: fix typo, cspr -> cpsr (#2716) f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701) 829be2bf LoongArch: Compute absolute address for address operand (#2699) 42fbce6c Add jump group for generic jirl (#2698) fc525c73 Apple AArch64 proprietary (#2692) 895f2f2e Build PDB for debugging on Windows (#2685) 5c3aef03 Version: Update to v6.0.0-alpha4 (#2682) 106f7d3b Update read/written registers for x87 comparison instructions (#2680) ebe3ef2a Add workflow for building on Windows (#2675) 72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678) 5b5c5ed8 Fix nanomips decoding of jalrc (#2672) ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 21178aea Add a script to compare the inc file content with the latest generated ones. (#2667) 81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665) 98a393e3 Stringify BH fields when printing ppc details (#2663) 2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661) 5058c634 Decode BH field in print_insn_detail_ppc (#2662) 6461ed08 Add Call group to svc, smc and hvc. (#2651) e2f1dc8d Tms32c64x Little Endian (#2648) 5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645) bb2f6579 Enhance shift value and types of shift instructions. (#2638) cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633) dc0c0909 cmake: Fix building capstone as sub-project (#2629) cd8dd20c - Added missing files for sdist archive (#2624) 9affd99b Give the user some guidance where to add missing enumeration values. (#2639) 1bea3fab Add checks for MIPS details on cstest_py (#2640) ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635) 1abe1868 Build Tarball before DEB/RPM package. (#2627) 0a012190 Switch to ubuntu-24.04-arm runner image (#2625) 4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620) 8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616) d7ef910b Rebased #2570 (#2614) c831cd5e Fix SystemZ macro in Makefile (#2603) 30601176 Apply new EVM opcode updates (#2602) 3c4d7fc8 Add tricore tc1.8 instructions (#2595) 5f290cad Create debian and rpm package on releases (#2590) 0f09210a delete travis (#2600) 5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598) git-subtree-dir: external/capstone git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
275 lines
5.2 KiB
Python
275 lines
5.2 KiB
Python
from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX, UINT8_MAX
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# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arc_const.py]
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ARC_OP_INVALID = CS_OP_INVALID
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ARC_OP_REG = CS_OP_REG
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ARC_OP_IMM = CS_OP_IMM
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ARC_REG_INVALID = 0
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ARC_REG_BLINK = 1
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ARC_REG_FP = 2
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ARC_REG_GP = 3
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ARC_REG_ILINK = 4
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ARC_REG_SP = 5
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ARC_REG_R0 = 6
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ARC_REG_R1 = 7
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ARC_REG_R2 = 8
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ARC_REG_R3 = 9
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ARC_REG_R4 = 10
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ARC_REG_R5 = 11
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ARC_REG_R6 = 12
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ARC_REG_R7 = 13
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ARC_REG_R8 = 14
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ARC_REG_R9 = 15
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ARC_REG_R10 = 16
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ARC_REG_R11 = 17
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ARC_REG_R12 = 18
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ARC_REG_R13 = 19
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ARC_REG_R14 = 20
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ARC_REG_R15 = 21
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ARC_REG_R16 = 22
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ARC_REG_R17 = 23
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ARC_REG_R18 = 24
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ARC_REG_R19 = 25
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ARC_REG_R20 = 26
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ARC_REG_R21 = 27
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ARC_REG_R22 = 28
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ARC_REG_R23 = 29
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ARC_REG_R24 = 30
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ARC_REG_R25 = 31
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ARC_REG_R30 = 32
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ARC_REG_R32 = 33
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ARC_REG_R33 = 34
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ARC_REG_R34 = 35
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ARC_REG_R35 = 36
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ARC_REG_R36 = 37
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ARC_REG_R37 = 38
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ARC_REG_R38 = 39
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ARC_REG_R39 = 40
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ARC_REG_R40 = 41
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ARC_REG_R41 = 42
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ARC_REG_R42 = 43
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ARC_REG_R43 = 44
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ARC_REG_R44 = 45
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ARC_REG_R45 = 46
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ARC_REG_R46 = 47
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ARC_REG_R47 = 48
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ARC_REG_R48 = 49
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ARC_REG_R49 = 50
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ARC_REG_R50 = 51
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ARC_REG_R51 = 52
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ARC_REG_R52 = 53
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ARC_REG_R53 = 54
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ARC_REG_R54 = 55
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ARC_REG_R55 = 56
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ARC_REG_R56 = 57
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ARC_REG_R57 = 58
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ARC_REG_R58 = 59
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ARC_REG_R59 = 60
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ARC_REG_R60 = 61
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ARC_REG_R61 = 62
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ARC_REG_R62 = 63
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ARC_REG_R63 = 64
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ARC_REG_STATUS32 = 65
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ARC_REG_ENDING = 66
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ARC_INS_INVALID = 0
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ARC_INS_h = 1
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ARC_INS_PBR = 2
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ARC_INS_ERROR_FLS = 3
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ARC_INS_ERROR_FFS = 4
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ARC_INS_PLDFI = 5
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ARC_INS_STB_FAR = 6
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ARC_INS_STH_FAR = 7
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ARC_INS_ST_FAR = 8
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ARC_INS_ADC = 9
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ARC_INS_ADC_F = 10
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ARC_INS_ADD_S = 11
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ARC_INS_ADD = 12
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ARC_INS_ADD_F = 13
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ARC_INS_AND = 14
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ARC_INS_AND_F = 15
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ARC_INS_ASL_S = 16
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ARC_INS_ASL = 17
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ARC_INS_ASL_F = 18
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ARC_INS_ASR_S = 19
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ARC_INS_ASR = 20
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ARC_INS_ASR_F = 21
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ARC_INS_BCLR_S = 22
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ARC_INS_BEQ_S = 23
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ARC_INS_BGE_S = 24
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ARC_INS_BGT_S = 25
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ARC_INS_BHI_S = 26
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ARC_INS_BHS_S = 27
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ARC_INS_BL = 28
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ARC_INS_BLE_S = 29
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ARC_INS_BLO_S = 30
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ARC_INS_BLS_S = 31
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ARC_INS_BLT_S = 32
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ARC_INS_BL_S = 33
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ARC_INS_BMSK_S = 34
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ARC_INS_BNE_S = 35
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ARC_INS_B = 36
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ARC_INS_BREQ_S = 37
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ARC_INS_BRNE_S = 38
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ARC_INS_BR = 39
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ARC_INS_BSET_S = 40
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ARC_INS_BTST_S = 41
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ARC_INS_B_S = 42
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ARC_INS_CMP_S = 43
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ARC_INS_CMP = 44
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ARC_INS_LD_S = 45
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ARC_INS_MOV_S = 46
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ARC_INS_EI_S = 47
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ARC_INS_ENTER_S = 48
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ARC_INS_FFS_F = 49
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ARC_INS_FFS = 50
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ARC_INS_FLS_F = 51
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ARC_INS_FLS = 52
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ARC_INS_ABS_S = 53
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ARC_INS_ADD1_S = 54
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ARC_INS_ADD2_S = 55
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ARC_INS_ADD3_S = 56
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ARC_INS_AND_S = 57
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ARC_INS_BIC_S = 58
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ARC_INS_BRK_S = 59
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ARC_INS_EXTB_S = 60
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ARC_INS_EXTH_S = 61
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ARC_INS_JEQ_S = 62
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ARC_INS_JL_S = 63
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ARC_INS_JL_S_D = 64
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ARC_INS_JNE_S = 65
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ARC_INS_J_S = 66
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ARC_INS_J_S_D = 67
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ARC_INS_LSR_S = 68
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ARC_INS_MPYUW_S = 69
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ARC_INS_MPYW_S = 70
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ARC_INS_MPY_S = 71
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ARC_INS_NEG_S = 72
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ARC_INS_NOP_S = 73
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ARC_INS_NOT_S = 74
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ARC_INS_OR_S = 75
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ARC_INS_SEXB_S = 76
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ARC_INS_SEXH_S = 77
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ARC_INS_SUB_S = 78
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ARC_INS_SUB_S_NE = 79
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ARC_INS_SWI_S = 80
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ARC_INS_TRAP_S = 81
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ARC_INS_TST_S = 82
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ARC_INS_UNIMP_S = 83
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ARC_INS_XOR_S = 84
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ARC_INS_LDB_S = 85
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ARC_INS_LDH_S = 86
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ARC_INS_J = 87
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ARC_INS_JL = 88
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ARC_INS_JLI_S = 89
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ARC_INS_LDB_AB = 90
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ARC_INS_LDB_AW = 91
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ARC_INS_LDB_DI_AB = 92
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ARC_INS_LDB_DI_AW = 93
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ARC_INS_LDB_DI = 94
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ARC_INS_LDB_X_AB = 95
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ARC_INS_LDB_X_AW = 96
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ARC_INS_LDB_X_DI_AB = 97
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ARC_INS_LDB_X_DI_AW = 98
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ARC_INS_LDB_X_DI = 99
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ARC_INS_LDB_X = 100
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ARC_INS_LDB = 101
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ARC_INS_LDH_AB = 102
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ARC_INS_LDH_AW = 103
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ARC_INS_LDH_DI_AB = 104
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ARC_INS_LDH_DI_AW = 105
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ARC_INS_LDH_DI = 106
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ARC_INS_LDH_S_X = 107
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ARC_INS_LDH_X_AB = 108
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ARC_INS_LDH_X_AW = 109
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ARC_INS_LDH_X_DI_AB = 110
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ARC_INS_LDH_X_DI_AW = 111
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ARC_INS_LDH_X_DI = 112
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ARC_INS_LDH_X = 113
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ARC_INS_LDH = 114
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ARC_INS_LDI_S = 115
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ARC_INS_LD_AB = 116
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ARC_INS_LD_AW = 117
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ARC_INS_LD_DI_AB = 118
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ARC_INS_LD_DI_AW = 119
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ARC_INS_LD_DI = 120
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ARC_INS_LD_S_AS = 121
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ARC_INS_LD = 122
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ARC_INS_LEAVE_S = 123
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ARC_INS_LR = 124
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ARC_INS_LSR = 125
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ARC_INS_LSR_F = 126
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ARC_INS_MAX = 127
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ARC_INS_MAX_F = 128
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ARC_INS_MIN = 129
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ARC_INS_MIN_F = 130
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ARC_INS_MOV_S_NE = 131
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ARC_INS_MOV = 132
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ARC_INS_MOV_F = 133
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ARC_INS_MPYMU = 134
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ARC_INS_MPYMU_F = 135
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ARC_INS_MPYM = 136
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ARC_INS_MPYM_F = 137
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ARC_INS_MPY = 138
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ARC_INS_MPY_F = 139
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ARC_INS_NORMH_F = 140
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ARC_INS_NORMH = 141
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ARC_INS_NORM_F = 142
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ARC_INS_NORM = 143
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ARC_INS_OR = 144
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ARC_INS_OR_F = 145
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ARC_INS_POP_S = 146
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ARC_INS_PUSH_S = 147
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ARC_INS_ROR = 148
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ARC_INS_ROR_F = 149
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ARC_INS_RSUB = 150
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ARC_INS_RSUB_F = 151
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ARC_INS_SBC = 152
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ARC_INS_SBC_F = 153
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ARC_INS_SETEQ = 154
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ARC_INS_SETEQ_F = 155
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ARC_INS_SEXB_F = 156
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ARC_INS_SEXB = 157
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ARC_INS_SEXH_F = 158
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ARC_INS_SEXH = 159
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ARC_INS_STB_S = 160
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ARC_INS_ST_S = 161
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ARC_INS_STB_AB = 162
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ARC_INS_STB_AW = 163
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ARC_INS_STB_DI_AB = 164
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ARC_INS_STB_DI_AW = 165
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ARC_INS_STB_DI = 166
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ARC_INS_STB = 167
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ARC_INS_STH_AB = 168
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ARC_INS_STH_AW = 169
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ARC_INS_STH_DI_AB = 170
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ARC_INS_STH_DI_AW = 171
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ARC_INS_STH_DI = 172
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ARC_INS_STH_S = 173
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ARC_INS_STH = 174
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ARC_INS_ST_AB = 175
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ARC_INS_ST_AW = 176
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ARC_INS_ST_DI_AB = 177
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ARC_INS_ST_DI_AW = 178
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ARC_INS_ST_DI = 179
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ARC_INS_ST = 180
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ARC_INS_SUB1 = 181
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ARC_INS_SUB1_F = 182
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ARC_INS_SUB2 = 183
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ARC_INS_SUB2_F = 184
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ARC_INS_SUB3 = 185
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ARC_INS_SUB3_F = 186
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ARC_INS_SUB = 187
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ARC_INS_SUB_F = 188
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ARC_INS_XOR = 189
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ARC_INS_XOR_F = 190
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# Group of ARC instructions
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ARC_GRP_INVALID = 0
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ARC_GRP_JUMP = 1
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ARC_GRP_CALL = 2
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ARC_GRP_RET = 3
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ARC_GRP_BRANCH_RELATIVE = 4
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ARC_GRP_ENDING = 5
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