16a2cf3873
5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705) 99f018ac Python binding: (#2742) a07baf83 Auto-Sync update Sparc LLVM-18 (#2704) 81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733) a25d4980 Add warning about naive search and replace to patch reg names. (#2728) 7ac87d17 Print immediate only memory operands for AArch64. (#2732) c34034c8 Add x30 implicit read to the RET alias. (#2739) 95a4ca3e Update source list before installing valgrind. (#2730) 6909724e Make assertion hit warnings optional in release builds. (#2729) fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723) 21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721) df26583f clang-format: change license to BSD-3-Clause (#2724) 280b749e Remove unused files. (#2709) 87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707) efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720) 2ae64133 Fix missing sp register read in ret instruction (#2719) 8df252a6 Fix arm pop reg access (#2718) 14612272 ARM: fix typo, cspr -> cpsr (#2716) f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701) 829be2bf LoongArch: Compute absolute address for address operand (#2699) 42fbce6c Add jump group for generic jirl (#2698) fc525c73 Apple AArch64 proprietary (#2692) 895f2f2e Build PDB for debugging on Windows (#2685) 5c3aef03 Version: Update to v6.0.0-alpha4 (#2682) 106f7d3b Update read/written registers for x87 comparison instructions (#2680) ebe3ef2a Add workflow for building on Windows (#2675) 72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678) 5b5c5ed8 Fix nanomips decoding of jalrc (#2672) ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 21178aea Add a script to compare the inc file content with the latest generated ones. (#2667) 81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665) 98a393e3 Stringify BH fields when printing ppc details (#2663) 2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661) 5058c634 Decode BH field in print_insn_detail_ppc (#2662) 6461ed08 Add Call group to svc, smc and hvc. (#2651) e2f1dc8d Tms32c64x Little Endian (#2648) 5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645) bb2f6579 Enhance shift value and types of shift instructions. (#2638) cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633) dc0c0909 cmake: Fix building capstone as sub-project (#2629) cd8dd20c - Added missing files for sdist archive (#2624) 9affd99b Give the user some guidance where to add missing enumeration values. (#2639) 1bea3fab Add checks for MIPS details on cstest_py (#2640) ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635) 1abe1868 Build Tarball before DEB/RPM package. (#2627) 0a012190 Switch to ubuntu-24.04-arm runner image (#2625) 4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620) 8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616) d7ef910b Rebased #2570 (#2614) c831cd5e Fix SystemZ macro in Makefile (#2603) 30601176 Apply new EVM opcode updates (#2602) 3c4d7fc8 Add tricore tc1.8 instructions (#2595) 5f290cad Create debian and rpm package on releases (#2590) 0f09210a delete travis (#2600) 5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598) git-subtree-dir: external/capstone git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
278 lines
7.0 KiB
Python
278 lines
7.0 KiB
Python
from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX, UINT8_MAX
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# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.py]
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TMS320C64X_OP_INVALID = CS_OP_INVALID
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TMS320C64X_OP_REG = CS_OP_REG
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TMS320C64X_OP_IMM = CS_OP_IMM
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TMS320C64X_OP_REGPAIR = CS_OP_SPECIAL+0
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TMS320C64X_OP_MEM = CS_OP_MEM
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TMS320C64X_MEM_DISP_INVALID = 0
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TMS320C64X_MEM_DISP_CONSTANT = 1
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TMS320C64X_MEM_DISP_REGISTER = 2
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TMS320C64X_MEM_DIR_INVALID = 0
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TMS320C64X_MEM_DIR_FW = 1
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TMS320C64X_MEM_DIR_BW = 2
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TMS320C64X_MEM_MOD_INVALID = 0
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TMS320C64X_MEM_MOD_NO = 1
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TMS320C64X_MEM_MOD_PRE = 2
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TMS320C64X_MEM_MOD_POST = 3
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TMS320C64X_REG_INVALID = 0
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TMS320C64X_REG_AMR = 1
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TMS320C64X_REG_CSR = 2
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TMS320C64X_REG_DIER = 3
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TMS320C64X_REG_DNUM = 4
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TMS320C64X_REG_ECR = 5
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TMS320C64X_REG_GFPGFR = 6
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TMS320C64X_REG_GPLYA = 7
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TMS320C64X_REG_GPLYB = 8
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TMS320C64X_REG_ICR = 9
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TMS320C64X_REG_IER = 10
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TMS320C64X_REG_IERR = 11
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TMS320C64X_REG_ILC = 12
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TMS320C64X_REG_IRP = 13
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TMS320C64X_REG_ISR = 14
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TMS320C64X_REG_ISTP = 15
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TMS320C64X_REG_ITSR = 16
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TMS320C64X_REG_NRP = 17
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TMS320C64X_REG_NTSR = 18
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TMS320C64X_REG_REP = 19
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TMS320C64X_REG_RILC = 20
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TMS320C64X_REG_SSR = 21
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TMS320C64X_REG_TSCH = 22
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TMS320C64X_REG_TSCL = 23
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TMS320C64X_REG_TSR = 24
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TMS320C64X_REG_A0 = 25
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TMS320C64X_REG_A1 = 26
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TMS320C64X_REG_A2 = 27
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TMS320C64X_REG_A3 = 28
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TMS320C64X_REG_A4 = 29
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TMS320C64X_REG_A5 = 30
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TMS320C64X_REG_A6 = 31
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TMS320C64X_REG_A7 = 32
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TMS320C64X_REG_A8 = 33
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TMS320C64X_REG_A9 = 34
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TMS320C64X_REG_A10 = 35
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TMS320C64X_REG_A11 = 36
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TMS320C64X_REG_A12 = 37
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TMS320C64X_REG_A13 = 38
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TMS320C64X_REG_A14 = 39
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TMS320C64X_REG_A15 = 40
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TMS320C64X_REG_A16 = 41
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TMS320C64X_REG_A17 = 42
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TMS320C64X_REG_A18 = 43
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TMS320C64X_REG_A19 = 44
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TMS320C64X_REG_A20 = 45
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TMS320C64X_REG_A21 = 46
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TMS320C64X_REG_A22 = 47
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TMS320C64X_REG_A23 = 48
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TMS320C64X_REG_A24 = 49
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TMS320C64X_REG_A25 = 50
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TMS320C64X_REG_A26 = 51
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TMS320C64X_REG_A27 = 52
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TMS320C64X_REG_A28 = 53
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TMS320C64X_REG_A29 = 54
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TMS320C64X_REG_A30 = 55
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TMS320C64X_REG_A31 = 56
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TMS320C64X_REG_B0 = 57
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TMS320C64X_REG_B1 = 58
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TMS320C64X_REG_B2 = 59
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TMS320C64X_REG_B3 = 60
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TMS320C64X_REG_B4 = 61
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TMS320C64X_REG_B5 = 62
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TMS320C64X_REG_B6 = 63
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TMS320C64X_REG_B7 = 64
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TMS320C64X_REG_B8 = 65
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TMS320C64X_REG_B9 = 66
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TMS320C64X_REG_B10 = 67
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TMS320C64X_REG_B11 = 68
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TMS320C64X_REG_B12 = 69
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TMS320C64X_REG_B13 = 70
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TMS320C64X_REG_B14 = 71
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TMS320C64X_REG_B15 = 72
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TMS320C64X_REG_B16 = 73
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TMS320C64X_REG_B17 = 74
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TMS320C64X_REG_B18 = 75
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TMS320C64X_REG_B19 = 76
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TMS320C64X_REG_B20 = 77
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TMS320C64X_REG_B21 = 78
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TMS320C64X_REG_B22 = 79
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TMS320C64X_REG_B23 = 80
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TMS320C64X_REG_B24 = 81
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TMS320C64X_REG_B25 = 82
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TMS320C64X_REG_B26 = 83
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TMS320C64X_REG_B27 = 84
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TMS320C64X_REG_B28 = 85
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TMS320C64X_REG_B29 = 86
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TMS320C64X_REG_B30 = 87
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TMS320C64X_REG_B31 = 88
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TMS320C64X_REG_PCE1 = 89
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TMS320C64X_REG_ENDING = 90
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TMS320C64X_REG_EFR = TMS320C64X_REG_ECR
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TMS320C64X_REG_IFR = TMS320C64X_REG_ISR
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TMS320C64X_INS_INVALID = 0
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TMS320C64X_INS_ABS = 1
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TMS320C64X_INS_ABS2 = 2
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TMS320C64X_INS_ADD = 3
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TMS320C64X_INS_ADD2 = 4
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TMS320C64X_INS_ADD4 = 5
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TMS320C64X_INS_ADDAB = 6
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TMS320C64X_INS_ADDAD = 7
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TMS320C64X_INS_ADDAH = 8
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TMS320C64X_INS_ADDAW = 9
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TMS320C64X_INS_ADDK = 10
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TMS320C64X_INS_ADDKPC = 11
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TMS320C64X_INS_ADDU = 12
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TMS320C64X_INS_AND = 13
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TMS320C64X_INS_ANDN = 14
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TMS320C64X_INS_AVG2 = 15
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TMS320C64X_INS_AVGU4 = 16
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TMS320C64X_INS_B = 17
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TMS320C64X_INS_BDEC = 18
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TMS320C64X_INS_BITC4 = 19
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TMS320C64X_INS_BNOP = 20
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TMS320C64X_INS_BPOS = 21
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TMS320C64X_INS_CLR = 22
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TMS320C64X_INS_CMPEQ = 23
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TMS320C64X_INS_CMPEQ2 = 24
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TMS320C64X_INS_CMPEQ4 = 25
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TMS320C64X_INS_CMPGT = 26
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TMS320C64X_INS_CMPGT2 = 27
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TMS320C64X_INS_CMPGTU4 = 28
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TMS320C64X_INS_CMPLT = 29
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TMS320C64X_INS_CMPLTU = 30
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TMS320C64X_INS_DEAL = 31
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TMS320C64X_INS_DOTP2 = 32
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TMS320C64X_INS_DOTPN2 = 33
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TMS320C64X_INS_DOTPNRSU2 = 34
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TMS320C64X_INS_DOTPRSU2 = 35
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TMS320C64X_INS_DOTPSU4 = 36
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TMS320C64X_INS_DOTPU4 = 37
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TMS320C64X_INS_EXT = 38
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TMS320C64X_INS_EXTU = 39
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TMS320C64X_INS_GMPGTU = 40
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TMS320C64X_INS_GMPY4 = 41
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TMS320C64X_INS_LDB = 42
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TMS320C64X_INS_LDBU = 43
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TMS320C64X_INS_LDDW = 44
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TMS320C64X_INS_LDH = 45
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TMS320C64X_INS_LDHU = 46
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TMS320C64X_INS_LDNDW = 47
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TMS320C64X_INS_LDNW = 48
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TMS320C64X_INS_LDW = 49
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TMS320C64X_INS_LMBD = 50
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TMS320C64X_INS_MAX2 = 51
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TMS320C64X_INS_MAXU4 = 52
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TMS320C64X_INS_MIN2 = 53
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TMS320C64X_INS_MINU4 = 54
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TMS320C64X_INS_MPY = 55
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TMS320C64X_INS_MPY2 = 56
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TMS320C64X_INS_MPYH = 57
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TMS320C64X_INS_MPYHI = 58
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TMS320C64X_INS_MPYHIR = 59
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TMS320C64X_INS_MPYHL = 60
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TMS320C64X_INS_MPYHLU = 61
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TMS320C64X_INS_MPYHSLU = 62
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TMS320C64X_INS_MPYHSU = 63
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TMS320C64X_INS_MPYHU = 64
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TMS320C64X_INS_MPYHULS = 65
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TMS320C64X_INS_MPYHUS = 66
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TMS320C64X_INS_MPYLH = 67
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TMS320C64X_INS_MPYLHU = 68
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TMS320C64X_INS_MPYLI = 69
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TMS320C64X_INS_MPYLIR = 70
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TMS320C64X_INS_MPYLSHU = 71
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TMS320C64X_INS_MPYLUHS = 72
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TMS320C64X_INS_MPYSU = 73
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TMS320C64X_INS_MPYSU4 = 74
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TMS320C64X_INS_MPYU = 75
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TMS320C64X_INS_MPYU4 = 76
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TMS320C64X_INS_MPYUS = 77
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TMS320C64X_INS_MVC = 78
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TMS320C64X_INS_MVD = 79
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TMS320C64X_INS_MVK = 80
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TMS320C64X_INS_MVKL = 81
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TMS320C64X_INS_MVKLH = 82
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TMS320C64X_INS_NOP = 83
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TMS320C64X_INS_NORM = 84
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TMS320C64X_INS_OR = 85
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TMS320C64X_INS_PACK2 = 86
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TMS320C64X_INS_PACKH2 = 87
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TMS320C64X_INS_PACKH4 = 88
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TMS320C64X_INS_PACKHL2 = 89
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TMS320C64X_INS_PACKL4 = 90
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TMS320C64X_INS_PACKLH2 = 91
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TMS320C64X_INS_ROTL = 92
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TMS320C64X_INS_SADD = 93
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TMS320C64X_INS_SADD2 = 94
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TMS320C64X_INS_SADDU4 = 95
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TMS320C64X_INS_SADDUS2 = 96
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TMS320C64X_INS_SAT = 97
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TMS320C64X_INS_SET = 98
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TMS320C64X_INS_SHFL = 99
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TMS320C64X_INS_SHL = 100
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TMS320C64X_INS_SHLMB = 101
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TMS320C64X_INS_SHR = 102
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TMS320C64X_INS_SHR2 = 103
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TMS320C64X_INS_SHRMB = 104
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TMS320C64X_INS_SHRU = 105
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TMS320C64X_INS_SHRU2 = 106
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TMS320C64X_INS_SMPY = 107
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TMS320C64X_INS_SMPY2 = 108
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TMS320C64X_INS_SMPYH = 109
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TMS320C64X_INS_SMPYHL = 110
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TMS320C64X_INS_SMPYLH = 111
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TMS320C64X_INS_SPACK2 = 112
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TMS320C64X_INS_SPACKU4 = 113
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TMS320C64X_INS_SSHL = 114
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TMS320C64X_INS_SSHVL = 115
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TMS320C64X_INS_SSHVR = 116
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TMS320C64X_INS_SSUB = 117
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TMS320C64X_INS_STB = 118
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TMS320C64X_INS_STDW = 119
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TMS320C64X_INS_STH = 120
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TMS320C64X_INS_STNDW = 121
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TMS320C64X_INS_STNW = 122
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TMS320C64X_INS_STW = 123
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TMS320C64X_INS_SUB = 124
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TMS320C64X_INS_SUB2 = 125
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TMS320C64X_INS_SUB4 = 126
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TMS320C64X_INS_SUBAB = 127
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TMS320C64X_INS_SUBABS4 = 128
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TMS320C64X_INS_SUBAH = 129
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TMS320C64X_INS_SUBAW = 130
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TMS320C64X_INS_SUBC = 131
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TMS320C64X_INS_SUBU = 132
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TMS320C64X_INS_SWAP4 = 133
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TMS320C64X_INS_UNPKHU4 = 134
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TMS320C64X_INS_UNPKLU4 = 135
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TMS320C64X_INS_XOR = 136
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TMS320C64X_INS_XPND2 = 137
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TMS320C64X_INS_XPND4 = 138
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TMS320C64X_INS_IDLE = 139
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TMS320C64X_INS_MV = 140
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TMS320C64X_INS_NEG = 141
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TMS320C64X_INS_NOT = 142
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TMS320C64X_INS_SWAP2 = 143
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TMS320C64X_INS_ZERO = 144
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TMS320C64X_INS_ENDING = 145
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TMS320C64X_GRP_INVALID = 0
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TMS320C64X_GRP_JUMP = 1
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TMS320C64X_GRP_FUNIT_D = 128
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TMS320C64X_GRP_FUNIT_L = 129
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TMS320C64X_GRP_FUNIT_M = 130
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TMS320C64X_GRP_FUNIT_S = 131
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TMS320C64X_GRP_FUNIT_NO = 132
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TMS320C64X_GRP_ENDING = 133
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TMS320C64X_FUNIT_INVALID = 0
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TMS320C64X_FUNIT_D = 1
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TMS320C64X_FUNIT_L = 2
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TMS320C64X_FUNIT_M = 3
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TMS320C64X_FUNIT_S = 4
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TMS320C64X_FUNIT_NO = 5
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