5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705) 99f018ac Python binding: (#2742) a07baf83 Auto-Sync update Sparc LLVM-18 (#2704) 81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733) a25d4980 Add warning about naive search and replace to patch reg names. (#2728) 7ac87d17 Print immediate only memory operands for AArch64. (#2732) c34034c8 Add x30 implicit read to the RET alias. (#2739) 95a4ca3e Update source list before installing valgrind. (#2730) 6909724e Make assertion hit warnings optional in release builds. (#2729) fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723) 21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721) df26583f clang-format: change license to BSD-3-Clause (#2724) 280b749e Remove unused files. (#2709) 87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707) efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720) 2ae64133 Fix missing sp register read in ret instruction (#2719) 8df252a6 Fix arm pop reg access (#2718) 14612272 ARM: fix typo, cspr -> cpsr (#2716) f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701) 829be2bf LoongArch: Compute absolute address for address operand (#2699) 42fbce6c Add jump group for generic jirl (#2698) fc525c73 Apple AArch64 proprietary (#2692) 895f2f2e Build PDB for debugging on Windows (#2685) 5c3aef03 Version: Update to v6.0.0-alpha4 (#2682) 106f7d3b Update read/written registers for x87 comparison instructions (#2680) ebe3ef2a Add workflow for building on Windows (#2675) 72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678) 5b5c5ed8 Fix nanomips decoding of jalrc (#2672) ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 21178aea Add a script to compare the inc file content with the latest generated ones. (#2667) 81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665) 98a393e3 Stringify BH fields when printing ppc details (#2663) 2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661) 5058c634 Decode BH field in print_insn_detail_ppc (#2662) 6461ed08 Add Call group to svc, smc and hvc. (#2651) e2f1dc8d Tms32c64x Little Endian (#2648) 5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645) bb2f6579 Enhance shift value and types of shift instructions. (#2638) cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633) dc0c0909 cmake: Fix building capstone as sub-project (#2629) cd8dd20c - Added missing files for sdist archive (#2624) 9affd99b Give the user some guidance where to add missing enumeration values. (#2639) 1bea3fab Add checks for MIPS details on cstest_py (#2640) ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635) 1abe1868 Build Tarball before DEB/RPM package. (#2627) 0a012190 Switch to ubuntu-24.04-arm runner image (#2625) 4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620) 8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616) d7ef910b Rebased #2570 (#2614) c831cd5e Fix SystemZ macro in Makefile (#2603) 30601176 Apply new EVM opcode updates (#2602) 3c4d7fc8 Add tricore tc1.8 instructions (#2595) 5f290cad Create debian and rpm package on releases (#2590) 0f09210a delete travis (#2600) 5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598) git-subtree-dir: external/capstone git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
200 lines
5.0 KiB
C
200 lines
5.0 KiB
C
/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include <stdio.h>
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#include <capstone/capstone.h>
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#include "capstone/ppc.h"
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#include "cstool.h"
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static const char* get_pred_name(ppc_pred pred)
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{
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switch(pred) {
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default:
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return ("invalid");
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case PPC_PRED_LT:
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case PPC_PRED_LT_MINUS:
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case PPC_PRED_LT_PLUS:
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case PPC_PRED_LT_RESERVED:
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return ("lt");
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case PPC_PRED_LE:
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case PPC_PRED_LE_MINUS:
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case PPC_PRED_LE_PLUS:
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case PPC_PRED_LE_RESERVED:
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return ("le");
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case PPC_PRED_EQ:
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case PPC_PRED_EQ_MINUS:
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case PPC_PRED_EQ_PLUS:
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case PPC_PRED_EQ_RESERVED:
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return ("eq");
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case PPC_PRED_GE:
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case PPC_PRED_GE_MINUS:
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case PPC_PRED_GE_PLUS:
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case PPC_PRED_GE_RESERVED:
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return ("ge");
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case PPC_PRED_GT:
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case PPC_PRED_GT_MINUS:
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case PPC_PRED_GT_PLUS:
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case PPC_PRED_GT_RESERVED:
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return ("gt");
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case PPC_PRED_NE:
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case PPC_PRED_NE_MINUS:
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case PPC_PRED_NE_PLUS:
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case PPC_PRED_NE_RESERVED:
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return ("ne");
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case PPC_PRED_UN: // PPC_PRED_SO
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case PPC_PRED_UN_MINUS:
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case PPC_PRED_UN_PLUS:
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case PPC_PRED_UN_RESERVED:
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return ("so/un");
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case PPC_PRED_NU: // PPC_PRED_NS
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case PPC_PRED_NU_MINUS:
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case PPC_PRED_NU_PLUS:
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case PPC_PRED_NU_RESERVED:
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return ("ns/nu");
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case PPC_PRED_NZ:
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case PPC_PRED_NZ_MINUS:
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case PPC_PRED_NZ_PLUS:
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case PPC_PRED_NZ_RESERVED:
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return ("nz");
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case PPC_PRED_Z:
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case PPC_PRED_Z_MINUS:
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case PPC_PRED_Z_PLUS:
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case PPC_PRED_Z_RESERVED:
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return ("z");
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case PPC_PRED_BIT_SET:
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return "bit-set";
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case PPC_PRED_BIT_UNSET:
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return "bit-unset";
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}
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}
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static const char *get_pred_hint(ppc_br_hint at) {
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switch (at) {
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default:
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return "invalid";
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case PPC_BR_NOT_GIVEN:
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return "not-given";
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case PPC_BR_TAKEN:
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return "likely-taken";
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case PPC_BR_NOT_TAKEN:
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return "likely-not-taken";
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case PPC_BR_RESERVED:
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return "reserved";
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}
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}
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void print_insn_detail_ppc(csh handle, cs_insn *ins)
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{
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cs_ppc *ppc;
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int i;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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ppc = &(ins->detail->ppc);
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if (ppc->op_count)
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printf("\top_count: %u\n", ppc->op_count);
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for (i = 0; i < ppc->op_count; i++) {
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cs_ppc_op *op = &(ppc->operands[i]);
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switch((int)op->type) {
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default:
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break;
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case PPC_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
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break;
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case PPC_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%"PRIx64"\n", i, op->imm);
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break;
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case PPC_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.base != PPC_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n",
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i, cs_reg_name(handle, op->mem.base));
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if (op->mem.offset != PPC_REG_INVALID)
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printf("\t\t\toperands[%u].mem.offset: REG = %s\n", i,
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cs_reg_name(handle, op->mem.offset));
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if (op->mem.disp != 0)
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printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
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break;
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}
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switch(op->access) {
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default:
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break;
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case CS_AC_READ:
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printf("\t\toperands[%u].access: READ\n", i);
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break;
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case CS_AC_WRITE:
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printf("\t\toperands[%u].access: WRITE\n", i);
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break;
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case CS_AC_READ_WRITE:
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printf("\t\toperands[%u].access: READ | WRITE\n", i);
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break;
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}
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}
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if (ppc->bc.pred_cr != PPC_PRED_INVALID ||
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ppc->bc.pred_ctr != PPC_PRED_INVALID) {
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printf("\tBranch:\n");
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printf("\t\tbi: %u\n", ppc->bc.bi);
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printf("\t\tbo: %u\n", ppc->bc.bo);
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if (ppc->bc.bh != PPC_BH_INVALID) {
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char const* msg = NULL;
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switch(ppc->bc.bh) {
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case PPC_BH_SUBROUTINE_RET:
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msg = "subroutine return";
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break;
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case PPC_BH_NO_SUBROUTINE_RET:
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msg = "not a subroutine return";
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break;
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case PPC_BH_NOT_PREDICTABLE:
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msg = "unpredictable";
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break;
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case PPC_BH_RESERVED:
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msg = "reserved";
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break;
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case PPC_BH_INVALID: break;
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}
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printf("\t\tbh: %s\n", msg);
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}
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if (ppc->bc.pred_cr != PPC_PRED_INVALID) {
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printf("\t\tcrX: %s\n", cs_reg_name(handle, ppc->bc.crX));
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printf("\t\tpred CR-bit: %s\n", get_pred_name(ppc->bc.pred_cr));
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}
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if (ppc->bc.pred_ctr != PPC_PRED_INVALID)
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printf("\t\tpred CTR: %s\n", get_pred_name(ppc->bc.pred_ctr));
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if (ppc->bc.hint != PPC_BR_NOT_GIVEN)
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printf("\t\thint: %s\n", get_pred_hint(ppc->bc.hint));
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}
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if (ppc->bc.hint != PPC_BR_NOT_GIVEN)
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printf("\tBranch hint (at bits): %u\n", ppc->bc.hint);
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if (ppc->update_cr0)
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printf("\tUpdate-CR0: True\n");
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uint16_t *regs_read = ins->detail->regs_read;
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uint16_t *regs_write = ins->detail->regs_write;
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uint8_t regs_read_count = ins->detail->regs_read_count;
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uint8_t regs_write_count = ins->detail->regs_write_count;
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// Print out all registers accessed by this instruction (either implicit or explicit)
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if (regs_read_count) {
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printf("\tImplicit registers read:");
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for(i = 0; i < regs_read_count; i++) {
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printf(" %s", cs_reg_name(handle, regs_read[i]));
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}
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printf("\n");
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}
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if (regs_write_count) {
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printf("\tImplicit registers modified:");
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for(i = 0; i < regs_write_count; i++) {
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printf(" %s", cs_reg_name(handle, regs_write[i]));
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}
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printf("\n");
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}
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}
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