Files
kaizen/include/capstone/bpf.h
irisz64 16a2cf3873 Squashed 'external/capstone/' changes from b102f1b8..5af28808
5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705)
99f018ac Python binding: (#2742)
a07baf83 Auto-Sync update Sparc LLVM-18 (#2704)
81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733)
a25d4980 Add warning about naive search and replace to patch reg names. (#2728)
7ac87d17 Print immediate only memory operands for AArch64. (#2732)
c34034c8 Add x30 implicit read to the RET alias. (#2739)
95a4ca3e Update source list before installing valgrind. (#2730)
6909724e Make assertion hit warnings optional in release builds. (#2729)
fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723)
21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721)
df26583f clang-format: change license to BSD-3-Clause (#2724)
280b749e Remove unused files. (#2709)
87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707)
efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720)
2ae64133 Fix missing sp register read in ret instruction (#2719)
8df252a6 Fix arm pop reg access (#2718)
14612272 ARM: fix typo, cspr -> cpsr (#2716)
f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701)
829be2bf LoongArch: Compute absolute address for address operand (#2699)
42fbce6c Add jump group for generic jirl (#2698)
fc525c73 Apple AArch64 proprietary (#2692)
895f2f2e Build PDB for debugging on Windows (#2685)
5c3aef03 Version: Update to v6.0.0-alpha4 (#2682)
106f7d3b Update read/written registers for x87 comparison instructions (#2680)
ebe3ef2a Add workflow for building on Windows (#2675)
72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678)
5b5c5ed8 Fix nanomips decoding of jalrc (#2672)
ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673)
21178aea Add a script to compare the inc file content with the latest generated ones. (#2667)
81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665)
98a393e3 Stringify BH fields when printing ppc details (#2663)
2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661)
5058c634 Decode BH field in print_insn_detail_ppc (#2662)
6461ed08 Add Call group to svc, smc and hvc. (#2651)
e2f1dc8d Tms32c64x Little Endian (#2648)
5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645)
bb2f6579 Enhance shift value and types of shift instructions. (#2638)
cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633)
dc0c0909 cmake: Fix building capstone as sub-project (#2629)
cd8dd20c - Added missing files for sdist archive (#2624)
9affd99b Give the user some guidance where to add missing enumeration values. (#2639)
1bea3fab Add checks for MIPS details on cstest_py (#2640)
ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635)
1abe1868 Build Tarball before DEB/RPM package. (#2627)
0a012190 Switch to ubuntu-24.04-arm runner image (#2625)
4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620)
8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616)
d7ef910b Rebased #2570 (#2614)
c831cd5e Fix SystemZ macro in Makefile (#2603)
30601176 Apply new EVM opcode updates (#2602)
3c4d7fc8 Add tricore tc1.8 instructions (#2595)
5f290cad Create debian and rpm package on releases (#2590)
0f09210a delete travis (#2600)
5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598)

git-subtree-dir: external/capstone
git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
2025-06-26 22:15:44 +02:00

270 lines
5.5 KiB
C

/* Capstone Disassembly Engine */
/* BPF Backend by david942j <david942j@gmail.com>, 2019 */
/* SPDX-FileCopyrightText: 2024 Roee Toledano <roeetoledano10@gmail.com> */
/* SPDX-License-Identifier: BSD-3 */
#ifndef CAPSTONE_BPF_H
#define CAPSTONE_BPF_H
#ifdef __cplusplus
extern "C" {
#endif
#include "platform.h"
#include "cs_operand.h"
#ifdef _MSC_VER
#pragma warning(disable : 4201)
#endif
#define NUM_BPF_OPS 3
/// Operand type for instruction's operands
typedef enum bpf_op_type {
BPF_OP_INVALID = CS_OP_INVALID,
BPF_OP_REG = CS_OP_REG,
BPF_OP_IMM = CS_OP_IMM,
BPF_OP_OFF = CS_OP_SPECIAL + 0,
BPF_OP_MSH = CS_OP_SPECIAL + 1, ///< corresponds to cBPF's BPF_MSH mode
BPF_OP_EXT = CS_OP_SPECIAL + 2, ///< cBPF's extension (not eBPF)
BPF_OP_MMEM = CS_OP_MEM | (CS_OP_SPECIAL + 3), ///< M[k] in cBPF
BPF_OP_MEM = CS_OP_MEM,
} bpf_op_type;
/// BPF registers
typedef enum bpf_reg {
BPF_REG_INVALID = 0,
///< cBPF
BPF_REG_A,
BPF_REG_X,
///< eBPF
BPF_REG_R0,
BPF_REG_R1,
BPF_REG_R2,
BPF_REG_R3,
BPF_REG_R4,
BPF_REG_R5,
BPF_REG_R6,
BPF_REG_R7,
BPF_REG_R8,
BPF_REG_R9,
BPF_REG_R10,
BPF_REG_ENDING,
} bpf_reg;
/// Instruction's operand referring to memory
/// This is associated with BPF_OP_MEM operand type above
typedef struct bpf_op_mem {
bpf_reg base; ///< base register
uint32_t disp; ///< offset value
} bpf_op_mem;
typedef enum bpf_ext_type {
BPF_EXT_INVALID = 0,
BPF_EXT_LEN,
} bpf_ext_type;
/// Instruction operand
typedef struct cs_bpf_op {
bpf_op_type type;
union {
uint8_t reg; ///< register value for REG operand
uint64_t imm; ///< immediate value IMM operand
uint32_t off; ///< offset value, used in jump & call
bpf_op_mem mem; ///< base/disp value for MEM operand
/* cBPF only */
uint32_t mmem; ///< M[k] in cBPF
uint32_t msh; ///< corresponds to cBPF's BPF_MSH mode
uint32_t ext; ///< cBPF's extension (not eBPF)
};
bool is_signed; ///< is this operand signed? It is set for memory, immediate and offset operands.
bool is_pkt; ///< is this operand referring to packet data? It is set for memory operands.
/// How is this operand accessed? (READ, WRITE or READ|WRITE)
/// This field is combined of cs_ac_type.
/// NOTE: this field is irrelevant if engine is compiled in DIET mode.
cs_ac_type access;
} cs_bpf_op;
/// Instruction structure
typedef struct cs_bpf {
uint8_t op_count;
cs_bpf_op operands[4];
} cs_bpf;
/// BPF instruction
typedef enum bpf_insn {
BPF_INS_INVALID = 0,
///< ALU
BPF_INS_ADD,
BPF_INS_SUB,
BPF_INS_MUL,
BPF_INS_DIV,
BPF_INS_SDIV,
BPF_INS_OR,
BPF_INS_AND,
BPF_INS_LSH,
BPF_INS_RSH,
BPF_INS_NEG,
BPF_INS_MOD,
BPF_INS_SMOD,
BPF_INS_XOR,
BPF_INS_MOV, ///< eBPF only
BPF_INS_MOVSB, ///< eBPF only
BPF_INS_MOVSH, ///< eBPF only
BPF_INS_ARSH, ///< eBPF only
///< ALU64, eBPF only
BPF_INS_ADD64,
BPF_INS_SUB64,
BPF_INS_MUL64,
BPF_INS_DIV64,
BPF_INS_SDIV64,
BPF_INS_OR64,
BPF_INS_AND64,
BPF_INS_LSH64,
BPF_INS_RSH64,
BPF_INS_NEG64,
BPF_INS_MOD64,
BPF_INS_SMOD64,
BPF_INS_XOR64,
BPF_INS_MOV64,
BPF_INS_MOVSB64,
BPF_INS_MOVSH64,
BPF_INS_MOVSW64,
BPF_INS_ARSH64,
///< Byteswap, eBPF only
BPF_INS_LE16,
BPF_INS_LE32,
BPF_INS_LE64,
BPF_INS_BE16,
BPF_INS_BE32,
BPF_INS_BE64,
BPF_INS_BSWAP16,
BPF_INS_BSWAP32,
BPF_INS_BSWAP64,
///< Load
BPF_INS_LDW, ///< eBPF only
BPF_INS_LDH,
BPF_INS_LDB,
BPF_INS_LDDW, ///< eBPF only: load 64-bit imm
BPF_INS_LDXW, ///< eBPF only
BPF_INS_LDXH, ///< eBPF only
BPF_INS_LDXB, ///< eBPF only
BPF_INS_LDXDW, ///< eBPF only
///< Packet data access
BPF_INS_LDABSW, ///< eBPF only
BPF_INS_LDABSH, ///< eBPF only
BPF_INS_LDABSB, ///< eBPF only
BPF_INS_LDINDW, ///< eBPF only
BPF_INS_LDINDH, ///< eBPF only
BPF_INS_LDINDB, ///< eBPF only
///< Store
BPF_INS_STW, ///< eBPF only
BPF_INS_STH, ///< eBPF only
BPF_INS_STB, ///< eBPF only
BPF_INS_STDW, ///< eBPF only
BPF_INS_STXW, ///< eBPF only
BPF_INS_STXH, ///< eBPF only
BPF_INS_STXB, ///< eBPF only
BPF_INS_STXDW, ///< eBPF only
BPF_INS_XADDW, ///< eBPF only
BPF_INS_XADDDW, ///< eBPF only
///< Jump
BPF_INS_JA,
BPF_INS_JEQ,
BPF_INS_JGT,
BPF_INS_JGE,
BPF_INS_JSET,
BPF_INS_JNE, ///< eBPF only
BPF_INS_JSGT, ///< eBPF only
BPF_INS_JSGE, ///< eBPF only
BPF_INS_CALL, ///< eBPF only
BPF_INS_CALLX, ///< eBPF only
BPF_INS_EXIT, ///< eBPF only
BPF_INS_JLT, ///< eBPF only
BPF_INS_JLE, ///< eBPF only
BPF_INS_JSLT, ///< eBPF only
BPF_INS_JSLE, ///< eBPF only
///< Jump32, eBPF only
BPF_INS_JAL,
BPF_INS_JEQ32,
BPF_INS_JGT32,
BPF_INS_JGE32,
BPF_INS_JSET32,
BPF_INS_JNE32,
BPF_INS_JSGT32,
BPF_INS_JSGE32,
BPF_INS_JLT32,
BPF_INS_JLE32,
BPF_INS_JSLT32,
BPF_INS_JSLE32,
///< Return, cBPF only
BPF_INS_RET,
///< Atomic, eBPF only
BPF_INS_AADD,
BPF_INS_AOR,
BPF_INS_AAND,
BPF_INS_AXOR,
BPF_INS_AFADD,
BPF_INS_AFOR,
BPF_INS_AFAND,
BPF_INS_AFXOR,
///< Atomic 64-bit, eBPF only
BPF_INS_AXCHG64,
BPF_INS_ACMPXCHG64,
BPF_INS_AADD64,
BPF_INS_AOR64,
BPF_INS_AAND64,
BPF_INS_AXOR64,
BPF_INS_AFADD64,
BPF_INS_AFOR64,
BPF_INS_AFAND64,
BPF_INS_AFXOR64,
///< Misc, cBPF only
BPF_INS_TAX,
BPF_INS_TXA,
BPF_INS_ENDING,
// alias instructions
BPF_INS_LD = BPF_INS_LDW, ///< cBPF only
BPF_INS_LDX = BPF_INS_LDXW, ///< cBPF only
BPF_INS_ST = BPF_INS_STW, ///< cBPF only
BPF_INS_STX = BPF_INS_STXW, ///< cBPF only
} bpf_insn;
/// Group of BPF instructions
typedef enum bpf_insn_group {
BPF_GRP_INVALID = 0, ///< = CS_GRP_INVALID
BPF_GRP_LOAD,
BPF_GRP_STORE,
BPF_GRP_ALU,
BPF_GRP_JUMP,
BPF_GRP_CALL, ///< eBPF only
BPF_GRP_RETURN,
BPF_GRP_MISC, ///< cBPF only
BPF_GRP_ENDING,
} bpf_insn_group;
#ifdef __cplusplus
}
#endif
#endif