5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705) 99f018ac Python binding: (#2742) a07baf83 Auto-Sync update Sparc LLVM-18 (#2704) 81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733) a25d4980 Add warning about naive search and replace to patch reg names. (#2728) 7ac87d17 Print immediate only memory operands for AArch64. (#2732) c34034c8 Add x30 implicit read to the RET alias. (#2739) 95a4ca3e Update source list before installing valgrind. (#2730) 6909724e Make assertion hit warnings optional in release builds. (#2729) fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723) 21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721) df26583f clang-format: change license to BSD-3-Clause (#2724) 280b749e Remove unused files. (#2709) 87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707) efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720) 2ae64133 Fix missing sp register read in ret instruction (#2719) 8df252a6 Fix arm pop reg access (#2718) 14612272 ARM: fix typo, cspr -> cpsr (#2716) f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701) 829be2bf LoongArch: Compute absolute address for address operand (#2699) 42fbce6c Add jump group for generic jirl (#2698) fc525c73 Apple AArch64 proprietary (#2692) 895f2f2e Build PDB for debugging on Windows (#2685) 5c3aef03 Version: Update to v6.0.0-alpha4 (#2682) 106f7d3b Update read/written registers for x87 comparison instructions (#2680) ebe3ef2a Add workflow for building on Windows (#2675) 72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678) 5b5c5ed8 Fix nanomips decoding of jalrc (#2672) ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 21178aea Add a script to compare the inc file content with the latest generated ones. (#2667) 81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665) 98a393e3 Stringify BH fields when printing ppc details (#2663) 2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661) 5058c634 Decode BH field in print_insn_detail_ppc (#2662) 6461ed08 Add Call group to svc, smc and hvc. (#2651) e2f1dc8d Tms32c64x Little Endian (#2648) 5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645) bb2f6579 Enhance shift value and types of shift instructions. (#2638) cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633) dc0c0909 cmake: Fix building capstone as sub-project (#2629) cd8dd20c - Added missing files for sdist archive (#2624) 9affd99b Give the user some guidance where to add missing enumeration values. (#2639) 1bea3fab Add checks for MIPS details on cstest_py (#2640) ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635) 1abe1868 Build Tarball before DEB/RPM package. (#2627) 0a012190 Switch to ubuntu-24.04-arm runner image (#2625) 4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620) 8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616) d7ef910b Rebased #2570 (#2614) c831cd5e Fix SystemZ macro in Makefile (#2603) 30601176 Apply new EVM opcode updates (#2602) 3c4d7fc8 Add tricore tc1.8 instructions (#2595) 5f290cad Create debian and rpm package on releases (#2590) 0f09210a delete travis (#2600) 5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598) git-subtree-dir: external/capstone git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
270 lines
5.5 KiB
C
270 lines
5.5 KiB
C
/* Capstone Disassembly Engine */
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/* BPF Backend by david942j <david942j@gmail.com>, 2019 */
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/* SPDX-FileCopyrightText: 2024 Roee Toledano <roeetoledano10@gmail.com> */
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/* SPDX-License-Identifier: BSD-3 */
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#ifndef CAPSTONE_BPF_H
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#define CAPSTONE_BPF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "platform.h"
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#include "cs_operand.h"
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#ifdef _MSC_VER
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#pragma warning(disable : 4201)
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#endif
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#define NUM_BPF_OPS 3
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/// Operand type for instruction's operands
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typedef enum bpf_op_type {
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BPF_OP_INVALID = CS_OP_INVALID,
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BPF_OP_REG = CS_OP_REG,
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BPF_OP_IMM = CS_OP_IMM,
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BPF_OP_OFF = CS_OP_SPECIAL + 0,
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BPF_OP_MSH = CS_OP_SPECIAL + 1, ///< corresponds to cBPF's BPF_MSH mode
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BPF_OP_EXT = CS_OP_SPECIAL + 2, ///< cBPF's extension (not eBPF)
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BPF_OP_MMEM = CS_OP_MEM | (CS_OP_SPECIAL + 3), ///< M[k] in cBPF
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BPF_OP_MEM = CS_OP_MEM,
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} bpf_op_type;
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/// BPF registers
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typedef enum bpf_reg {
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BPF_REG_INVALID = 0,
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///< cBPF
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BPF_REG_A,
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BPF_REG_X,
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///< eBPF
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BPF_REG_R0,
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BPF_REG_R1,
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BPF_REG_R2,
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BPF_REG_R3,
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BPF_REG_R4,
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BPF_REG_R5,
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BPF_REG_R6,
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BPF_REG_R7,
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BPF_REG_R8,
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BPF_REG_R9,
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BPF_REG_R10,
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BPF_REG_ENDING,
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} bpf_reg;
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/// Instruction's operand referring to memory
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/// This is associated with BPF_OP_MEM operand type above
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typedef struct bpf_op_mem {
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bpf_reg base; ///< base register
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uint32_t disp; ///< offset value
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} bpf_op_mem;
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typedef enum bpf_ext_type {
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BPF_EXT_INVALID = 0,
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BPF_EXT_LEN,
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} bpf_ext_type;
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/// Instruction operand
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typedef struct cs_bpf_op {
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bpf_op_type type;
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union {
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uint8_t reg; ///< register value for REG operand
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uint64_t imm; ///< immediate value IMM operand
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uint32_t off; ///< offset value, used in jump & call
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bpf_op_mem mem; ///< base/disp value for MEM operand
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/* cBPF only */
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uint32_t mmem; ///< M[k] in cBPF
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uint32_t msh; ///< corresponds to cBPF's BPF_MSH mode
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uint32_t ext; ///< cBPF's extension (not eBPF)
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};
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bool is_signed; ///< is this operand signed? It is set for memory, immediate and offset operands.
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bool is_pkt; ///< is this operand referring to packet data? It is set for memory operands.
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/// How is this operand accessed? (READ, WRITE or READ|WRITE)
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/// This field is combined of cs_ac_type.
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/// NOTE: this field is irrelevant if engine is compiled in DIET mode.
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cs_ac_type access;
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} cs_bpf_op;
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/// Instruction structure
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typedef struct cs_bpf {
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uint8_t op_count;
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cs_bpf_op operands[4];
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} cs_bpf;
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/// BPF instruction
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typedef enum bpf_insn {
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BPF_INS_INVALID = 0,
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///< ALU
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BPF_INS_ADD,
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BPF_INS_SUB,
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BPF_INS_MUL,
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BPF_INS_DIV,
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BPF_INS_SDIV,
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BPF_INS_OR,
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BPF_INS_AND,
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BPF_INS_LSH,
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BPF_INS_RSH,
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BPF_INS_NEG,
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BPF_INS_MOD,
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BPF_INS_SMOD,
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BPF_INS_XOR,
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BPF_INS_MOV, ///< eBPF only
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BPF_INS_MOVSB, ///< eBPF only
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BPF_INS_MOVSH, ///< eBPF only
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BPF_INS_ARSH, ///< eBPF only
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///< ALU64, eBPF only
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BPF_INS_ADD64,
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BPF_INS_SUB64,
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BPF_INS_MUL64,
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BPF_INS_DIV64,
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BPF_INS_SDIV64,
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BPF_INS_OR64,
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BPF_INS_AND64,
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BPF_INS_LSH64,
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BPF_INS_RSH64,
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BPF_INS_NEG64,
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BPF_INS_MOD64,
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BPF_INS_SMOD64,
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BPF_INS_XOR64,
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BPF_INS_MOV64,
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BPF_INS_MOVSB64,
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BPF_INS_MOVSH64,
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BPF_INS_MOVSW64,
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BPF_INS_ARSH64,
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///< Byteswap, eBPF only
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BPF_INS_LE16,
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BPF_INS_LE32,
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BPF_INS_LE64,
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BPF_INS_BE16,
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BPF_INS_BE32,
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BPF_INS_BE64,
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BPF_INS_BSWAP16,
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BPF_INS_BSWAP32,
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BPF_INS_BSWAP64,
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///< Load
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BPF_INS_LDW, ///< eBPF only
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BPF_INS_LDH,
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BPF_INS_LDB,
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BPF_INS_LDDW, ///< eBPF only: load 64-bit imm
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BPF_INS_LDXW, ///< eBPF only
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BPF_INS_LDXH, ///< eBPF only
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BPF_INS_LDXB, ///< eBPF only
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BPF_INS_LDXDW, ///< eBPF only
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///< Packet data access
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BPF_INS_LDABSW, ///< eBPF only
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BPF_INS_LDABSH, ///< eBPF only
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BPF_INS_LDABSB, ///< eBPF only
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BPF_INS_LDINDW, ///< eBPF only
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BPF_INS_LDINDH, ///< eBPF only
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BPF_INS_LDINDB, ///< eBPF only
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///< Store
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BPF_INS_STW, ///< eBPF only
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BPF_INS_STH, ///< eBPF only
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BPF_INS_STB, ///< eBPF only
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BPF_INS_STDW, ///< eBPF only
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BPF_INS_STXW, ///< eBPF only
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BPF_INS_STXH, ///< eBPF only
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BPF_INS_STXB, ///< eBPF only
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BPF_INS_STXDW, ///< eBPF only
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BPF_INS_XADDW, ///< eBPF only
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BPF_INS_XADDDW, ///< eBPF only
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///< Jump
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BPF_INS_JA,
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BPF_INS_JEQ,
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BPF_INS_JGT,
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BPF_INS_JGE,
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BPF_INS_JSET,
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BPF_INS_JNE, ///< eBPF only
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BPF_INS_JSGT, ///< eBPF only
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BPF_INS_JSGE, ///< eBPF only
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BPF_INS_CALL, ///< eBPF only
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BPF_INS_CALLX, ///< eBPF only
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BPF_INS_EXIT, ///< eBPF only
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BPF_INS_JLT, ///< eBPF only
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BPF_INS_JLE, ///< eBPF only
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BPF_INS_JSLT, ///< eBPF only
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BPF_INS_JSLE, ///< eBPF only
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///< Jump32, eBPF only
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BPF_INS_JAL,
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BPF_INS_JEQ32,
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BPF_INS_JGT32,
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BPF_INS_JGE32,
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BPF_INS_JSET32,
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BPF_INS_JNE32,
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BPF_INS_JSGT32,
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BPF_INS_JSGE32,
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BPF_INS_JLT32,
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BPF_INS_JLE32,
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BPF_INS_JSLT32,
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BPF_INS_JSLE32,
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///< Return, cBPF only
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BPF_INS_RET,
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///< Atomic, eBPF only
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BPF_INS_AADD,
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BPF_INS_AOR,
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BPF_INS_AAND,
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BPF_INS_AXOR,
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BPF_INS_AFADD,
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BPF_INS_AFOR,
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BPF_INS_AFAND,
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BPF_INS_AFXOR,
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///< Atomic 64-bit, eBPF only
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BPF_INS_AXCHG64,
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BPF_INS_ACMPXCHG64,
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BPF_INS_AADD64,
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BPF_INS_AOR64,
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BPF_INS_AAND64,
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BPF_INS_AXOR64,
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BPF_INS_AFADD64,
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BPF_INS_AFOR64,
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BPF_INS_AFAND64,
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BPF_INS_AFXOR64,
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///< Misc, cBPF only
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BPF_INS_TAX,
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BPF_INS_TXA,
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BPF_INS_ENDING,
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// alias instructions
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BPF_INS_LD = BPF_INS_LDW, ///< cBPF only
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BPF_INS_LDX = BPF_INS_LDXW, ///< cBPF only
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BPF_INS_ST = BPF_INS_STW, ///< cBPF only
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BPF_INS_STX = BPF_INS_STXW, ///< cBPF only
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} bpf_insn;
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/// Group of BPF instructions
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typedef enum bpf_insn_group {
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BPF_GRP_INVALID = 0, ///< = CS_GRP_INVALID
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BPF_GRP_LOAD,
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BPF_GRP_STORE,
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BPF_GRP_ALU,
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BPF_GRP_JUMP,
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BPF_GRP_CALL, ///< eBPF only
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BPF_GRP_RETURN,
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BPF_GRP_MISC, ///< cBPF only
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BPF_GRP_ENDING,
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} bpf_insn_group;
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#ifdef __cplusplus
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}
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#endif
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#endif
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