5af28808 Update Auto-Sync to Python 3.13 and tree-sitter-py 24.0 (#2705) 99f018ac Python binding: (#2742) a07baf83 Auto-Sync update Sparc LLVM-18 (#2704) 81c5c93d Enable to generate legacy MC tests for the fuzzer. (#2733) a25d4980 Add warning about naive search and replace to patch reg names. (#2728) 7ac87d17 Print immediate only memory operands for AArch64. (#2732) c34034c8 Add x30 implicit read to the RET alias. (#2739) 95a4ca3e Update source list before installing valgrind. (#2730) 6909724e Make assertion hit warnings optional in release builds. (#2729) fe6bdc6e Make SStream respect the CS_OPT_UNSIGNED flag. (#2723) 21ce3624 Use cs_ac_type for operand access mode in all arches and use cs_xtensa_op_type for Xtensa operand type (#2721) df26583f clang-format: change license to BSD-3-Clause (#2724) 280b749e Remove unused files. (#2709) 87908ece Add flag for the SoftFail case of the LLVM disassembler. (#2707) efc0ba44 Fix missing operand for smstart, due to space replaced by tab (#2720) 2ae64133 Fix missing sp register read in ret instruction (#2719) 8df252a6 Fix arm pop reg access (#2718) 14612272 ARM: fix typo, cspr -> cpsr (#2716) f2f0a3c3 Fix LoongArch ld/st instructions register info (#2701) 829be2bf LoongArch: Compute absolute address for address operand (#2699) 42fbce6c Add jump group for generic jirl (#2698) fc525c73 Apple AArch64 proprietary (#2692) 895f2f2e Build PDB for debugging on Windows (#2685) 5c3aef03 Version: Update to v6.0.0-alpha4 (#2682) 106f7d3b Update read/written registers for x87 comparison instructions (#2680) ebe3ef2a Add workflow for building on Windows (#2675) 72f7d305 Revert "Add a script to compare the inc file content with the latest generate…" (#2678) 5b5c5ed8 Fix nanomips decoding of jalrc (#2672) ae03cca4 Mips32r6_64r632 is for both mips32r6 and mips64r6 (#2673) 21178aea Add a script to compare the inc file content with the latest generated ones. (#2667) 81a6ba03 MIPS: Fix MIPS16 decoding, wrong flags and ghost registers (#2665) 98a393e3 Stringify BH fields when printing ppc details (#2663) 2607d0f3 Remove undefined constants in riscv_const.py (#2660) (#2661) 5058c634 Decode BH field in print_insn_detail_ppc (#2662) 6461ed08 Add Call group to svc, smc and hvc. (#2651) e2f1dc8d Tms32c64x Little Endian (#2648) 5464c91d Fix build for compilers requiring explicit static for inline functions.. (#2645) bb2f6579 Enhance shift value and types of shift instructions. (#2638) cd282ef5 Update operand type enums of all arch modules to the one in `capstone.h` (#2633) dc0c0909 cmake: Fix building capstone as sub-project (#2629) cd8dd20c - Added missing files for sdist archive (#2624) 9affd99b Give the user some guidance where to add missing enumeration values. (#2639) 1bea3fab Add checks for MIPS details on cstest_py (#2640) ace8056c Add aliases mapping for MIPS & test for id, alias_id (#2635) 1abe1868 Build Tarball before DEB/RPM package. (#2627) 0a012190 Switch to ubuntu-24.04-arm runner image (#2625) 4e0b8c48 Fix wrong version requirement of tricore instructions: (#2620) 8ac2843b chore(version): Update Version to 6.0.0-Alpha3 (#2616) d7ef910b Rebased #2570 (#2614) c831cd5e Fix SystemZ macro in Makefile (#2603) 30601176 Apply new EVM opcode updates (#2602) 3c4d7fc8 Add tricore tc1.8 instructions (#2595) 5f290cad Create debian and rpm package on releases (#2590) 0f09210a delete travis (#2600) 5c5f756f Downgrade labeler to v4 due to https://github.com/actions/labeler/issues/710. (#2598) git-subtree-dir: external/capstone git-subtree-split: 5af288083e9f03e32723f9708c305692f866b666
252 lines
6.2 KiB
C
252 lines
6.2 KiB
C
/* Capstone Disassembly Engine */
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/* By Spike <spikeinhouse@gmail.com>, xwings 2019 */
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#ifndef CAPSTONE_WASM_H
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#define CAPSTONE_WASM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "platform.h"
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#include "cs_operand.h"
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#ifdef _MSC_VER
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#pragma warning(disable:4201)
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#endif
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typedef enum wasm_op_type {
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WASM_OP_INVALID = CS_OP_INVALID,
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WASM_OP_IMM = CS_OP_IMM,
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WASM_OP_NONE = CS_OP_SPECIAL + 0,
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WASM_OP_INT7 = CS_OP_SPECIAL + 1,
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WASM_OP_VARUINT32 = CS_OP_SPECIAL + 2,
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WASM_OP_VARUINT64 = CS_OP_SPECIAL + 3,
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WASM_OP_UINT32 = CS_OP_SPECIAL + 4,
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WASM_OP_UINT64 = CS_OP_SPECIAL + 5,
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WASM_OP_BRTABLE = CS_OP_SPECIAL + 6,
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} wasm_op_type;
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typedef struct cs_wasm_brtable {
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uint32_t length;
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uint64_t address;
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uint32_t default_target;
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} cs_wasm_brtable;
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typedef struct cs_wasm_op {
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wasm_op_type type;
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uint32_t size;
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union {
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int8_t int7;
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uint32_t varuint32;
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uint64_t varuint64;
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uint32_t uint32;
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uint64_t uint64;
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uint32_t immediate[2];
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cs_wasm_brtable brtable;
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};
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} cs_wasm_op;
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/// Instruction structure
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typedef struct cs_wasm {
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uint8_t op_count;
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cs_wasm_op operands[2];
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} cs_wasm;
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/// WASM instruction
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typedef enum wasm_insn {
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WASM_INS_UNREACHABLE = 0x0,
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WASM_INS_NOP = 0x1,
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WASM_INS_BLOCK = 0x2,
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WASM_INS_LOOP = 0x3,
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WASM_INS_IF = 0x4,
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WASM_INS_ELSE = 0x5,
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WASM_INS_END = 0xb,
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WASM_INS_BR = 0xc,
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WASM_INS_BR_IF = 0xd,
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WASM_INS_BR_TABLE = 0xe,
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WASM_INS_RETURN = 0xf,
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WASM_INS_CALL = 0x10,
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WASM_INS_CALL_INDIRECT = 0x11,
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WASM_INS_DROP = 0x1a,
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WASM_INS_SELECT = 0x1b,
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WASM_INS_GET_LOCAL = 0x20,
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WASM_INS_SET_LOCAL = 0x21,
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WASM_INS_TEE_LOCAL = 0x22,
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WASM_INS_GET_GLOBAL = 0x23,
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WASM_INS_SET_GLOBAL = 0x24,
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WASM_INS_I32_LOAD = 0x28,
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WASM_INS_I64_LOAD = 0x29,
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WASM_INS_F32_LOAD = 0x2a,
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WASM_INS_F64_LOAD = 0x2b,
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WASM_INS_I32_LOAD8_S = 0x2c,
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WASM_INS_I32_LOAD8_U = 0x2d,
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WASM_INS_I32_LOAD16_S = 0x2e,
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WASM_INS_I32_LOAD16_U = 0x2f,
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WASM_INS_I64_LOAD8_S = 0x30,
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WASM_INS_I64_LOAD8_U = 0x31,
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WASM_INS_I64_LOAD16_S = 0x32,
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WASM_INS_I64_LOAD16_U = 0x33,
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WASM_INS_I64_LOAD32_S = 0x34,
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WASM_INS_I64_LOAD32_U = 0x35,
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WASM_INS_I32_STORE = 0x36,
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WASM_INS_I64_STORE = 0x37,
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WASM_INS_F32_STORE = 0x38,
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WASM_INS_F64_STORE = 0x39,
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WASM_INS_I32_STORE8 = 0x3a,
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WASM_INS_I32_STORE16 = 0x3b,
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WASM_INS_I64_STORE8 = 0x3c,
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WASM_INS_I64_STORE16 = 0x3d,
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WASM_INS_I64_STORE32 = 0x3e,
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WASM_INS_CURRENT_MEMORY = 0x3f,
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WASM_INS_GROW_MEMORY = 0x40,
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WASM_INS_I32_CONST = 0x41,
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WASM_INS_I64_CONST = 0x42,
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WASM_INS_F32_CONST = 0x43,
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WASM_INS_F64_CONST = 0x44,
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WASM_INS_I32_EQZ = 0x45,
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WASM_INS_I32_EQ = 0x46,
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WASM_INS_I32_NE = 0x47,
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WASM_INS_I32_LT_S = 0x48,
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WASM_INS_I32_LT_U = 0x49,
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WASM_INS_I32_GT_S = 0x4a,
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WASM_INS_I32_GT_U = 0x4b,
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WASM_INS_I32_LE_S = 0x4c,
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WASM_INS_I32_LE_U = 0x4d,
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WASM_INS_I32_GE_S = 0x4e,
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WASM_INS_I32_GE_U = 0x4f,
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WASM_INS_I64_EQZ = 0x50,
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WASM_INS_I64_EQ = 0x51,
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WASM_INS_I64_NE = 0x52,
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WASM_INS_I64_LT_S = 0x53,
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WASM_INS_I64_LT_U = 0x54,
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WASN_INS_I64_GT_S = 0x55,
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WASM_INS_I64_GT_U = 0x56,
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WASM_INS_I64_LE_S = 0x57,
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WASM_INS_I64_LE_U = 0x58,
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WASM_INS_I64_GE_S = 0x59,
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WASM_INS_I64_GE_U = 0x5a,
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WASM_INS_F32_EQ = 0x5b,
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WASM_INS_F32_NE = 0x5c,
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WASM_INS_F32_LT = 0x5d,
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WASM_INS_F32_GT = 0x5e,
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WASM_INS_F32_LE = 0x5f,
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WASM_INS_F32_GE = 0x60,
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WASM_INS_F64_EQ = 0x61,
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WASM_INS_F64_NE = 0x62,
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WASM_INS_F64_LT = 0x63,
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WASM_INS_F64_GT = 0x64,
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WASM_INS_F64_LE = 0x65,
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WASM_INS_F64_GE = 0x66,
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WASM_INS_I32_CLZ = 0x67,
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WASM_INS_I32_CTZ = 0x68,
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WASM_INS_I32_POPCNT = 0x69,
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WASM_INS_I32_ADD = 0x6a,
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WASM_INS_I32_SUB = 0x6b,
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WASM_INS_I32_MUL = 0x6c,
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WASM_INS_I32_DIV_S = 0x6d,
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WASM_INS_I32_DIV_U = 0x6e,
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WASM_INS_I32_REM_S = 0x6f,
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WASM_INS_I32_REM_U = 0x70,
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WASM_INS_I32_AND = 0x71,
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WASM_INS_I32_OR = 0x72,
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WASM_INS_I32_XOR = 0x73,
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WASM_INS_I32_SHL = 0x74,
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WASM_INS_I32_SHR_S = 0x75,
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WASM_INS_I32_SHR_U = 0x76,
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WASM_INS_I32_ROTL = 0x77,
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WASM_INS_I32_ROTR = 0x78,
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WASM_INS_I64_CLZ = 0x79,
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WASM_INS_I64_CTZ = 0x7a,
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WASM_INS_I64_POPCNT = 0x7b,
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WASM_INS_I64_ADD = 0x7c,
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WASM_INS_I64_SUB = 0x7d,
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WASM_INS_I64_MUL = 0x7e,
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WASM_INS_I64_DIV_S = 0x7f,
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WASM_INS_I64_DIV_U = 0x80,
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WASM_INS_I64_REM_S = 0x81,
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WASM_INS_I64_REM_U = 0x82,
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WASM_INS_I64_AND = 0x83,
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WASM_INS_I64_OR = 0x84,
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WASM_INS_I64_XOR = 0x85,
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WASM_INS_I64_SHL = 0x86,
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WASM_INS_I64_SHR_S = 0x87,
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WASM_INS_I64_SHR_U = 0x88,
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WASM_INS_I64_ROTL = 0x89,
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WASM_INS_I64_ROTR = 0x8a,
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WASM_INS_F32_ABS = 0x8b,
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WASM_INS_F32_NEG = 0x8c,
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WASM_INS_F32_CEIL = 0x8d,
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WASM_INS_F32_FLOOR = 0x8e,
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WASM_INS_F32_TRUNC = 0x8f,
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WASM_INS_F32_NEAREST = 0x90,
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WASM_INS_F32_SQRT = 0x91,
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WASM_INS_F32_ADD = 0x92,
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WASM_INS_F32_SUB = 0x93,
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WASM_INS_F32_MUL = 0x94,
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WASM_INS_F32_DIV = 0x95,
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WASM_INS_F32_MIN = 0x96,
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WASM_INS_F32_MAX = 0x97,
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WASM_INS_F32_COPYSIGN = 0x98,
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WASM_INS_F64_ABS = 0x99,
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WASM_INS_F64_NEG = 0x9a,
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WASM_INS_F64_CEIL = 0x9b,
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WASM_INS_F64_FLOOR = 0x9c,
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WASM_INS_F64_TRUNC = 0x9d,
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WASM_INS_F64_NEAREST = 0x9e,
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WASM_INS_F64_SQRT = 0x9f,
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WASM_INS_F64_ADD = 0xa0,
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WASM_INS_F64_SUB = 0xa1,
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WASM_INS_F64_MUL = 0xa2,
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WASM_INS_F64_DIV = 0xa3,
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WASM_INS_F64_MIN = 0xa4,
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WASM_INS_F64_MAX = 0xa5,
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WASM_INS_F64_COPYSIGN = 0xa6,
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WASM_INS_I32_WARP_I64 = 0xa7,
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WASP_INS_I32_TRUNC_S_F32 = 0xa8,
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WASM_INS_I32_TRUNC_U_F32 = 0xa9,
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WASM_INS_I32_TRUNC_S_F64 = 0xaa,
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WASM_INS_I32_TRUNC_U_F64 = 0xab,
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WASM_INS_I64_EXTEND_S_I32 = 0xac,
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WASM_INS_I64_EXTEND_U_I32 = 0xad,
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WASM_INS_I64_TRUNC_S_F32 = 0xae,
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WASM_INS_I64_TRUNC_U_F32 = 0xaf,
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WASM_INS_I64_TRUNC_S_F64 = 0xb0,
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WASM_INS_I64_TRUNC_U_F64 = 0xb1,
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WASM_INS_F32_CONVERT_S_I32 = 0xb2,
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WASM_INS_F32_CONVERT_U_I32 = 0xb3,
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WASM_INS_F32_CONVERT_S_I64 = 0xb4,
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WASM_INS_F32_CONVERT_U_I64 = 0xb5,
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WASM_INS_F32_DEMOTE_F64 = 0xb6,
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WASM_INS_F64_CONVERT_S_I32 = 0xb7,
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WASM_INS_F64_CONVERT_U_I32 = 0xb8,
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WASM_INS_F64_CONVERT_S_I64 = 0xb9,
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WASM_INS_F64_CONVERT_U_I64 = 0xba,
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WASM_INS_F64_PROMOTE_F32 = 0xbb,
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WASM_INS_I32_REINTERPRET_F32 = 0xbc,
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WASM_INS_I64_REINTERPRET_F64 = 0xbd,
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WASM_INS_F32_REINTERPRET_I32 = 0xbe,
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WASM_INS_F64_REINTERPRET_I64 = 0xbf,
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WASM_INS_INVALID = 512,
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WASM_INS_ENDING,
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} wasm_insn;
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/// Group of WASM instructions
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typedef enum wasm_insn_group {
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WASM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
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WASM_GRP_NUMBERIC = 8,
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WASM_GRP_PARAMETRIC,
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WASM_GRP_VARIABLE,
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WASM_GRP_MEMORY,
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WASM_GRP_CONTROL,
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WASM_GRP_ENDING, ///< <-- mark the end of the list of groups
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} wasm_insn_group;
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#ifdef __cplusplus
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}
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#endif
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#endif
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