b102f1b8 Update Actions (#2593) 86293136 Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support (#2594) 27da950c Clarify between machine used vs. Capstone module affected. (#2586) 186f7aa0 Fix linking issue on Windows. (#2587) e160cbc5 Fix complex atomic instructions handling (#2584) 9907b22d Update v6 to have Debian Packages (#2579) efbbc3bb cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally (#2581) be6be784 x86: update read/write registers for transfer instructions (#2578) 812e654c Update BPF arch (#2568) 2c4b05f6 Clean up the cstest documentation and build instructions. (#2580) 4dc14ba1 Fix 2572 (#2574) b25aa841 PPC regressions (#2575) 0a29bf80 Small arm64 compat header fixes (#2563) b42e0903 Make thumb, v8 and m-class positional cstool arguments. (#2557) 89aee400 Add arm64 and sysz compatibility layer to Python bindings (#2559) a4281337 Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 (#2558) ef74d449 Arm regressions (#2556) 93a104c0 PPC LLVM 18 (#2540) e46838ed Merge branch 'v6' into next cf3600e7 Update Changelog Version to 6.0.0-Alpha2 (#2553) b295cf57 Prepare for update (#2552) fc59da4d fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… (#2551) 7d01d7e7 Auto-Sync reproducability + ARM update (#2532) 6ad2608d Python package building rework (#2538) e3bc578d Move debian package generation to a dispatch only workflow (#2543) abbf32b4 fix coverity (#2546) 1ecfb5b0 xtensa: update to espressif/llvm-project (#2533) 379e2a41 Rename build arguments: (#2534) d7be5f9f Change CI to create Debian Package to Release (#2521) f6f96796 tricore: fixes #2474 (#2523) 09f35961 This time actually fix big endian issue. (#2530) 306d5716 Fix endianess issue during assignment. (#2528) 2cfca35e Add CC and VAS compatibility macros (#2525) 32519c01 Fix stringop-truncation warning some compilers raise. (#2522) 5026c2c4 Merge pull request #2507 from thestr4ng3r/no-varargs-aarch64 cecb5ede Fix #2509. (#2510) f97e2705 xtensa: Fix Branch Target (#2516) 1d13a12f AArch64: Replace vararg add_cs_detail by multiple concrete functions 8b618528 Update libcyaml dependency in cstest to 1.4.2 (#2508) ea081286 Tricore EA calculation (#2504) 7db9a080 Fix cstest build with Ninja (#2506) 76242699 Only trigger on released action. (#2497) 981d648b Add hard asserts to all SStream functions and memset MCInst. (#2501) d667a627 Update labeler with Xtensa and v6 files. (#2500) 52b54ee3 Fixing UB santizer, `LITBASE` and assert errors. (#2499) 97db712c Remove irrelevant changes. (#2496) 5bd05e34 Remove irrelevant changes. (#2495) 616488c7 Update changelog for V6.0.0-Alpha1 (#2493) (#2494) c5955b92 Update changelog for V6.0.0-Alpha1 (#2493) a424e709 Be ready for V6-Alpha1 (#2492) 235ba8e0 SystemZ fixes (#2488) 5dffa75b Fix LDR not assigning immediate as memory offset. (#2487) 21f7bc85 Xtensa Support (#2380) 29d87734 Several small fixups (#2489) a34901e9 Update sponsors and remove empty file. (#2485) 3120932d Fix Coverity CID 509730: overflow before widen (#2486) 1014864d Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. (#2482) 0c90fe13 Replace `assert` with `CS_ASSERT` in modules (#2478) 823bfd53 AArch64 issues (#2473) git-subtree-dir: external/capstone git-subtree-split: b102f1b89e0455c072a751d287ab64378c14205f
256 lines
5.1 KiB
C
256 lines
5.1 KiB
C
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <assert.h>
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#include <capstone/capstone.h>
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struct platform {
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cs_arch arch;
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cs_mode mode;
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char *comment;
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};
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FILE * outfile = NULL;
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struct platform platforms[] = {
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{
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// item 0
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CS_ARCH_X86,
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CS_MODE_32,
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"X86 32 (Intel syntax)"
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},
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{
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// item 1
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CS_ARCH_X86,
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CS_MODE_64,
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"X86 64 (Intel syntax)"
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},
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{
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// item 2
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CS_ARCH_ARM,
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CS_MODE_ARM,
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"ARM"
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},
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{
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// item 3
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CS_ARCH_ARM,
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CS_MODE_THUMB,
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"THUMB"
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},
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{
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// item 4
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_ARM + CS_MODE_V8),
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"Arm-V8"
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},
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{
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// item 5
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_THUMB+CS_MODE_V8),
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"THUMB+V8"
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},
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{
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// item 6
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS),
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"Thumb-MClass"
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},
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{
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// item 7
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CS_ARCH_ARM64,
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(cs_mode)0,
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"ARM-64"
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},
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{
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// item 8
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
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"MIPS-32 (Big-endian)"
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},
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{
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// item 9
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO),
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"MIPS-32 (micro)"
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},
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{
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//item 10
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CS_ARCH_MIPS,
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CS_MODE_MIPS64,
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"MIPS-64-EL (Little-endian)"
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},
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{
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//item 11
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CS_ARCH_MIPS,
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CS_MODE_MIPS32,
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"MIPS-32-EL (Little-endian)"
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},
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{
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//item 12
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS64 + CS_MODE_BIG_ENDIAN),
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"MIPS-64 (Big-endian)"
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},
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{
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//item 13
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
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"MIPS-32 | Micro (Big-endian)"
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},
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{
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//item 14
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CS_ARCH_PPC,
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CS_MODE_BIG_ENDIAN,
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"PPC-64"
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},
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{
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//item 15
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CS_ARCH_SPARC,
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CS_MODE_BIG_ENDIAN,
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"Sparc"
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},
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{
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//item 16
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CS_ARCH_SPARC,
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(cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9),
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"SparcV9"
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},
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{
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//item 17
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CS_ARCH_SYSTEMZ,
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(cs_mode)0,
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"SystemZ"
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},
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{
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//item 18
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CS_ARCH_XCORE,
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(cs_mode)0,
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"XCore"
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},
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{
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//item 19
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN),
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"MIPS-32R6 (Big-endian)"
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},
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{
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//item 20
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
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"MIPS-32R6 (Micro+Big-endian)"
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},
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{
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//item 21
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CS_ARCH_MIPS,
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CS_MODE_MIPS32R6,
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"MIPS-32R6 (Little-endian)"
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},
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{
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//item 22
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO),
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"MIPS-32R6 (Micro+Little-endian)"
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},
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{
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//item 23
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CS_ARCH_M68K,
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(cs_mode)0,
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"M68K"
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},
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{
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//item 24
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CS_ARCH_M680X,
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(cs_mode)CS_MODE_M680X_6809,
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"M680X_M6809"
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},
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{
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//item 25
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CS_ARCH_EVM,
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(cs_mode)0,
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"EVM"
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},
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{
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//item 26
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CS_ARCH_XTENSA,
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(cs_mode)CS_MODE_XTENSA_ESP32,
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"Xtensa ESP32"
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},
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{
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//item 27
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CS_ARCH_XTENSA,
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(cs_mode)CS_MODE_XTENSA_ESP32S2,
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"Xtensa ESP32S2"
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},
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{
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//item 28
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CS_ARCH_XTENSA,
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(cs_mode)CS_MODE_XTENSA_ESP8266,
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"Xtensa ESP8266"
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},
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};
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void LLVMFuzzerInit();
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int LLVMFuzzerReturnOneInput(const uint8_t *Data, size_t Size, char * AssemblyText);
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int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
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csh handle;
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cs_insn *insn;
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cs_err err;
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const uint8_t **Datap = &Data;
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size_t * Sizep = &Size;
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uint64_t address = 0x1000;
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char LLVMAssemblyText[80];
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char CapstoneAssemblyText[80];
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if (Size < 1) {
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// 1 byte for arch choice
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return 0;
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} else if (Size > 0x1000) {
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//limit input to 4kb
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Size = 0x1000;
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}
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if (outfile == NULL) {
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// we compute the output
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outfile = fopen("/dev/null", "w");
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if (outfile == NULL) {
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return 0;
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}
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LLVMFuzzerInit();
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}
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if (Data[0] >= sizeof(platforms)/sizeof(platforms[0])) {
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return 0;
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}
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if (LLVMFuzzerReturnOneInput(Data, Size, LLVMAssemblyText) == 1) {
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return 0;
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}
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err = cs_open(platforms[Data[0]].arch, platforms[Data[0]].mode, &handle);
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if (err) {
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return 0;
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}
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insn = cs_malloc(handle);
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Data++;
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Size--;
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assert(insn);
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if (cs_disasm_iter(handle, Datap, Sizep, &address, insn)) {
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snprintf(CapstoneAssemblyText, 80, "\t%s\t%s", insn->mnemonic, insn->op_str);
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if (strcmp(CapstoneAssemblyText, LLVMAssemblyText) != 0) {
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printf("capstone %s != llvm %s", CapstoneAssemblyText, LLVMAssemblyText);
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abort();
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}
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} else {
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printf("capstone failed with llvm %s", LLVMAssemblyText);
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abort();
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}
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cs_free(insn, 1);
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cs_close(&handle);
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return 0;
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}
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