562 lines
21 KiB
C++
562 lines
21 KiB
C++
#include <File.hpp>
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#include <Mem.hpp>
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#include <backend/RomHelpers.hpp>
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#include <cassert>
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#include <Core.hpp>
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#include <Options.hpp>
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#include <Registers.hpp>
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namespace n64 {
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Mem::Mem() : flash(saveData) {
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rom.cart.resize(CART_SIZE);
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std::ranges::fill(rom.cart, 0);
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isviewer_sink = std::ofstream("isviewer.log");
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}
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void Mem::Reset() {
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std::ranges::fill(isviewer, 0);
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flash.Reset();
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if (saveData.is_mapped()) {
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std::error_code err;
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saveData.sync(err);
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if (err) {
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ircolib::error("[Mem]: Could not sync save data!");
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return;
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}
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saveData.unmap();
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}
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mmio.Reset();
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}
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void Mem::LoadSRAM(SaveType save_type, fs::path path) {
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if (save_type == SAVE_SRAM_256k) {
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std::error_code err;
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std::string savePath = Options::GetSavesPath();
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if (!savePath.empty()) {
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path = savePath / path.filename();
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}
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sramPath = path.replace_extension(".sram").string();
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if (saveData.is_mapped()) {
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saveData.sync(err);
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if (err) {
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ircolib::error(R"([Mem]: Could not sync save data stored @ "{}")", sramPath);
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return;
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}
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saveData.unmap();
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}
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auto sramVec = ircolib::read_file_binary(sramPath);
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if (sramVec.empty()) {
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ircolib::write_file_binary(std::array<u8, SRAM_SIZE>{}, sramPath);
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sramVec = ircolib::read_file_binary(sramPath);
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}
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if (sramVec.size() != SRAM_SIZE) {
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ircolib::error("[Mem]: Save data is corrupt or has unexpected size! (it's {} KiB)", sramVec.size() / 1024);
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return;
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}
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saveData = mio::make_mmap_sink(sramPath, err);
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if (err) {
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ircolib::error(R"([Mem]: Could not create file sink for save data @ "{}")", sramPath);
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}
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}
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}
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FORCE_INLINE void SetROMCIC(u32 checksum, ROM &rom) {
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switch (checksum) {
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case 0xEC8B1325:
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rom.cicType = CIC_NUS_7102;
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break; // 7102
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case 0x1DEB51A9:
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rom.cicType = CIC_NUS_6101;
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break; // 6101
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case 0xC08E5BD6:
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rom.cicType = CIC_NUS_6102_7101;
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break;
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case 0x03B8376A:
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rom.cicType = CIC_NUS_6103_7103;
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break;
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case 0xCF7F41DC:
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rom.cicType = CIC_NUS_6105_7105;
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break;
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case 0xD1059C6A:
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rom.cicType = CIC_NUS_6106_7106;
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break;
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default:
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ircolib::warn("Could not determine CIC TYPE! Checksum: 0x{:08X} is unknown!", checksum);
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rom.cicType = UNKNOWN_CIC_TYPE;
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break;
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}
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}
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ROMHeader Mem::ReadROMHeader(bool isArchive, const std::string &filename) {
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ROMHeader res;
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u32 endianness;
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std::vector<u8> buf{};
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if (isArchive) {
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buf = Util::ExtractROMHeaderFromArchive(filename);
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} else {
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buf = Util::OpenROMHeader(filename);
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}
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endianness = std::byteswap(ircolib::read_access<u32>(buf, 0));
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Util::SwapN64Rom<true>(buf, endianness);
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memcpy(&res, buf.data(), sizeof(ROMHeader));
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res.clockRate = std::byteswap(res.clockRate);
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res.programCounter = std::byteswap(res.programCounter);
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res.release = std::byteswap(res.release);
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res.checkCode = std::byteswap(res.checkCode);
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res.reserved = std::byteswap(res.reserved);
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return res;
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}
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ROM Mem::LoadROM(const bool isArchive, const std::string &filename) {
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ROM res;
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res.cart.resize(CART_SIZE);
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std::ranges::fill(res.cart, 0);
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u32 endianness;
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{
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size_t sizeAdjusted;
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std::vector<u8> buf{};
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if (isArchive) {
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buf = Util::ExtractROMFromArchive(filename, sizeAdjusted);
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} else {
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buf = Util::OpenROM(filename, sizeAdjusted);
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}
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endianness = std::byteswap(ircolib::read_access<u32>(buf, 0));
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Util::SwapN64Rom<true>(buf, endianness);
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std::ranges::copy(buf, res.cart.begin());
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memcpy(&res.header, buf.data(), sizeof(ROMHeader));
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}
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res.header.clockRate = std::byteswap(res.header.clockRate);
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res.header.programCounter = std::byteswap(res.header.programCounter);
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res.header.release = std::byteswap(res.header.release);
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res.header.checkCode = std::byteswap(res.header.checkCode);
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res.header.reserved = std::byteswap(res.header.reserved);
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auto [saveType, _, gameNameDB] = GameDB::match(res.header);
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res.saveType = saveType;
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if (gameNameDB.empty()) {
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gameNameDB = fs::path(filename).stem().string();
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}
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res.gameNameDB = gameNameDB;
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const u32 checksum = SDL_crc32(0, &res.cart[0x40], 0x9C0);
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SetROMCIC(checksum, res);
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endianness = std::byteswap(ircolib::read_access<u32>(res.cart, 0));
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Util::SwapN64Rom(res.cart, endianness);
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res.pal = IsROMPAL(res.header);
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return res;
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}
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template <>
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u8 Mem::Read(const u32 paddr) {
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n64::Registers ®s = n64::Core::GetRegs();
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const SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END))
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return mmio.rdp.ReadRDRAM<u8>(paddr);
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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const auto &src = paddr & 0x1000 ? mmio.rsp.imem : mmio.rsp.dmem;
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return src[BYTE_ADDRESS(paddr & 0xfff)];
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2))
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return mmio.pi.BusRead<u8, false>(paddr);
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if (ircolib::is_inside_range(paddr, AI_REGION_START, AI_REGION_END)) {
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const u32 w = mmio.ai.Read(paddr & ~3);
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const int offs = 3 - (paddr & 3);
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return w >> offs * 8 & 0xff;
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}
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2)) {
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ircolib::panic("8-bit read access from MMIO addr 0x{:08X} @ pc 0x{:016X}", paddr, (u64)regs.pc);
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return 0;
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}
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if (ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END))
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return si.pif.bootrom[BYTE_ADDRESS(paddr) - PIF_ROM_REGION_START];
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END))
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return si.pif.ram[paddr - PIF_RAM_REGION_START];
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
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ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
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ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
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ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
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return 0;
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ircolib::panic("8-bit read access in unhandled addr 0x{:08X} @ pc 0x{:016X}", paddr, (u64)regs.pc);
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return 0;
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}
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template <>
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u16 Mem::Read(const u32 paddr) {
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n64::Registers ®s = n64::Core::GetRegs();
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const SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END))
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return mmio.rdp.ReadRDRAM<u16>(paddr);
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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const auto &src = paddr & 0x1000 ? mmio.rsp.imem : mmio.rsp.dmem;
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return ircolib::read_access<u16>(src, HALF_ADDRESS(paddr & 0xfff));
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2))
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return mmio.pi.BusRead<u16, false>(paddr);
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
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return mmio.Read(paddr);
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if (ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END))
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return ircolib::read_access<u16>(si.pif.bootrom, HALF_ADDRESS(paddr) - PIF_ROM_REGION_START);
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END))
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return std::byteswap(ircolib::read_access<u16>(si.pif.ram, paddr - PIF_RAM_REGION_START));
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
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ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
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ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
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ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
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return 0;
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ircolib::panic("16-bit read access in unhandled addr 0x{:08X} @ pc 0x{:016X}", paddr, (u64)regs.pc);
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return 0;
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}
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template <>
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u32 Mem::Read(const u32 paddr) {
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n64::Registers ®s = n64::Core::GetRegs();
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const SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END))
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return mmio.rdp.ReadRDRAM<u32>(paddr);
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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const auto &src = paddr & 0x1000 ? mmio.rsp.imem : mmio.rsp.dmem;
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return ircolib::read_access<u32>(src, paddr & 0xfff);
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2))
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return mmio.pi.BusRead<u32, false>(paddr);
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
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return mmio.Read(paddr);
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if (ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END))
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return ircolib::read_access<u32>(si.pif.bootrom, paddr - PIF_ROM_REGION_START);
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END))
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return std::byteswap(ircolib::read_access<u32>(si.pif.ram, paddr - PIF_RAM_REGION_START));
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
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ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
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ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
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ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
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return 0;
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ircolib::panic("32-bit read access in unhandled addr 0x{:08X} @ pc 0x{:016X}", paddr, (u64)regs.pc);
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return 0;
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}
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template <>
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u64 Mem::Read(const u32 paddr) {
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n64::Registers ®s = n64::Core::GetRegs();
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const SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END))
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return mmio.rdp.ReadRDRAM<u64>(paddr);
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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const auto &src = paddr & 0x1000 ? mmio.rsp.imem : mmio.rsp.dmem;
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return ircolib::read_access<u64>(src, paddr & 0xfff);
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2))
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return mmio.pi.BusRead<u64, false>(paddr);
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
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return mmio.Read(paddr);
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if (ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END))
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return ircolib::read_access<u64>(si.pif.bootrom, paddr - PIF_ROM_REGION_START);
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END))
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return std::byteswap(ircolib::read_access<u64>(si.pif.ram, paddr - PIF_RAM_REGION_START));
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
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ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
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ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
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ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
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return 0;
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ircolib::panic("64-bit read access in unhandled addr 0x{:08X} @ pc 0x{:016X}", paddr, (u64)regs.pc);
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return 0;
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}
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template <>
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void Mem::Write<u8>(u32 paddr, u32 val) {
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n64::Registers ®s = n64::Core::GetRegs();
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SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END)) {
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mmio.rdp.WriteRDRAM<u8>(paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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val = val << (8 * (3 - (paddr & 3)));
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bool is_imem = paddr & 0x1000;
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auto &dest = is_imem ? mmio.rsp.imem : mmio.rsp.dmem;
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paddr = (paddr & 0xFFF) & ~3;
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ircolib::write_access<u32>(dest, paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2)) {
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ircolib::trace("BusWrite<u8> @ {:08X} = {:02X}", paddr, val);
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mmio.pi.BusWrite<u8, false>(paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
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ircolib::panic("MMIO Write<u8>!");
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END)) {
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val = val << (8 * (3 - (paddr & 3)));
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paddr = (paddr - PIF_RAM_REGION_START) & ~3;
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ircolib::write_access<u32>(si.pif.ram, paddr, std::byteswap(val));
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si.pif.ProcessCommands();
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return;
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}
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
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ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
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ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
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ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END) ||
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ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
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return;
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ircolib::panic("Unimplemented 8-bit write at address {:08X} with value {:02X} (PC = {:016X})", paddr, val,
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(u64)regs.pc);
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}
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template <>
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void Mem::Write<u16>(u32 paddr, u32 val) {
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n64::Registers ®s = n64::Core::GetRegs();
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SI &si = mmio.si;
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if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END)) {
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mmio.rdp.WriteRDRAM<u16>(paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
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val = val << (16 * !(paddr & 2));
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bool is_imem = paddr & 0x1000;
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auto &dest = is_imem ? mmio.rsp.imem : mmio.rsp.dmem;
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paddr = (paddr & 0xFFF) & ~3;
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ircolib::write_access<u32>(dest, paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2)) {
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ircolib::trace("BusWrite<u8> @ {:08X} = {:04X}", paddr, val);
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mmio.pi.BusWrite<u16, false>(paddr, val);
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return;
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}
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if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
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ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
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ircolib::panic("MMIO Write<u16>!");
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if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END)) {
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val = val << (16 * !(paddr & 2));
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paddr &= ~3;
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ircolib::write_access<u32>(si.pif.ram, paddr - PIF_RAM_REGION_START, std::byteswap(val));
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si.pif.ProcessCommands();
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return;
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}
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if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
|
|
ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
|
|
ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
|
|
return;
|
|
|
|
ircolib::panic("Unimplemented 16-bit write at address {:08X} with value {:04X} (PC = {:016X})", paddr, val,
|
|
(u64)regs.pc);
|
|
}
|
|
|
|
template <>
|
|
void Mem::Write<u32>(const u32 paddr, const u32 val) {
|
|
n64::Registers ®s = n64::Core::GetRegs();
|
|
SI &si = mmio.si;
|
|
|
|
if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END)) {
|
|
mmio.rdp.WriteRDRAM<u32>(paddr, val);
|
|
return;
|
|
}
|
|
if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
|
|
bool is_imem = paddr & 0x1000;
|
|
auto &dest = is_imem ? mmio.rsp.imem : mmio.rsp.dmem;
|
|
ircolib::write_access<u32>(dest, paddr & 0xfff, val);
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2)) {
|
|
ircolib::trace("BusWrite<u8> @ {:08X} = {:08X}", paddr, val);
|
|
mmio.pi.BusWrite<u32, false>(paddr, val);
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
|
|
ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2)) {
|
|
mmio.Write(paddr, val);
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END)) {
|
|
ircolib::write_access<u32>(si.pif.ram, paddr - PIF_RAM_REGION_START, std::byteswap(val));
|
|
si.pif.ProcessCommands();
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
|
|
ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
|
|
ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
|
|
return;
|
|
|
|
ircolib::panic("Unimplemented 32-bit write at address {:08X} with value {:08X} (PC = {:016X})", paddr, val,
|
|
(u64)regs.pc);
|
|
}
|
|
|
|
void Mem::Write(const u32 paddr, u64 val) {
|
|
n64::Registers ®s = n64::Core::GetRegs();
|
|
SI &si = mmio.si;
|
|
|
|
if (ircolib::is_inside_range(paddr, RDRAM_REGION_START, RDRAM_REGION_END)) {
|
|
mmio.rdp.WriteRDRAM<u64>(paddr, val);
|
|
return;
|
|
}
|
|
if (ircolib::is_inside_range(paddr, DMEM_REGION_START, RSP_MEM_REGION_END)) {
|
|
bool is_imem = paddr & 0x1000;
|
|
auto &dest = is_imem ? mmio.rsp.imem : mmio.rsp.dmem;
|
|
val >>= 32;
|
|
ircolib::write_access<u32>(dest, paddr & 0xfff, val);
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, CART_REGION_START_2_1, CART_REGION_END_1_2)) {
|
|
ircolib::trace("BusWrite<u64> @ {:08X} = {:016X}", paddr, val);
|
|
mmio.pi.BusWrite<false>(paddr, val);
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, MMIO_REGION_START_1, MMIO_REGION_END_1) ||
|
|
ircolib::is_inside_range(paddr, MMIO_REGION_START_2, MMIO_REGION_END_2))
|
|
ircolib::panic("MMIO Write<u64>!");
|
|
|
|
if (ircolib::is_inside_range(paddr, PIF_RAM_REGION_START, PIF_RAM_REGION_END)) {
|
|
ircolib::write_access<u64>(si.pif.ram, paddr - PIF_RAM_REGION_START, std::byteswap(val));
|
|
si.pif.ProcessCommands();
|
|
return;
|
|
}
|
|
|
|
if (ircolib::is_inside_range(paddr, UNUSED_START_1, UNUSED_END_1) || // unused
|
|
ircolib::is_inside_range(paddr, UNUSED_START_2, UNUSED_END_2) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_3, UNUSED_END_3) ||
|
|
ircolib::is_inside_range(paddr, PIF_ROM_REGION_START, PIF_ROM_REGION_END) ||
|
|
ircolib::is_inside_range(paddr, UNUSED_START_4, UNUSED_END_4))
|
|
return;
|
|
|
|
ircolib::panic("Unimplemented 64-bit write at address {:08X} with value {:016X} (PC = {:016X})", paddr, val,
|
|
(u64)regs.pc);
|
|
}
|
|
|
|
template <>
|
|
u32 Mem::BackupRead<u32>(const u32 addr) {
|
|
switch (rom.saveType) {
|
|
case SAVE_NONE:
|
|
return 0;
|
|
case SAVE_EEPROM_4k:
|
|
case SAVE_EEPROM_16k:
|
|
ircolib::warn("Accessing cartridge backup type SAVE_EEPROM, returning 0 for word read");
|
|
return 0;
|
|
case SAVE_FLASH_1m:
|
|
return flash.Read<u32>(addr);
|
|
case SAVE_SRAM_256k:
|
|
return 0xFFFFFFFF;
|
|
default:
|
|
ircolib::panic("Backup read word with unknown save type");
|
|
}
|
|
}
|
|
|
|
template <>
|
|
u8 Mem::BackupRead<u8>(const u32 addr) {
|
|
switch (rom.saveType) {
|
|
case SAVE_NONE:
|
|
return 0;
|
|
case SAVE_EEPROM_4k:
|
|
case SAVE_EEPROM_16k:
|
|
ircolib::warn("Accessing cartridge backup type SAVE_EEPROM, returning 0 for word read");
|
|
return 0;
|
|
case SAVE_FLASH_1m:
|
|
return flash.Read<u8>(addr);
|
|
case SAVE_SRAM_256k:
|
|
if (saveData.is_mapped()) {
|
|
assert(addr < saveData.size());
|
|
return saveData[addr];
|
|
} else {
|
|
ircolib::panic("Invalid backup Read<u8> if save data is not initialized");
|
|
}
|
|
default:
|
|
ircolib::panic("Backup read word with unknown save type");
|
|
}
|
|
}
|
|
|
|
template <>
|
|
void Mem::BackupWrite<u32>(const u32 addr, const u32 val) {
|
|
switch (rom.saveType) {
|
|
case SAVE_NONE:
|
|
ircolib::warn("Accessing cartridge with save type SAVE_NONE in write word");
|
|
break;
|
|
case SAVE_EEPROM_4k:
|
|
case SAVE_EEPROM_16k:
|
|
ircolib::panic("Accessing cartridge with save type SAVE_EEPROM in write word");
|
|
case SAVE_FLASH_1m:
|
|
flash.Write<u32>(addr, val);
|
|
break;
|
|
case SAVE_SRAM_256k:
|
|
break;
|
|
default:
|
|
ircolib::panic("Backup read word with unknown save type");
|
|
}
|
|
}
|
|
|
|
template <>
|
|
void Mem::BackupWrite<u8>(const u32 addr, const u8 val) {
|
|
switch (rom.saveType) {
|
|
case SAVE_NONE:
|
|
ircolib::warn("Accessing cartridge with save type SAVE_NONE in write word");
|
|
break;
|
|
case SAVE_EEPROM_4k:
|
|
case SAVE_EEPROM_16k:
|
|
ircolib::panic("Accessing cartridge with save type SAVE_EEPROM in write word");
|
|
case SAVE_FLASH_1m:
|
|
flash.Write<u8>(addr, val);
|
|
break;
|
|
case SAVE_SRAM_256k:
|
|
if (saveData.is_mapped()) {
|
|
assert(addr < saveData.size());
|
|
saveData[addr] = val;
|
|
} else {
|
|
ircolib::panic("Invalid backup Write<u8> if save data is not initialized");
|
|
}
|
|
break;
|
|
default:
|
|
ircolib::panic("Backup read word with unknown save type");
|
|
}
|
|
}
|
|
} // namespace n64
|