git-subtree-dir: external/capstone git-subtree-split: 5430745e9623786f65c0d773a417f389ebb43395
160 lines
3.9 KiB
Python
160 lines
3.9 KiB
Python
# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com>
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import ctypes
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from . import copy_ctypes_list
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from .aarch64_const import *
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# define the API
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class AArch64OpMem(ctypes.Structure):
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_fields_ = (
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('base', ctypes.c_uint),
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('index', ctypes.c_uint),
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('disp', ctypes.c_int32),
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)
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class AArch64ImmRange(ctypes.Structure):
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_fields_ = (
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('first', ctypes.c_int8),
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('offset', ctypes.c_int8),
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)
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class AArch64SMESliceOffset(ctypes.Union):
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_fields_ = (
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('imm', ctypes.c_int8),
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('imm_range', AArch64ImmRange)
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)
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class AArch64OpSme(ctypes.Structure):
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_fields_ = (
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('type', ctypes.c_uint),
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('tile', ctypes.c_uint),
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('slice_reg', ctypes.c_uint),
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('slice_offset', AArch64SMESliceOffset),
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('has_range_offset', ctypes.c_bool),
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('is_vertical', ctypes.c_bool),
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)
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class AArch64OpPred(ctypes.Structure):
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_fields_ = (
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('reg', ctypes.c_uint),
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('vec_select', ctypes.c_uint),
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('imm_index', ctypes.c_int),
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)
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class AArch64OpShift(ctypes.Structure):
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_fields_ = (
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('type', ctypes.c_uint),
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('value', ctypes.c_uint),
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)
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class AArch64SysOpSysReg(ctypes.Union):
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_fields_ = (
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('sysreg', ctypes.c_uint),
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('tlbi', ctypes.c_uint),
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('ic', ctypes.c_uint),
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('raw_val', ctypes.c_uint64),
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)
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class AArch64SysOpSysImm(ctypes.Union):
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_fields_ = (
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('dbnxs', ctypes.c_uint),
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('exactfpimm', ctypes.c_uint),
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('raw_val', ctypes.c_uint64),
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)
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class AArch64SysOpSysAlias(ctypes.Union):
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_fields_ = (
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('svcr', ctypes.c_uint),
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('at', ctypes.c_uint),
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('db', ctypes.c_uint),
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('dc', ctypes.c_uint),
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('isb', ctypes.c_uint),
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('tsb', ctypes.c_uint),
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('prfm', ctypes.c_uint),
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('sveprfm', ctypes.c_uint),
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('rprfm', ctypes.c_uint),
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('pstateimm0_15', ctypes.c_uint),
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('pstateimm0_1', ctypes.c_uint),
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('psb', ctypes.c_uint),
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('bti', ctypes.c_uint),
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('svepredpat', ctypes.c_uint),
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('sveveclenspecifier', ctypes.c_uint),
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('raw_val', ctypes.c_uint64),
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)
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class AArch64SysOp(ctypes.Structure):
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_fields_ = (
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('reg', AArch64SysOpSysReg),
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('imm', AArch64SysOpSysImm),
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('alias', AArch64SysOpSysAlias),
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('sub_type', ctypes.c_uint),
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)
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class AArch64OpValue(ctypes.Union):
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_fields_ = (
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('reg', ctypes.c_uint),
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('imm', ctypes.c_int64),
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('imm_range', AArch64ImmRange),
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('fp', ctypes.c_double),
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('mem', AArch64OpMem),
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('sysop', AArch64SysOp),
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('sme', AArch64OpSme),
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('pred', AArch64OpPred),
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)
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class AArch64Op(ctypes.Structure):
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_fields_ = (
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('vector_index', ctypes.c_int),
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('vas', ctypes.c_uint),
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('shift', AArch64OpShift),
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('ext', ctypes.c_uint),
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('type', ctypes.c_uint),
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('is_vreg', ctypes.c_bool),
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('value', AArch64OpValue),
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('access', ctypes.c_uint8),
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('is_list_member', ctypes.c_bool),
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)
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@property
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def imm(self):
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return self.value.imm
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@property
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def reg(self):
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return self.value.reg
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@property
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def fp(self):
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return self.value.fp
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@property
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def mem(self):
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return self.value.mem
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@property
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def imm_range(self):
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return self.value.imm_range
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@property
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def sysop(self):
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return self.value.sysop
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@property
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def sme(self):
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return self.value.sme
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class CsAArch64(ctypes.Structure):
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_fields_ = (
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('cc', ctypes.c_uint),
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('update_flags', ctypes.c_bool),
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('post_index', ctypes.c_bool),
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('is_doing_sme', ctypes.c_bool),
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('op_count', ctypes.c_uint8),
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('operands', AArch64Op * 8),
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)
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def get_arch_info(a):
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return (a.cc, a.update_flags, a.post_index, copy_ctypes_list(a.operands[:a.op_count]))
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