352a52804d
git-subtree-dir: external/capstone git-subtree-split: 5430745e9623786f65c0d773a417f389ebb43395
114 lines
3.4 KiB
C
114 lines
3.4 KiB
C
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2023 */
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/* Automatically translated source file from LLVM. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Only small edits allowed. */
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/* For multiple similar edits, please create a Patch for the translator. */
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/* Capstone's C++ file translator: */
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/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
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//===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H
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#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <capstone/platform.h>
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#include "../../MCInstPrinter.h"
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#include "../../cs_priv.h"
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#define CONCAT(a, b) CONCAT_(a, b)
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#define CONCAT_(a, b) a##_##b
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// CS namespace begin: SystemZMC
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// Maps of asm register numbers to LLVM register numbers, with 0 indicating
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// an invalid register. In principle we could use 32-bit and 64-bit register
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// classes directly, provided that we relegated the GPR allocation order
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// in SystemZRegisterInfo.td to an AltOrder and left the default order
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// as %r0-%r15. It seems better to provide the same interface for
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// all classes though.
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extern const unsigned SystemZMC_GR32Regs[16];
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extern const unsigned SystemZMC_GRH32Regs[16];
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extern const unsigned SystemZMC_GR64Regs[16];
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extern const unsigned SystemZMC_GR128Regs[16];
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extern const unsigned SystemZMC_FP32Regs[16];
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extern const unsigned SystemZMC_FP64Regs[16];
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extern const unsigned SystemZMC_FP128Regs[16];
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extern const unsigned SystemZMC_VR32Regs[32];
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extern const unsigned SystemZMC_VR64Regs[32];
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extern const unsigned SystemZMC_VR128Regs[32];
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extern const unsigned SystemZMC_AR32Regs[16];
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extern const unsigned SystemZMC_CR64Regs[16];
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// Return the 0-based number of the first architectural register that
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// contains the given LLVM register. E.g. R1D -> 1.
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unsigned SystemZMC_getFirstReg(unsigned Reg);
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// Return the given register as a GR64.
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inline unsigned SystemZMC_getRegAsGR64(unsigned Reg)
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{
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return SystemZMC_GR64Regs[SystemZMC_getFirstReg(Reg)];
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}
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// Return the given register as a low GR32.
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inline unsigned SystemZMC_getRegAsGR32(unsigned Reg)
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{
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return SystemZMC_GR32Regs[SystemZMC_getFirstReg(Reg)];
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}
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// Return the given register as a high GR32.
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inline unsigned SystemZMC_getRegAsGRH32(unsigned Reg)
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{
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return SystemZMC_GRH32Regs[SystemZMC_getFirstReg(Reg)];
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}
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// Return the given register as a VR128.
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inline unsigned SystemZMC_getRegAsVR128(unsigned Reg)
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{
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return SystemZMC_VR128Regs[SystemZMC_getFirstReg(Reg)];
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}
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// CS namespace end: SystemZMC
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// end namespace SystemZMC
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// Defines symbolic names for SystemZ registers.
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// This defines a mapping from register name to register number.
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#define GET_REGINFO_ENUM
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#include "SystemZGenRegisterInfo.inc"
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// Defines symbolic names for the SystemZ instructions.
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#define GET_INSTRINFO_ENUM
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#define GET_INSTRINFO_MC_HELPER_DECLS
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#include "SystemZGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "SystemZGenSubtargetInfo.inc"
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#endif
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