Files
kaizen/arch/SystemZ/SystemZMapping.c
Simone 3621a6c080 Squashed 'external/capstone/' changes from 5430745e..b102f1b8
b102f1b8 Update Actions (#2593)
86293136 Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support (#2594)
27da950c Clarify between machine used vs. Capstone module affected. (#2586)
186f7aa0 Fix linking issue on Windows. (#2587)
e160cbc5 Fix complex atomic instructions handling (#2584)
9907b22d Update v6 to have Debian Packages (#2579)
efbbc3bb cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally (#2581)
be6be784 x86: update read/write registers for transfer instructions (#2578)
812e654c Update BPF arch (#2568)
2c4b05f6 Clean up the cstest documentation and build instructions. (#2580)
4dc14ba1 Fix 2572 (#2574)
b25aa841 PPC regressions (#2575)
0a29bf80 Small arm64 compat header fixes (#2563)
b42e0903 Make thumb, v8 and m-class positional cstool arguments. (#2557)
89aee400 Add arm64 and sysz compatibility layer to Python bindings (#2559)
a4281337 Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 (#2558)
ef74d449 Arm regressions (#2556)
93a104c0 PPC LLVM 18 (#2540)
e46838ed Merge branch 'v6' into next
cf3600e7 Update Changelog Version to 6.0.0-Alpha2 (#2553)
b295cf57 Prepare for update (#2552)
fc59da4d fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… (#2551)
7d01d7e7 Auto-Sync reproducability + ARM update (#2532)
6ad2608d Python package building rework (#2538)
e3bc578d Move debian package generation to a dispatch only workflow (#2543)
abbf32b4 fix coverity (#2546)
1ecfb5b0 xtensa: update to espressif/llvm-project (#2533)
379e2a41 Rename build arguments: (#2534)
d7be5f9f Change CI to create Debian Package to Release (#2521)
f6f96796 tricore: fixes #2474 (#2523)
09f35961 This time actually fix big endian issue. (#2530)
306d5716 Fix endianess issue during assignment. (#2528)
2cfca35e Add CC and VAS compatibility macros (#2525)
32519c01 Fix stringop-truncation warning some compilers raise. (#2522)
5026c2c4 Merge pull request #2507 from thestr4ng3r/no-varargs-aarch64
cecb5ede Fix #2509. (#2510)
f97e2705 xtensa: Fix Branch Target (#2516)
1d13a12f AArch64: Replace vararg add_cs_detail by multiple concrete functions
8b618528 Update libcyaml dependency in cstest to 1.4.2 (#2508)
ea081286 Tricore EA calculation (#2504)
7db9a080 Fix cstest build with Ninja (#2506)
76242699 Only trigger on released action. (#2497)
981d648b Add hard asserts to all SStream functions and memset MCInst. (#2501)
d667a627 Update labeler with Xtensa and v6 files. (#2500)
52b54ee3 Fixing UB santizer, `LITBASE` and assert errors. (#2499)
97db712c Remove irrelevant changes. (#2496)
5bd05e34 Remove irrelevant changes. (#2495)
616488c7 Update changelog for V6.0.0-Alpha1 (#2493) (#2494)
c5955b92 Update changelog for V6.0.0-Alpha1 (#2493)
a424e709 Be ready for V6-Alpha1 (#2492)
235ba8e0 SystemZ fixes (#2488)
5dffa75b Fix LDR not assigning immediate as memory offset. (#2487)
21f7bc85 Xtensa Support (#2380)
29d87734 Several small fixups (#2489)
a34901e9 Update sponsors and remove empty file. (#2485)
3120932d Fix Coverity CID 509730: overflow before widen (#2486)
1014864d Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. (#2482)
0c90fe13 Replace `assert` with `CS_ASSERT` in modules (#2478)
823bfd53 AArch64 issues (#2473)

git-subtree-dir: external/capstone
git-subtree-split: b102f1b89e0455c072a751d287ab64378c14205f
2025-01-07 15:08:55 +00:00

366 lines
11 KiB
C

/* Capstone Disassembly Engine */
/* By Rot127 <unisono@quyllur.org> 2022-2023 */
#ifdef CAPSTONE_HAS_SYSTEMZ
#include <stdio.h> // debug
#include <string.h>
#include "../../Mapping.h"
#include "../../utils.h"
#include "../../cs_simple_types.h"
#include <capstone/cs_operand.h>
#include "SystemZMCTargetDesc.h"
#include "SystemZMapping.h"
#include "SystemZLinkage.h"
#ifndef CAPSTONE_DIET
static const char *const insn_name_maps[] = {
#include "SystemZGenCSMappingInsnName.inc"
};
static const name_map insn_alias_mnem_map[] = {
#include "SystemZGenCSAliasMnemMap.inc"
{ SYSTEMZ_INS_ALIAS_END, NULL },
};
static const map_insn_ops insn_operands[] = {
#include "SystemZGenCSMappingInsnOp.inc"
};
#endif
#define GET_REGINFO_MC_DESC
#include "SystemZGenRegisterInfo.inc"
const insn_map systemz_insns[] = {
#include "SystemZGenCSMappingInsn.inc"
};
void SystemZ_set_instr_map_data(MCInst *MI, const uint8_t *Bytes, size_t BytesLen)
{
map_cs_id(MI, systemz_insns, ARR_SIZE(systemz_insns));
map_implicit_reads(MI, systemz_insns);
map_implicit_writes(MI, systemz_insns);
map_groups(MI, systemz_insns);
const systemz_suppl_info *suppl_info =
map_get_suppl_info(MI, systemz_insns);
if (suppl_info) {
SystemZ_get_detail(MI)->format = suppl_info->form;
}
}
void SystemZ_init_mri(MCRegisterInfo *MRI)
{
MCRegisterInfo_InitMCRegisterInfo(
MRI, SystemZRegDesc, AARCH64_REG_ENDING, 0, 0,
SystemZMCRegisterClasses, ARR_SIZE(SystemZMCRegisterClasses), 0,
0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists,
ARR_SIZE(SystemZSubRegIdxLists), 0);
}
const char *SystemZ_reg_name(csh handle, unsigned int reg)
{
return SystemZ_LLVM_getRegisterName(reg);
}
void SystemZ_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
{
MI->MRI = (MCRegisterInfo *)info;
MI->fillDetailOps = detail_is_set(MI);
SystemZ_LLVM_printInstruction(MI, "", O);
#ifndef CAPSTONE_DIET
map_set_alias_id(MI, O, insn_alias_mnem_map,
ARR_SIZE(insn_alias_mnem_map));
#endif
}
void SystemZ_init_cs_detail(MCInst *MI) {
if (!detail_is_set(MI)) {
return;
}
memset(get_detail(MI), 0, sizeof(cs_detail));
if (detail_is_set(MI)) {
SystemZ_get_detail(MI)->cc = SYSTEMZ_CC_INVALID;
}
}
bool SystemZ_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
MCInst *MI, uint16_t *size, uint64_t address,
void *info)
{
SystemZ_init_cs_detail(MI);
MI->MRI = (MCRegisterInfo *)info;
DecodeStatus result = SystemZ_LLVM_getInstruction(
handle, bytes, bytes_len, MI, size, address, info);
SystemZ_set_instr_map_data(MI, bytes, bytes_len);
return result != MCDisassembler_Fail;
}
// given internal insn id, return public instruction info
void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
{
// We do this after Instruction disassembly.
}
const char *SystemZ_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id < SYSTEMZ_INS_ALIAS_END && id > SYSTEMZ_INS_ALIAS_BEGIN) {
if (id - SYSTEMZ_INS_ALIAS_BEGIN >=
ARR_SIZE(insn_alias_mnem_map))
return NULL;
return insn_alias_mnem_map[id - SYSTEMZ_INS_ALIAS_BEGIN - 1]
.name;
}
if (id >= SYSTEMZ_INS_ENDING)
return NULL;
if (id < ARR_SIZE(insn_name_maps))
return insn_name_maps[id];
// not found
return NULL;
#else
return NULL;
#endif
}
#ifndef CAPSTONE_DIET
static const name_map group_name_maps[] = {
// generic groups
{ SYSTEMZ_GRP_INVALID, NULL },
{ SYSTEMZ_GRP_JUMP, "jump" },
{ SYSTEMZ_GRP_CALL, "call" },
{ SYSTEMZ_GRP_RET, "return" },
{ SYSTEMZ_GRP_INT, "int" },
{ SYSTEMZ_GRP_IRET, "iret" },
{ SYSTEMZ_GRP_PRIVILEGE, "privilege" },
{ SYSTEMZ_GRP_BRANCH_RELATIVE, "branch_relative" },
#include "SystemZGenCSFeatureName.inc"
};
#endif
const char *SystemZ_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
#else
return NULL;
#endif
}
void SystemZ_add_cs_detail(MCInst *MI, int /* aarch64_op_group */ op_group,
va_list args)
{
#ifndef CAPSTONE_DIET
if (!detail_is_set(MI) || !map_fill_detail_ops(MI))
return;
unsigned op_num = va_arg(args, unsigned);
switch (op_group) {
default:
printf("Operand group %d not handled\n", op_group);
break;
case SystemZ_OP_GROUP_Operand: {
cs_op_type secondary_op_type = map_get_op_type(MI, op_num) &
~(CS_OP_MEM | CS_OP_BOUND);
if (secondary_op_type == CS_OP_IMM) {
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 0);
} else if (secondary_op_type == CS_OP_REG) {
SystemZ_set_detail_op_reg(MI, op_num,
MCInst_getOpVal(MI, op_num));
} else {
CS_ASSERT_RET(0 && "Op type not handled.");
}
break;
}
case SystemZ_OP_GROUP_Cond4Operand: {
systemz_cc cc = MCInst_getOpVal(MI, op_num);
SystemZ_get_detail(MI)->cc = cc;
break;
}
case SystemZ_OP_GROUP_BDAddrOperand:
CS_ASSERT_RET(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT_RET(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT_RET(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT_RET(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
0,
0,
SYSTEMZ_AM_BD
);
break;
case SystemZ_OP_GROUP_BDVAddrOperand:
case SystemZ_OP_GROUP_BDXAddrOperand: {
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
0,
MCInst_getOpVal(MI, (op_num + 2)),
(op_group == SystemZ_OP_GROUP_BDXAddrOperand ? SYSTEMZ_AM_BDX : SYSTEMZ_AM_BDV)
);
break;
}
case SystemZ_OP_GROUP_BDLAddrOperand:
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
MCInst_getOpVal(MI, (op_num + 2)),
0,
SYSTEMZ_AM_BDL
);
break;
case SystemZ_OP_GROUP_BDRAddrOperand:
CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
SystemZ_set_detail_op_mem(MI,
op_num,
MCInst_getOpVal(MI, (op_num)),
MCInst_getOpVal(MI, (op_num + 1)),
MCInst_getOpVal(MI, (op_num + 2)),
0,
SYSTEMZ_AM_BDL
);
break;
case SystemZ_OP_GROUP_PCRelOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 0);
break;
case SystemZ_OP_GROUP_U1ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 1);
break;
case SystemZ_OP_GROUP_U2ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 2);
break;
case SystemZ_OP_GROUP_U3ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 3);
break;
case SystemZ_OP_GROUP_U4ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 4);
break;
case SystemZ_OP_GROUP_U8ImmOperand:
case SystemZ_OP_GROUP_S8ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 8);
break;
case SystemZ_OP_GROUP_U12ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 12);
break;
case SystemZ_OP_GROUP_U16ImmOperand:
case SystemZ_OP_GROUP_S16ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 16);
break;
case SystemZ_OP_GROUP_U32ImmOperand:
case SystemZ_OP_GROUP_S32ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 32);
break;
case SystemZ_OP_GROUP_U48ImmOperand:
SystemZ_set_detail_op_imm(MI, op_num,
MCInst_getOpVal(MI, op_num), 48);
break;
}
#endif
}
#ifndef CAPSTONE_DIET
void SystemZ_set_detail_op_imm(MCInst *MI, unsigned op_num, int64_t Imm, size_t width)
{
if (!detail_is_set(MI))
return;
CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_IMM);
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
SystemZ_get_detail_op(MI, 0)->imm = Imm;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_get_detail_op(MI, 0)->imm_width = width;
SystemZ_inc_op_count(MI);
}
void SystemZ_set_detail_op_reg(MCInst *MI, unsigned op_num, systemz_reg Reg)
{
if (!detail_is_set(MI))
return;
CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_REG);
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_REG;
SystemZ_get_detail_op(MI, 0)->reg = Reg;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_inc_op_count(MI);
}
void SystemZ_set_detail_op_mem(MCInst *MI, unsigned op_num, systemz_reg base, int64_t disp, uint64_t length, systemz_reg index, systemz_addr_mode am)
{
if (!detail_is_set(MI))
return;
SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_MEM;
SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
SystemZ_get_detail_op(MI, 0)->mem.am = am;
switch(am) {
default:
CS_ASSERT(0 && "Address mode not handled\n");
break;
case SYSTEMZ_AM_BD:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
break;
case SYSTEMZ_AM_BDX:
case SYSTEMZ_AM_BDV:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.index = index;
break;
case SYSTEMZ_AM_BDL:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.length = length;
break;
case SYSTEMZ_AM_BDR:
SystemZ_get_detail_op(MI, 0)->mem.base = base;
SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
SystemZ_get_detail_op(MI, 0)->mem.length = length;
break;
}
SystemZ_inc_op_count(MI);
}
#endif
#endif