b102f1b8 Update Actions (#2593) 86293136 Fix LoongArch aliases and CS_OPT_SYNTAX_NO_DOLLAR support (#2594) 27da950c Clarify between machine used vs. Capstone module affected. (#2586) 186f7aa0 Fix linking issue on Windows. (#2587) e160cbc5 Fix complex atomic instructions handling (#2584) 9907b22d Update v6 to have Debian Packages (#2579) efbbc3bb cstest: use DOWNLOAD_EXTRACT_TIMESTAMP conditionally (#2581) be6be784 x86: update read/write registers for transfer instructions (#2578) 812e654c Update BPF arch (#2568) 2c4b05f6 Clean up the cstest documentation and build instructions. (#2580) 4dc14ba1 Fix 2572 (#2574) b25aa841 PPC regressions (#2575) 0a29bf80 Small arm64 compat header fixes (#2563) b42e0903 Make thumb, v8 and m-class positional cstool arguments. (#2557) 89aee400 Add arm64 and sysz compatibility layer to Python bindings (#2559) a4281337 Python bindings: Enable more archs + bump cibuildwheel action to the v2.22.0 (#2558) ef74d449 Arm regressions (#2556) 93a104c0 PPC LLVM 18 (#2540) e46838ed Merge branch 'v6' into next cf3600e7 Update Changelog Version to 6.0.0-Alpha2 (#2553) b295cf57 Prepare for update (#2552) fc59da4d fix xtensa DecodeMR23RegisterClass and add tests for MAC16 instru… (#2551) 7d01d7e7 Auto-Sync reproducability + ARM update (#2532) 6ad2608d Python package building rework (#2538) e3bc578d Move debian package generation to a dispatch only workflow (#2543) abbf32b4 fix coverity (#2546) 1ecfb5b0 xtensa: update to espressif/llvm-project (#2533) 379e2a41 Rename build arguments: (#2534) d7be5f9f Change CI to create Debian Package to Release (#2521) f6f96796 tricore: fixes #2474 (#2523) 09f35961 This time actually fix big endian issue. (#2530) 306d5716 Fix endianess issue during assignment. (#2528) 2cfca35e Add CC and VAS compatibility macros (#2525) 32519c01 Fix stringop-truncation warning some compilers raise. (#2522) 5026c2c4 Merge pull request #2507 from thestr4ng3r/no-varargs-aarch64 cecb5ede Fix #2509. (#2510) f97e2705 xtensa: Fix Branch Target (#2516) 1d13a12f AArch64: Replace vararg add_cs_detail by multiple concrete functions 8b618528 Update libcyaml dependency in cstest to 1.4.2 (#2508) ea081286 Tricore EA calculation (#2504) 7db9a080 Fix cstest build with Ninja (#2506) 76242699 Only trigger on released action. (#2497) 981d648b Add hard asserts to all SStream functions and memset MCInst. (#2501) d667a627 Update labeler with Xtensa and v6 files. (#2500) 52b54ee3 Fixing UB santizer, `LITBASE` and assert errors. (#2499) 97db712c Remove irrelevant changes. (#2496) 5bd05e34 Remove irrelevant changes. (#2495) 616488c7 Update changelog for V6.0.0-Alpha1 (#2493) (#2494) c5955b92 Update changelog for V6.0.0-Alpha1 (#2493) a424e709 Be ready for V6-Alpha1 (#2492) 235ba8e0 SystemZ fixes (#2488) 5dffa75b Fix LDR not assigning immediate as memory offset. (#2487) 21f7bc85 Xtensa Support (#2380) 29d87734 Several small fixups (#2489) a34901e9 Update sponsors and remove empty file. (#2485) 3120932d Fix Coverity CID 509730: overflow before widen (#2486) 1014864d Rename CS_OPT_NO_BRANCH_OFFSET and corresponding flag to better name. (#2482) 0c90fe13 Replace `assert` with `CS_ASSERT` in modules (#2478) 823bfd53 AArch64 issues (#2473) git-subtree-dir: external/capstone git-subtree-split: b102f1b89e0455c072a751d287ab64378c14205f
366 lines
11 KiB
C
366 lines
11 KiB
C
/* Capstone Disassembly Engine */
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/* By Rot127 <unisono@quyllur.org> 2022-2023 */
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#ifdef CAPSTONE_HAS_SYSTEMZ
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#include <stdio.h> // debug
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#include <string.h>
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#include "../../Mapping.h"
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#include "../../utils.h"
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#include "../../cs_simple_types.h"
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#include <capstone/cs_operand.h>
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#include "SystemZMCTargetDesc.h"
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#include "SystemZMapping.h"
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#include "SystemZLinkage.h"
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#ifndef CAPSTONE_DIET
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static const char *const insn_name_maps[] = {
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#include "SystemZGenCSMappingInsnName.inc"
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};
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static const name_map insn_alias_mnem_map[] = {
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#include "SystemZGenCSAliasMnemMap.inc"
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{ SYSTEMZ_INS_ALIAS_END, NULL },
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};
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static const map_insn_ops insn_operands[] = {
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#include "SystemZGenCSMappingInsnOp.inc"
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};
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#endif
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#define GET_REGINFO_MC_DESC
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#include "SystemZGenRegisterInfo.inc"
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const insn_map systemz_insns[] = {
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#include "SystemZGenCSMappingInsn.inc"
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};
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void SystemZ_set_instr_map_data(MCInst *MI, const uint8_t *Bytes, size_t BytesLen)
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{
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map_cs_id(MI, systemz_insns, ARR_SIZE(systemz_insns));
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map_implicit_reads(MI, systemz_insns);
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map_implicit_writes(MI, systemz_insns);
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map_groups(MI, systemz_insns);
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const systemz_suppl_info *suppl_info =
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map_get_suppl_info(MI, systemz_insns);
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if (suppl_info) {
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SystemZ_get_detail(MI)->format = suppl_info->form;
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}
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}
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void SystemZ_init_mri(MCRegisterInfo *MRI)
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{
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MCRegisterInfo_InitMCRegisterInfo(
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MRI, SystemZRegDesc, AARCH64_REG_ENDING, 0, 0,
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SystemZMCRegisterClasses, ARR_SIZE(SystemZMCRegisterClasses), 0,
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0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists,
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ARR_SIZE(SystemZSubRegIdxLists), 0);
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}
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const char *SystemZ_reg_name(csh handle, unsigned int reg)
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{
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return SystemZ_LLVM_getRegisterName(reg);
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}
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void SystemZ_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
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{
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MI->MRI = (MCRegisterInfo *)info;
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MI->fillDetailOps = detail_is_set(MI);
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SystemZ_LLVM_printInstruction(MI, "", O);
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#ifndef CAPSTONE_DIET
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map_set_alias_id(MI, O, insn_alias_mnem_map,
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ARR_SIZE(insn_alias_mnem_map));
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#endif
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}
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void SystemZ_init_cs_detail(MCInst *MI) {
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if (!detail_is_set(MI)) {
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return;
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}
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memset(get_detail(MI), 0, sizeof(cs_detail));
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if (detail_is_set(MI)) {
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SystemZ_get_detail(MI)->cc = SYSTEMZ_CC_INVALID;
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}
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}
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bool SystemZ_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
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MCInst *MI, uint16_t *size, uint64_t address,
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void *info)
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{
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SystemZ_init_cs_detail(MI);
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MI->MRI = (MCRegisterInfo *)info;
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DecodeStatus result = SystemZ_LLVM_getInstruction(
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handle, bytes, bytes_len, MI, size, address, info);
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SystemZ_set_instr_map_data(MI, bytes, bytes_len);
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return result != MCDisassembler_Fail;
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}
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// given internal insn id, return public instruction info
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void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
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{
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// We do this after Instruction disassembly.
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}
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const char *SystemZ_insn_name(csh handle, unsigned int id)
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{
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#ifndef CAPSTONE_DIET
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if (id < SYSTEMZ_INS_ALIAS_END && id > SYSTEMZ_INS_ALIAS_BEGIN) {
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if (id - SYSTEMZ_INS_ALIAS_BEGIN >=
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ARR_SIZE(insn_alias_mnem_map))
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return NULL;
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return insn_alias_mnem_map[id - SYSTEMZ_INS_ALIAS_BEGIN - 1]
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.name;
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}
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if (id >= SYSTEMZ_INS_ENDING)
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return NULL;
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if (id < ARR_SIZE(insn_name_maps))
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return insn_name_maps[id];
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// not found
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return NULL;
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#else
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return NULL;
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#endif
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}
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#ifndef CAPSTONE_DIET
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static const name_map group_name_maps[] = {
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// generic groups
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{ SYSTEMZ_GRP_INVALID, NULL },
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{ SYSTEMZ_GRP_JUMP, "jump" },
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{ SYSTEMZ_GRP_CALL, "call" },
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{ SYSTEMZ_GRP_RET, "return" },
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{ SYSTEMZ_GRP_INT, "int" },
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{ SYSTEMZ_GRP_IRET, "iret" },
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{ SYSTEMZ_GRP_PRIVILEGE, "privilege" },
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{ SYSTEMZ_GRP_BRANCH_RELATIVE, "branch_relative" },
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#include "SystemZGenCSFeatureName.inc"
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};
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#endif
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const char *SystemZ_group_name(csh handle, unsigned int id)
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{
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#ifndef CAPSTONE_DIET
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return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
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#else
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return NULL;
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#endif
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}
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void SystemZ_add_cs_detail(MCInst *MI, int /* aarch64_op_group */ op_group,
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va_list args)
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{
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#ifndef CAPSTONE_DIET
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if (!detail_is_set(MI) || !map_fill_detail_ops(MI))
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return;
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unsigned op_num = va_arg(args, unsigned);
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switch (op_group) {
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default:
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printf("Operand group %d not handled\n", op_group);
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break;
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case SystemZ_OP_GROUP_Operand: {
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cs_op_type secondary_op_type = map_get_op_type(MI, op_num) &
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~(CS_OP_MEM | CS_OP_BOUND);
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if (secondary_op_type == CS_OP_IMM) {
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 0);
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} else if (secondary_op_type == CS_OP_REG) {
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SystemZ_set_detail_op_reg(MI, op_num,
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MCInst_getOpVal(MI, op_num));
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} else {
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CS_ASSERT_RET(0 && "Op type not handled.");
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}
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break;
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}
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case SystemZ_OP_GROUP_Cond4Operand: {
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systemz_cc cc = MCInst_getOpVal(MI, op_num);
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SystemZ_get_detail(MI)->cc = cc;
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break;
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}
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case SystemZ_OP_GROUP_BDAddrOperand:
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CS_ASSERT_RET(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
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CS_ASSERT_RET(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
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CS_ASSERT_RET(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
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CS_ASSERT_RET(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
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SystemZ_set_detail_op_mem(MI,
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op_num,
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MCInst_getOpVal(MI, (op_num)),
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MCInst_getOpVal(MI, (op_num + 1)),
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0,
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0,
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SYSTEMZ_AM_BD
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);
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break;
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case SystemZ_OP_GROUP_BDVAddrOperand:
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case SystemZ_OP_GROUP_BDXAddrOperand: {
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CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
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CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
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CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
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CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
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SystemZ_set_detail_op_mem(MI,
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op_num,
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MCInst_getOpVal(MI, (op_num)),
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MCInst_getOpVal(MI, (op_num + 1)),
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0,
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MCInst_getOpVal(MI, (op_num + 2)),
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(op_group == SystemZ_OP_GROUP_BDXAddrOperand ? SYSTEMZ_AM_BDX : SYSTEMZ_AM_BDV)
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);
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break;
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}
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case SystemZ_OP_GROUP_BDLAddrOperand:
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CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
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CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
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CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
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CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 2))));
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SystemZ_set_detail_op_mem(MI,
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op_num,
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MCInst_getOpVal(MI, (op_num)),
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MCInst_getOpVal(MI, (op_num + 1)),
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MCInst_getOpVal(MI, (op_num + 2)),
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0,
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SYSTEMZ_AM_BDL
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);
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break;
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case SystemZ_OP_GROUP_BDRAddrOperand:
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CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
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CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
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CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
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CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
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CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
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SystemZ_set_detail_op_mem(MI,
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op_num,
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MCInst_getOpVal(MI, (op_num)),
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MCInst_getOpVal(MI, (op_num + 1)),
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MCInst_getOpVal(MI, (op_num + 2)),
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0,
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SYSTEMZ_AM_BDL
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);
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break;
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case SystemZ_OP_GROUP_PCRelOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 0);
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break;
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case SystemZ_OP_GROUP_U1ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 1);
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break;
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case SystemZ_OP_GROUP_U2ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 2);
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break;
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case SystemZ_OP_GROUP_U3ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 3);
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break;
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case SystemZ_OP_GROUP_U4ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 4);
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break;
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case SystemZ_OP_GROUP_U8ImmOperand:
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case SystemZ_OP_GROUP_S8ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 8);
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break;
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case SystemZ_OP_GROUP_U12ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 12);
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break;
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case SystemZ_OP_GROUP_U16ImmOperand:
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case SystemZ_OP_GROUP_S16ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 16);
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break;
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case SystemZ_OP_GROUP_U32ImmOperand:
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case SystemZ_OP_GROUP_S32ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 32);
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break;
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case SystemZ_OP_GROUP_U48ImmOperand:
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SystemZ_set_detail_op_imm(MI, op_num,
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MCInst_getOpVal(MI, op_num), 48);
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break;
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}
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#endif
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}
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#ifndef CAPSTONE_DIET
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void SystemZ_set_detail_op_imm(MCInst *MI, unsigned op_num, int64_t Imm, size_t width)
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{
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if (!detail_is_set(MI))
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return;
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CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_IMM);
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SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
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SystemZ_get_detail_op(MI, 0)->imm = Imm;
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SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
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SystemZ_get_detail_op(MI, 0)->imm_width = width;
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SystemZ_inc_op_count(MI);
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}
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void SystemZ_set_detail_op_reg(MCInst *MI, unsigned op_num, systemz_reg Reg)
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{
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if (!detail_is_set(MI))
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return;
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CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_REG);
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SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_REG;
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SystemZ_get_detail_op(MI, 0)->reg = Reg;
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SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
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SystemZ_inc_op_count(MI);
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}
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void SystemZ_set_detail_op_mem(MCInst *MI, unsigned op_num, systemz_reg base, int64_t disp, uint64_t length, systemz_reg index, systemz_addr_mode am)
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{
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if (!detail_is_set(MI))
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return;
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SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_MEM;
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SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
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SystemZ_get_detail_op(MI, 0)->mem.am = am;
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switch(am) {
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default:
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CS_ASSERT(0 && "Address mode not handled\n");
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break;
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case SYSTEMZ_AM_BD:
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SystemZ_get_detail_op(MI, 0)->mem.base = base;
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SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
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break;
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case SYSTEMZ_AM_BDX:
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case SYSTEMZ_AM_BDV:
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SystemZ_get_detail_op(MI, 0)->mem.base = base;
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SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
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SystemZ_get_detail_op(MI, 0)->mem.index = index;
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break;
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case SYSTEMZ_AM_BDL:
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SystemZ_get_detail_op(MI, 0)->mem.base = base;
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SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
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SystemZ_get_detail_op(MI, 0)->mem.length = length;
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break;
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case SYSTEMZ_AM_BDR:
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SystemZ_get_detail_op(MI, 0)->mem.base = base;
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SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
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SystemZ_get_detail_op(MI, 0)->mem.length = length;
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break;
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}
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SystemZ_inc_op_count(MI);
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}
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#endif
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#endif
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