268 lines
6.8 KiB
C++
268 lines
6.8 KiB
C++
#pragma once
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#include <core/registers/Cop0.hpp>
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#include <cstring>
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namespace n64 {
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struct Cop1;
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union FCR31 {
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FCR31() = default;
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struct {
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unsigned rounding_mode : 2;
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struct {
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unsigned inexact_operation : 1;
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unsigned underflow : 1;
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unsigned overflow : 1;
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unsigned division_by_zero : 1;
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unsigned invalid_operation : 1;
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} flag;
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struct {
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unsigned inexact_operation : 1;
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unsigned underflow : 1;
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unsigned overflow : 1;
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unsigned division_by_zero : 1;
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unsigned invalid_operation : 1;
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} enable;
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struct {
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unsigned inexact_operation : 1;
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unsigned underflow : 1;
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unsigned overflow : 1;
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unsigned division_by_zero : 1;
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unsigned invalid_operation : 1;
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unsigned unimplemented_operation : 1;
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} cause;
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unsigned : 5;
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unsigned compare : 1;
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unsigned fs : 1;
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unsigned : 7;
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} __attribute__((__packed__));
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[[nodiscard]] u32 read() const {
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u32 ret = 0;
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ret |= (u32(fs) << 24);
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ret |= (u32(compare) << 23);
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ret |= (u32(cause.unimplemented_operation) << 17);
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ret |= (u32(cause.invalid_operation) << 16);
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ret |= (u32(cause.division_by_zero) << 15);
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ret |= (u32(cause.overflow) << 14);
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ret |= (u32(cause.underflow) << 13);
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ret |= (u32(cause.inexact_operation) << 12);
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ret |= (u32(enable.invalid_operation) << 11);
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ret |= (u32(enable.division_by_zero) << 10);
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ret |= (u32(enable.overflow) << 9);
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ret |= (u32(enable.underflow) << 8);
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ret |= (u32(enable.inexact_operation) << 7);
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ret |= (u32(flag.invalid_operation) << 6);
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ret |= (u32(flag.division_by_zero) << 5);
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ret |= (u32(flag.overflow) << 4);
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ret |= (u32(flag.underflow) << 3);
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ret |= (u32(flag.inexact_operation) << 2);
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ret |= (u32(rounding_mode) & 3);
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return ret;
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}
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void write(u32 val) {
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fs = val >> 24;
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compare = val >> 23;
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cause.unimplemented_operation = val >> 17;
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cause.invalid_operation = val >> 16;
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cause.division_by_zero = val >> 15;
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cause.overflow = val >> 14;
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cause.underflow = val >> 13;
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cause.inexact_operation = val >> 12;
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enable.invalid_operation = val >> 11;
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enable.division_by_zero = val >> 10;
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enable.overflow = val >> 9;
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enable.underflow = val >> 8;
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enable.inexact_operation = val >> 7;
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flag.invalid_operation = val >> 6;
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flag.division_by_zero = val >> 5;
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flag.overflow = val >> 4;
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flag.underflow = val >> 3;
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flag.inexact_operation = val >> 2;
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rounding_mode = val & 3;
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}
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};
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enum CompConds { F, UN, EQ, UEQ, OLT, ULT, OLE, ULE, SF, NGLE, SEQ, NGL, LT, NGE, LE, NGT };
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union FloatingPointReg {
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struct {
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s32 int32;
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s32 int32h;
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} __attribute__((__packed__));
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struct {
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u32 uint32;
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u32 uint32h;
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} __attribute__((__packed__));
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struct {
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s64 int64;
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} __attribute__((__packed__));
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struct {
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u64 uint64;
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} __attribute__((__packed__));
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struct {
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float float32;
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float float32h;
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} __attribute__((__packed__));
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struct {
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double float64;
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} __attribute__((__packed__));
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};
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struct Interpreter;
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struct JIT;
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struct Registers;
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struct Cop1 {
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explicit Cop1(Registers &);
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u32 fcr0{};
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FCR31 fcr31{};
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FloatingPointReg fgr[32]{};
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void Reset();
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template <class T> // either JIT or Interpreter
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void decode(T &, u32);
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friend struct Interpreter;
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template <bool preserveCause = false>
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bool CheckFPUUsable();
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template <typename T>
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bool CheckResult(T &);
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template <typename T>
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bool CheckArg(T);
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template <typename T>
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bool CheckArgs(T, T);
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template <typename T>
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bool isqnan(T);
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template <typename T, bool quiet, bool cf>
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bool XORDERED(T fs, T ft);
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template <typename T>
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bool CheckCVTArg(float f);
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template <typename T>
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bool CheckCVTArg(double f);
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template <bool cvt = false>
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bool TestExceptions();
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void SetCauseUnimplemented();
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bool SetCauseUnderflow();
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bool SetCauseInexact();
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bool SetCauseDivisionByZero();
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bool SetCauseOverflow();
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bool SetCauseInvalid();
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private:
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template <typename T>
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auto FGR_T(const Cop0Status &, u32) -> T &;
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template <typename T>
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auto FGR_S(const Cop0Status &, u32) -> T &;
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template <typename T>
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auto FGR_D(const Cop0Status &, u32) -> T &;
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void decodeInterp(Interpreter &, u32);
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void decodeJIT(JIT &, u32);
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void absd(u32 instr);
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void abss(u32 instr);
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void adds(u32 instr);
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void addd(u32 instr);
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void subs(u32 instr);
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void subd(u32 instr);
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void ceills(u32 instr);
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void ceilws(u32 instr);
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void ceilld(u32 instr);
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void ceilwd(u32 instr);
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void cfc1(u32 instr);
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void ctc1(u32 instr);
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void unimplemented();
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void roundls(u32 instr);
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void roundld(u32 instr);
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void roundws(u32 instr);
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void roundwd(u32 instr);
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void floorls(u32 instr);
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void floorld(u32 instr);
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void floorws(u32 instr);
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void floorwd(u32 instr);
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void cvtls(u32 instr);
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void cvtws(u32 instr);
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void cvtds(u32 instr);
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void cvtsw(u32 instr);
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void cvtdw(u32 instr);
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void cvtsd(u32 instr);
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void cvtwd(u32 instr);
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void cvtld(u32 instr);
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void cvtdl(u32 instr);
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void cvtsl(u32 instr);
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template <typename T>
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void cf(u32 instr);
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template <typename T>
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void cun(u32 instr);
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template <typename T>
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void ceq(u32 instr);
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template <typename T>
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void cueq(u32 instr);
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template <typename T>
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void colt(u32 instr);
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template <typename T>
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void cult(u32 instr);
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template <typename T>
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void cole(u32 instr);
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template <typename T>
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void cule(u32 instr);
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template <typename T>
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void csf(u32 instr);
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template <typename T>
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void cngle(u32 instr);
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template <typename T>
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void cseq(u32 instr);
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template <typename T>
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void cngl(u32 instr);
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template <typename T>
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void clt(u32 instr);
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template <typename T>
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void cnge(u32 instr);
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template <typename T>
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void cle(u32 instr);
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template <typename T>
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void cngt(u32 instr);
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void divs(u32 instr);
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void divd(u32 instr);
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void muls(u32 instr);
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void muld(u32 instr);
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void movs(u32 instr);
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void movd(u32 instr);
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void negs(u32 instr);
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void negd(u32 instr);
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void sqrts(u32 instr);
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void sqrtd(u32 instr);
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template <class T>
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void lwc1(T &, Mem &, u32);
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template <class T>
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void swc1(T &, Mem &, u32);
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template <class T>
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void ldc1(T &, Mem &, u32);
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template <class T>
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void sdc1(T &, Mem &, u32);
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void lwc1Interp(Mem &, u32);
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void swc1Interp(Mem &, u32);
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void ldc1Interp(Mem &, u32);
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void sdc1Interp(Mem &, u32);
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void lwc1JIT(JIT &, Mem &, u32) { Util::panic("[JIT]: lwc1 not implemented!"); }
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void swc1JIT(JIT &, Mem &, u32) { Util::panic("[JIT]: swc1 not implemented!"); }
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void ldc1JIT(JIT &, Mem &, u32) { Util::panic("[JIT]: ldc1 not implemented!"); }
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void sdc1JIT(JIT &, Mem &, u32) { Util::panic("[JIT]: sdc1 not implemented!"); }
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void mfc1(u32 instr);
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void dmfc1(u32 instr);
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void mtc1(u32 instr);
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void dmtc1(u32 instr);
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void truncws(u32 instr);
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void truncwd(u32 instr);
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void truncls(u32 instr);
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void truncld(u32 instr);
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Registers ®s;
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};
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} // namespace n64
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