552 lines
14 KiB
C++
552 lines
14 KiB
C++
#include <Core.hpp>
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#include <log.hpp>
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namespace n64 {
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Cop0::Cop0() { Reset(); }
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void Cop0::Reset() {
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cause.raw = 0xB000007C;
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status.raw = 0;
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status.cu0 = 1;
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status.cu1 = 1;
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status.fr = 1;
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PRId = 0x00000B22;
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Config = 0x7006E463;
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EPC = 0xFFFFFFFFFFFFFFFFll;
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ErrorEPC = 0xFFFFFFFFFFFFFFFFll;
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wired = 0;
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index.raw = 63;
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badVaddr = 0xFFFFFFFFFFFFFFFF;
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kernelMode = {true};
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supervisorMode = {false};
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userMode = {false};
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is64BitAddressing = {false};
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llbit = {};
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pageMask = {};
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entryHi = {};
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entryLo0 = {}, entryLo1 = {};
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context = {};
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wired = {}, r7 = {};
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count = {};
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compare = {};
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LLAddr = {}, WatchLo = {}, WatchHi = {};
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xcontext = {};
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r21 = {}, r22 = {}, r23 = {}, r24 = {}, r25 = {};
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ParityError = {}, CacheError = {}, TagLo = {}, TagHi = {};
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ErrorEPC = {};
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r31 = {};
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memset(tlb, 0, sizeof(TLBEntry) * 32);
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tlbError = NONE;
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openbus = {};
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}
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u32 Cop0::GetReg32(const u8 addr) {
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switch (addr) {
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case COP0_REG_INDEX:
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return index.raw & INDEX_MASK;
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case COP0_REG_RANDOM:
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return GetRandom();
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case COP0_REG_ENTRYLO0:
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return entryLo0.raw;
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case COP0_REG_ENTRYLO1:
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return entryLo1.raw;
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case COP0_REG_CONTEXT:
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return context.raw;
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case COP0_REG_PAGEMASK:
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return pageMask.raw;
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case COP0_REG_WIRED:
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return wired;
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case COP0_REG_BADVADDR:
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return badVaddr;
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case COP0_REG_COUNT:
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return GetCount();
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case COP0_REG_ENTRYHI:
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return entryHi.raw;
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case COP0_REG_COMPARE:
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return compare;
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case COP0_REG_STATUS:
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return status.raw;
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case COP0_REG_CAUSE:
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return cause.raw;
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case COP0_REG_EPC:
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return EPC;
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case COP0_REG_PRID:
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return PRId;
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case COP0_REG_CONFIG:
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return Config;
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case COP0_REG_LLADDR:
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return LLAddr;
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case COP0_REG_WATCHLO:
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return WatchLo;
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case COP0_REG_WATCHHI:
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return WatchHi;
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case COP0_REG_XCONTEXT:
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return xcontext.raw;
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case COP0_REG_PARITY_ERR:
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return ParityError;
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case COP0_REG_CACHE_ERR:
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return CacheError;
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case COP0_REG_TAGLO:
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return TagLo;
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case COP0_REG_TAGHI:
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return TagHi;
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case COP0_REG_ERROREPC:
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return ErrorEPC;
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case 7:
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case 21:
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case 22:
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case 23:
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case 24:
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case 25:
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case 31:
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return openbus;
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default:
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panic("Unsupported word read from COP0 register {}", addr);
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}
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}
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u64 Cop0::GetReg64(const u8 addr) const {
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switch (addr) {
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case COP0_REG_ENTRYLO0:
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return entryLo0.raw;
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case COP0_REG_ENTRYLO1:
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return entryLo1.raw;
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case COP0_REG_CONTEXT:
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return context.raw;
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case COP0_REG_BADVADDR:
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return badVaddr;
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case COP0_REG_ENTRYHI:
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return entryHi.raw;
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case COP0_REG_STATUS:
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return status.raw;
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case COP0_REG_EPC:
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return EPC;
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case COP0_REG_PRID:
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return PRId;
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case COP0_REG_LLADDR:
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return LLAddr;
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case COP0_REG_XCONTEXT:
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return xcontext.raw & 0xFFFFFFFFFFFFFFF0;
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case COP0_REG_ERROREPC:
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return ErrorEPC;
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case 7:
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case 21:
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case 22:
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case 23:
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case 24:
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case 25:
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case 31:
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return openbus;
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default:
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panic("Unsupported dword read from COP0 register {}", addr);
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}
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}
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void Cop0::SetReg32(const u8 addr, const u32 value) {
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openbus = value & 0xFFFFFFFF;
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switch (addr) {
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case COP0_REG_INDEX:
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index.raw = value & INDEX_MASK;
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break;
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case COP0_REG_RANDOM:
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break;
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case COP0_REG_ENTRYLO0:
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entryLo0.raw = value & ENTRY_LO_MASK;
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break;
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case COP0_REG_ENTRYLO1:
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entryLo1.raw = value & ENTRY_LO_MASK;
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break;
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case COP0_REG_CONTEXT:
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context.raw = (s64(s32(value)) & 0xFFFFFFFFFF800000) | (context.raw & 0x7FFFFF);
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break;
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case COP0_REG_PAGEMASK:
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pageMask.raw = value & PAGEMASK_MASK;
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break;
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case COP0_REG_WIRED:
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wired = value & 63;
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break;
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case COP0_REG_BADVADDR:
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break;
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case COP0_REG_COUNT:
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count = (u64)value << 1;
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break;
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case COP0_REG_ENTRYHI:
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entryHi.raw = s64(s32(value)) & ENTRY_HI_MASK;
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break;
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case COP0_REG_COMPARE:
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compare = value;
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cause.ip7 = false;
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break;
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case COP0_REG_STATUS:
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status.raw &= ~STATUS_MASK;
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status.raw |= (value & STATUS_MASK);
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Update();
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break;
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case COP0_REG_CAUSE:
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{
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Cop0Cause tmp{};
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tmp.raw = value;
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cause.ip0 = tmp.ip0;
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cause.ip1 = tmp.ip1;
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}
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break;
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case COP0_REG_EPC:
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EPC = s64(s32(value));
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break;
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case COP0_REG_PRID:
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break;
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case COP0_REG_CONFIG:
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Config &= ~CONFIG_MASK;
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Config |= (value & CONFIG_MASK);
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break;
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case COP0_REG_LLADDR:
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LLAddr = value;
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break;
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case COP0_REG_WATCHLO:
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WatchLo = value;
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break;
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case COP0_REG_WATCHHI:
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WatchHi = value;
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break;
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case COP0_REG_XCONTEXT:
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xcontext.raw = (s64(s32(value)) & 0xFFFFFFFE00000000) | (xcontext.raw & 0x1FFFFFFFF);
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break;
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case COP0_REG_PARITY_ERR:
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ParityError = value & 0xff;
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break;
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case COP0_REG_CACHE_ERR:
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break;
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case COP0_REG_TAGLO:
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TagLo = value;
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break;
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case COP0_REG_TAGHI:
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TagHi = value;
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break;
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case COP0_REG_ERROREPC:
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ErrorEPC = s64(s32(value));
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break;
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case 7:
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case 21:
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case 22:
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case 23:
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case 24:
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case 25:
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case 31:
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break;
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default:
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panic("Unsupported word write from COP0 register {}", addr);
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}
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}
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void Cop0::SetReg64(const u8 addr, const u64 value) {
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openbus = value;
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switch (addr) {
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case COP0_REG_ENTRYLO0:
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entryLo0.raw = value & ENTRY_LO_MASK;
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break;
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case COP0_REG_ENTRYLO1:
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entryLo1.raw = value & ENTRY_LO_MASK;
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break;
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case COP0_REG_CONTEXT:
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context.raw = (value & 0xFFFFFFFFFF800000) | (context.raw & 0x7FFFFF);
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break;
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case COP0_REG_XCONTEXT:
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xcontext.raw = (value & 0xFFFFFFFE00000000) | (xcontext.raw & 0x1FFFFFFFF);
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break;
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case COP0_REG_ENTRYHI:
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entryHi.raw = value & ENTRY_HI_MASK;
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break;
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case COP0_REG_STATUS:
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status.raw = value;
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break;
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case COP0_REG_CAUSE:
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{
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Cop0Cause tmp{};
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tmp.raw = value;
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cause.ip0 = tmp.ip0;
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cause.ip1 = tmp.ip1;
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}
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break;
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case COP0_REG_BADVADDR:
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break;
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case COP0_REG_EPC:
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EPC = (s64)value;
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break;
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case COP0_REG_LLADDR:
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LLAddr = value;
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break;
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case COP0_REG_ERROREPC:
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ErrorEPC = (s64)value;
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break;
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default:
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panic("Unsupported dword write to COP0 register {}", addr);
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}
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}
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static FORCE_INLINE u64 getVPN(const u64 addr, const u64 pageMask) {
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const u64 mask = pageMask | 0x1fff;
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const u64 vpn = addr & 0xFFFFFFFFFF | addr >> 22 & 0x30000000000;
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return vpn & ~mask;
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}
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TLBEntry *Cop0::TLBTryMatch(const u64 vaddr, int &index) {
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for (int i = 0; i < 32; i++) {
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TLBEntry *entry = &tlb[i];
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if (!entry->initialized)
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continue;
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const u64 entry_vpn = getVPN(entry->entryHi.raw, entry->pageMask.raw);
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const u64 vaddr_vpn = getVPN(vaddr, entry->pageMask.raw);
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const bool vpn_match = entry_vpn == vaddr_vpn;
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const bool asid_match = entry->global || entryHi.asid == entry->entryHi.asid;
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if(!vpn_match || !asid_match)
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continue;
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index = i;
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return entry;
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}
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return nullptr;
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}
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TLBEntry *Cop0::TLBTryMatch(const u64 vaddr) {
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for (auto &t : tlb) {
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TLBEntry *entry = &t;
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if (!entry->initialized)
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continue;
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const u64 entry_vpn = getVPN(entry->entryHi.raw, entry->pageMask.raw);
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const u64 vaddr_vpn = getVPN(vaddr, entry->pageMask.raw);
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const bool vpn_match = entry_vpn == vaddr_vpn;
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const bool asid_match = entry->global || entryHi.asid == entry->entryHi.asid;
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if (vpn_match && asid_match)
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return entry;
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}
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return nullptr;
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}
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bool Cop0::ProbeTLB(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
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const TLBEntry *entry = TLBTryMatch(vaddr);
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if (!entry) {
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tlbError = MISS;
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return false;
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}
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const u32 mask = entry->pageMask.mask << 12 | 0xFFF;
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const u32 odd = vaddr & mask + 1;
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const EntryLo entryLo = odd ? entry->entryLo1 : entry->entryLo0;
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if (!entryLo.v) {
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tlbError = INVALID;
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return false;
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}
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if (accessType == STORE && !entryLo.d) {
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tlbError = MODIFICATION;
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return false;
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}
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paddr = entryLo.pfn << 12 | vaddr & mask;
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return true;
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}
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void Cop0::FireException(const ExceptionCode code, const int cop, s64 pc) {
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Registers& regs = Core::GetRegs();
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u16 vectorOffset = 0x0180;
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if(tlbError == MISS && (code == ExceptionCode::TLBLoad || code == ExceptionCode::TLBStore)) {
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if(!status.exl) {
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if(is64BitAddressing) vectorOffset = 0x0080;
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else vectorOffset = 0x0000;
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}
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}
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cause.copError = cop;
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cause.exceptionCode = static_cast<u8>(code);
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if (!status.exl) {
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if ((cause.branchDelay = regs.prevDelaySlot)) {
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pc -= 4;
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}
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status.exl = true;
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EPC = pc;
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}
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if (status.bev) {
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panic("BEV bit set!");
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}
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regs.SetPC32(s32(0x80000000 + vectorOffset));
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Update();
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}
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void Cop0::HandleTLBException(const u64 vaddr) {
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const u64 vpn2 = vaddr >> 13 & 0x7FFFF;
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const u64 xvpn2 = vaddr >> 13 & 0x7FFFFFF;
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badVaddr = vaddr;
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context.badvpn2 = vpn2;
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xcontext.badvpn2 = xvpn2;
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xcontext.r = vaddr >> 62 & 3;
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entryHi.vpn2 = xvpn2;
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entryHi.r = vaddr >> 62 & 3;
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}
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ExceptionCode Cop0::GetTLBExceptionCode(const TLBError error, const TLBAccessType accessType) {
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switch (error) {
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case NONE:
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panic("Getting TLB exception with error NONE");
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case INVALID:
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case MISS:
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return accessType == LOAD ? ExceptionCode::TLBLoad : ExceptionCode::TLBStore;
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case MODIFICATION:
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return ExceptionCode::TLBModification;
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case DISALLOWED_ADDRESS:
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return accessType == LOAD ? ExceptionCode::AddressErrorLoad : ExceptionCode::AddressErrorStore;
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default:
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panic("Getting TLB exception for unknown error code! ({})", static_cast<u8>(error));
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return {};
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}
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}
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void Cop0::decode(const Instruction instr) {
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Registers& regs = Core::GetRegs();
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switch (instr.cop_rs()) {
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case 0x00: mfc0(instr); break;
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case 0x01: dmfc0(instr); break;
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case 0x04: mtc0(instr); break;
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case 0x05: dmtc0(instr); break;
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case 0x10 ... 0x1F:
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switch (instr.cop_funct()) {
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case 0x01: tlbr(); break;
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case 0x02: tlbw(index.i); break;
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case 0x06: tlbw(GetRandom()); break;
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case 0x08: tlbp(); break;
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case 0x18: eret(); break;
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default:
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panic("Unimplemented COP0 function {} ({:08X}) ({:016X})", instr.cop_funct(), u32(instr),
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regs.oldPC);
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}
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break;
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default:
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panic("Unimplemented COP0 instruction {}", instr.cop_rs());
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}
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}
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template <>
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bool Cop0::MapVirtualAddress<u32, true>(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
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if(Util::IsInsideRange(vaddr, START_VREGION_KUSEG, END_VREGION_KUSEG))
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return ProbeTLB(accessType, s64(s32(vaddr)), paddr);
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tlbError = DISALLOWED_ADDRESS;
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return false;
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}
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template <>
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bool Cop0::MapVirtualAddress<u32, false>(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
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u8 segment = static_cast<u32>(vaddr) >> 29 & 7;
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if(Util::IsInsideRange(segment, 0, 3) || segment == 7)
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return ProbeTLB(accessType, static_cast<s32>(vaddr), paddr);
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if(Util::IsInsideRange(segment, 4, 5)) {
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paddr = vaddr & 0x1FFFFFFF;
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return true;
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}
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if(segment == 6)
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panic("Unimplemented virtual mapping in KSSEG! ({:08X})", vaddr);
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panic("Should never end up in base case in MapVirtualAddress! ({:08X})", vaddr);
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return false;
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}
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template <>
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bool Cop0::MapVirtualAddress<u64, true>(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
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if(Util::IsInsideRange(vaddr, 0x0000000000000000, 0x000000FFFFFFFFFF))
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return ProbeTLB(accessType, vaddr, paddr);
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tlbError = DISALLOWED_ADDRESS;
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return false;
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}
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template <>
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bool Cop0::MapVirtualAddress<u64, false>(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
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if(Util::IsInsideRange(vaddr, 0x0000000000000000, 0x000000FFFFFFFFFF) || // VREGION_XKUSEG
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Util::IsInsideRange(vaddr, 0x4000000000000000, 0x400000FFFFFFFFFF) || // VREGION_XKSSEG
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Util::IsInsideRange(vaddr, 0xC000000000000000, 0xC00000FF7FFFFFFF) || // VREGION_XKSEG
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Util::IsInsideRange(vaddr, 0xFFFFFFFFE0000000, 0xFFFFFFFFFFFFFFFF)) // VREGION_CKSEG3
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return ProbeTLB(accessType, vaddr, paddr);
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if(Util::IsInsideRange(vaddr, 0x8000000000000000, 0xBFFFFFFFFFFFFFFF)) { // VREGION_XKPHYS
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if (!kernelMode)
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panic("Access to XKPHYS address 0x{:016X} when outside kernel mode!", vaddr);
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const u8 high_two_bits = (vaddr >> 62) & 0b11;
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if (high_two_bits != 0b10)
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panic("Access to XKPHYS address 0x{:016X} with high two bits != 0b10!", vaddr);
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const u8 subsegment = (vaddr >> 59) & 0b11;
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bool cached = subsegment != 2; // do something with this eventually
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// If any bits in the range of 58:32 are set, the address is invalid.
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const bool valid = (vaddr & 0x07FFFFFF00000000) == 0;
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if (!valid) {
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tlbError = DISALLOWED_ADDRESS;
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return false;
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}
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paddr = vaddr & 0xFFFFFFFF;
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return true;
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}
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if(Util::IsInsideRange(vaddr, 0xFFFFFFFF80000000, 0xFFFFFFFF9FFFFFFF) || // VREGION_CKSEG0
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Util::IsInsideRange(vaddr, 0xFFFFFFFFA0000000, 0xFFFFFFFFBFFFFFFF)) { // VREGION_CKSEG1
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u32 cut = u32(vaddr) >> 28;
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u32 num = cut == 0xA;
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// Identical to ksegX in 32 bit mode.
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// Unmapped translation. Subtract the base address of the space to get the physical address.
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paddr = vaddr - (cut << 28); // Implies cutting off the high 32 bits
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|
trace("CKSEG{}: Translated 0x{:016X} to 0x{:08X}", num, vaddr, paddr);
|
|
return true;
|
|
}
|
|
|
|
if(Util::IsInsideRange(vaddr, 0x0000010000000000, 0x3FFFFFFFFFFFFFFF) || // VREGION_XBAD1
|
|
Util::IsInsideRange(vaddr, 0x4000010000000000, 0x7FFFFFFFFFFFFFFF) || // VREGION_XBAD2
|
|
Util::IsInsideRange(vaddr, 0xC00000FF80000000, 0xFFFFFFFF7FFFFFFF)) { // VREGION_XBAD3
|
|
tlbError = DISALLOWED_ADDRESS;
|
|
return false;
|
|
}
|
|
|
|
panic("Resolving virtual address 0x{:016X} in 64 bit mode", vaddr);
|
|
return false; // just to silence warning
|
|
}
|
|
|
|
bool Cop0::MapVAddr(const TLBAccessType accessType, const u64 vaddr, u32 &paddr) {
|
|
if(supervisorMode)
|
|
panic("Supervisor mode memory access");
|
|
|
|
if (is64BitAddressing) [[unlikely]] {
|
|
if (kernelMode) [[likely]] return MapVirtualAddress<u64, false>(accessType, vaddr, paddr);
|
|
if (userMode) return MapVirtualAddress<u64, true>(accessType, vaddr, paddr);
|
|
|
|
panic("Unknown mode! This should never happen!");
|
|
}
|
|
|
|
if (kernelMode) [[likely]] return MapVirtualAddress<u32, false>(accessType, vaddr, paddr);
|
|
if (userMode) return MapVirtualAddress<u32, true>(accessType, vaddr, paddr);
|
|
|
|
panic("Unknown mode! This should never happen!");
|
|
}
|
|
} // namespace n64
|