390 lines
9.4 KiB
C++
390 lines
9.4 KiB
C++
#pragma once
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#include <MemoryHelpers.hpp>
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#include <MemoryRegions.hpp>
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#include <array>
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#include <core/RDP.hpp>
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#include <core/mmio/MI.hpp>
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#define RSP_BYTE(addr) (dmem[BYTE_ADDRESS(addr) & 0xFFF])
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#define GET_RSP_HALF(addr) ((RSP_BYTE(addr) << 8) | RSP_BYTE((addr) + 1))
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#define SET_RSP_HALF(addr, value) \
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do { \
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RSP_BYTE(addr) = ((value) >> 8) & 0xFF; \
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RSP_BYTE((addr) + 1) = (value) & 0xFF; \
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} \
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while (0)
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#define GET_RSP_WORD(addr) ((GET_RSP_HALF(addr) << 16) | GET_RSP_HALF((addr) + 2))
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#define SET_RSP_WORD(addr, value) \
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do { \
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SET_RSP_HALF(addr, ((value) >> 16) & 0xFFFF); \
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SET_RSP_HALF((addr) + 2, (value) & 0xFFFF); \
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} \
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while (0)
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namespace n64 {
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union SPStatus {
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u32 raw;
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struct {
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unsigned halt : 1;
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unsigned broke : 1;
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unsigned dmaBusy : 1;
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unsigned dmaFull : 1;
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unsigned ioFull : 1;
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unsigned singleStep : 1;
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unsigned interruptOnBreak : 1;
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unsigned signal0 : 1;
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unsigned signal1 : 1;
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unsigned signal2 : 1;
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unsigned signal3 : 1;
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unsigned signal4 : 1;
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unsigned signal5 : 1;
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unsigned signal6 : 1;
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unsigned signal7 : 1;
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unsigned : 17;
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};
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};
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union SPStatusWrite {
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u32 raw;
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struct {
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unsigned clearHalt : 1;
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unsigned setHalt : 1;
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unsigned clearBroke : 1;
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unsigned clearIntr : 1;
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unsigned setIntr : 1;
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unsigned clearSstep : 1;
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unsigned setSstep : 1;
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unsigned clearIntrOnBreak : 1;
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unsigned setIntrOnBreak : 1;
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unsigned clearSignal0 : 1;
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unsigned setSignal0 : 1;
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unsigned clearSignal1 : 1;
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unsigned setSignal1 : 1;
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unsigned clearSignal2 : 1;
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unsigned setSignal2 : 1;
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unsigned clearSignal3 : 1;
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unsigned setSignal3 : 1;
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unsigned clearSignal4 : 1;
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unsigned setSignal4 : 1;
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unsigned clearSignal5 : 1;
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unsigned setSignal5 : 1;
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unsigned clearSignal6 : 1;
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unsigned setSignal6 : 1;
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unsigned clearSignal7 : 1;
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unsigned setSignal7 : 1;
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unsigned : 7;
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};
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};
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union SPDMALen {
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struct {
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unsigned len : 12;
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unsigned count : 8;
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unsigned skip : 12;
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};
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u32 raw;
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};
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union SPDMASPAddr {
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struct {
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unsigned address : 12;
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unsigned bank : 1;
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unsigned : 19;
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};
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u32 raw;
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};
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union SPDMADRAMAddr {
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struct {
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unsigned address : 24;
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unsigned : 8;
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};
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u32 raw;
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};
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union VPR {
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s16 selement[8];
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u16 element[8];
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u8 byte[16];
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u32 word[4];
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m128i single;
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} __attribute__((packed));
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static_assert(sizeof(VPR) == 16);
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struct Mem;
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struct Registers;
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#define DE(x) (((x) >> 11) & 0x1F)
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struct RSP {
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RSP(Mem &, Registers &);
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void Reset();
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FORCE_INLINE void Step() {
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gpr[0] = 0;
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const u32 instr = Util::ReadAccess<u32>(imem, pc & IMEM_DSIZE);
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oldPC = pc & 0xFFC;
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pc = nextPC & 0xFFC;
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nextPC += 4;
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Exec(instr);
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}
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void SetVTE(const VPR &vt, u8 e);
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auto Read(u32 addr) -> u32;
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void Write(u32 addr, u32 val);
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void Exec(u32 instr);
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SPStatus spStatus{};
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u16 oldPC{}, pc{}, nextPC{};
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SPDMASPAddr spDMASPAddr{};
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SPDMADRAMAddr spDMADRAMAddr{};
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SPDMASPAddr lastSuccessfulSPAddr{};
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SPDMADRAMAddr lastSuccessfulDRAMAddr{};
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SPDMALen spDMALen{};
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std::array<u8, DMEM_SIZE> dmem{};
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std::array<u8, IMEM_SIZE> imem{};
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VPR vpr[32]{};
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VPR vte{};
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s32 gpr[32]{};
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VPR vce{};
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s16 divIn{}, divOut{};
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bool divInLoaded = false;
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int steps = 0;
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struct {
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VPR h{}, m{}, l{};
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} acc;
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struct {
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VPR l{}, h{};
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} vcc, vco;
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bool semaphore = false;
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FORCE_INLINE void SetPC(const u16 val) {
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oldPC = pc & 0xFFC;
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pc = val & 0xFFC;
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nextPC = pc + 4;
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}
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[[nodiscard]] FORCE_INLINE s64 GetACC(const int e) const {
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s64 val = u64(acc.h.element[e]) << 32;
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val |= u64(acc.m.element[e]) << 16;
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val |= u64(acc.l.element[e]) << 00;
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if ((val & 0x0000800000000000) != 0) {
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val |= 0xFFFF000000000000;
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}
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return val;
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}
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FORCE_INLINE void SetACC(const int e, const s64 val) {
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acc.h.element[e] = val >> 32;
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acc.m.element[e] = val >> 16;
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acc.l.element[e] = val;
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}
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[[nodiscard]] FORCE_INLINE u16 GetVCO() const {
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u16 value = 0;
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for (int i = 0; i < 8; i++) {
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const bool h = vco.h.element[7 - i] != 0;
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const bool l = vco.l.element[7 - i] != 0;
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const u32 mask = (l << i) | (h << (i + 8));
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value |= mask;
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}
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return value;
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}
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[[nodiscard]] FORCE_INLINE u16 GetVCC() const {
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u16 value = 0;
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for (int i = 0; i < 8; i++) {
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const bool h = vcc.h.element[7 - i] != 0;
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const bool l = vcc.l.element[7 - i] != 0;
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const u32 mask = (l << i) | (h << (i + 8));
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value |= mask;
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}
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return value;
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}
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[[nodiscard]] FORCE_INLINE u8 GetVCE() const {
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u8 value = 0;
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for (int i = 0; i < 8; i++) {
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const bool l = vce.element[ELEMENT_INDEX(i)] != 0;
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value |= (l << i);
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}
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return value;
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}
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[[nodiscard]] FORCE_INLINE u32 ReadWord(u32 addr) const {
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addr &= 0xfff;
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return GET_RSP_WORD(addr);
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}
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FORCE_INLINE void WriteWord(u32 addr, const u32 val) {
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addr &= 0xfff;
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SET_RSP_WORD(addr, val);
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}
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[[nodiscard]] FORCE_INLINE u16 ReadHalf(u32 addr) const {
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addr &= 0xfff;
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return GET_RSP_HALF(addr);
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}
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FORCE_INLINE void WriteHalf(u32 addr, const u16 val) {
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addr &= 0xfff;
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SET_RSP_HALF(addr, val);
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}
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[[nodiscard]] FORCE_INLINE u8 ReadByte(u32 addr) const {
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addr &= 0xfff;
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return RSP_BYTE(addr);
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}
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FORCE_INLINE void WriteByte(u32 addr, const u8 val) {
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addr &= 0xfff;
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RSP_BYTE(addr) = val;
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}
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FORCE_INLINE bool AcquireSemaphore() {
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if (semaphore) {
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return true;
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} else {
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semaphore = true;
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return false;
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}
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}
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FORCE_INLINE void ReleaseSemaphore() { semaphore = false; }
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void add(u32 instr);
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void addi(u32 instr);
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void and_(u32 instr);
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void andi(u32 instr);
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void b(u32 instr, bool cond);
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void blink(u32 instr, bool cond);
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void cfc2(u32 instr);
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void ctc2(u32 instr);
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void lb(u32 instr);
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void lh(u32 instr);
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void lw(u32 instr);
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void lbu(u32 instr);
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void lhu(u32 instr);
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void lui(u32 instr);
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void luv(u32 instr);
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void lbv(u32 instr);
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void ldv(u32 instr);
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void lsv(u32 instr);
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void llv(u32 instr);
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void lrv(u32 instr);
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void lqv(u32 instr);
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void lfv(u32 instr);
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void lhv(u32 instr);
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void ltv(u32 instr);
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void lpv(u32 instr);
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void j(u32 instr);
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void jal(u32 instr);
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void jr(u32 instr);
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void jalr(u32 instr);
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void nor(u32 instr);
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void or_(u32 instr);
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void ori(u32 instr);
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void xor_(u32 instr);
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void xori(u32 instr);
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void sb(u32 instr);
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void sh(u32 instr);
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void sw(u32 instr);
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void swv(u32 instr);
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void sub(u32 instr);
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void sbv(u32 instr);
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void sdv(u32 instr);
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void stv(u32 instr);
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void sqv(u32 instr);
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void ssv(u32 instr);
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void suv(u32 instr);
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void slv(u32 instr);
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void shv(u32 instr);
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void sfv(u32 instr);
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void srv(u32 instr);
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void spv(u32 instr);
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void sllv(u32 instr);
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void srlv(u32 instr);
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void srav(u32 instr);
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void sll(u32 instr);
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void srl(u32 instr);
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void sra(u32 instr);
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void slt(u32 instr);
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void sltu(u32 instr);
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void slti(u32 instr);
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void sltiu(u32 instr);
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void vabs(u32 instr);
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void vadd(u32 instr);
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void vaddc(u32 instr);
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void vand(u32 instr);
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void vnand(u32 instr);
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void vch(u32 instr);
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void vcr(u32 instr);
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void vcl(u32 instr);
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void vmacf(u32 instr);
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void vmacu(u32 instr);
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void vmacq(u32 instr);
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void vmadh(u32 instr);
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void vmadl(u32 instr);
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void vmadm(u32 instr);
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void vmadn(u32 instr);
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void vmov(u32 instr);
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void vmulf(u32 instr);
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void vmulu(u32 instr);
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void vmulq(u32 instr);
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void vmudl(u32 instr);
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void vmudh(u32 instr);
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void vmudm(u32 instr);
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void vmudn(u32 instr);
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void vmrg(u32 instr);
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void vlt(u32 instr);
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void veq(u32 instr);
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void vne(u32 instr);
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void vge(u32 instr);
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void vrcp(u32 instr);
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void vrsq(u32 instr);
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void vrcpl(u32 instr);
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void vrsql(u32 instr);
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void vrndp(u32 instr);
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void vrndn(u32 instr);
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void vrcph(u32 instr);
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void vsar(u32 instr);
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void vsub(u32 instr);
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void vsubc(u32 instr);
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void vxor(u32 instr);
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void vnxor(u32 instr);
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void vor(u32 instr);
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void vnor(u32 instr);
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void vzero(u32 instr);
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void mfc0(const RDP &rdp, u32 instr);
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void mtc0(u32 instr) const;
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void mfc2(u32 instr);
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void mtc2(u32 instr);
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template <bool toRdram>
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void DMA();
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void WriteStatus(u32 value);
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private:
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Registers ®s;
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Mem &mem;
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FORCE_INLINE void branch(const u16 address, const bool cond) {
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if (cond) {
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nextPC = address & 0xFFC;
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}
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}
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FORCE_INLINE void branch_likely(const u16 address, const bool cond) {
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if (cond) {
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nextPC = address & 0xFFC;
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} else {
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pc = nextPC & 0xFFC;
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nextPC = pc + 4;
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}
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}
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};
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} // namespace n64
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