341 lines
8.9 KiB
C
341 lines
8.9 KiB
C
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2023 */
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/* Automatically translated source file from LLVM. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Only small edits allowed. */
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/* For multiple similar edits, please create a Patch for the translator. */
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/* Capstone's C++ file translator: */
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/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
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//===-- SparcInstPrinter.cpp - Convert Sparc MCInst to assembly syntax -----==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an Sparc MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <capstone/platform.h>
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#include "../../MCInstPrinter.h"
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#include "../../Mapping.h"
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#include "SparcInstPrinter.h"
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#include "SparcLinkage.h"
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#include "SparcMCTargetDesc.h"
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#include "SparcMapping.h"
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#include "SparcDisassemblerExtension.h"
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#define CONCAT(a, b) CONCAT_(a, b)
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#define CONCAT_(a, b) a##_##b
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#define DEBUG_TYPE "asm-printer"
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static void printCustomAliasOperand(
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MCInst *MI, uint64_t Address, unsigned OpIdx,
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unsigned PrintMethodIdx,
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SStream *OS);
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static void printOperand(MCInst *MI, int opNum, SStream *O);
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#define GET_INSTRUCTION_NAME
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#define PRINT_ALIAS_INSTR
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#include "SparcGenAsmWriter.inc"
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static void printRegName(SStream *OS, MCRegister Reg)
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{
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SStream_concat1(OS, '%');
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SStream_concat0(OS, getRegisterName(Reg, Sparc_NoRegAltName));
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}
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static void printRegNameAlt(SStream *OS, MCRegister Reg, unsigned AltIdx)
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{
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SStream_concat1(OS, '%');
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SStream_concat0(OS, getRegisterName(Reg, AltIdx));
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}
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static void printInst(MCInst *MI, uint64_t Address, SStream *O)
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{
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bool isAlias = false;
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bool useAliasDetails = map_use_alias_details(MI);
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map_set_fill_detail_ops(MI, useAliasDetails);
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if (!printAliasInstr(MI, Address, O) &&
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!printSparcAliasInstr(MI, O)) {
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MCInst_setIsAlias(MI, false);
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} else {
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isAlias = true;
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MCInst_setIsAlias(MI, isAlias);
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if (useAliasDetails) {
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return;
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}
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}
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if (!isAlias || !useAliasDetails) {
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map_set_fill_detail_ops(MI, !(isAlias && useAliasDetails));
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if (isAlias)
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SStream_Close(O);
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printInstruction(MI, Address, O);
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if (isAlias)
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SStream_Open(O);
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}
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}
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bool printSparcAliasInstr(MCInst *MI, SStream *O)
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{
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switch (MCInst_getOpcode(MI)) {
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default:
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return false;
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case Sparc_JMPLrr:
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case Sparc_JMPLri: {
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if (MCInst_getNumOperands(MI) != 3)
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return false;
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if (!MCOperand_isReg(MCInst_getOperand(MI, (0))))
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return false;
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switch (MCOperand_getReg(MCInst_getOperand(MI, (0)))) {
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default:
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return false;
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case Sparc_G0: // jmp $addr | ret | retl
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if (MCOperand_isImm(MCInst_getOperand(MI, (2))) &&
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MCOperand_getImm(MCInst_getOperand(MI, (2))) == 8) {
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switch (MCOperand_getReg(
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MCInst_getOperand(MI, (1)))) {
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default:
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break;
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case Sparc_I7:
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SStream_concat0(O, "\tret");
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return true;
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case Sparc_O7:
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SStream_concat0(O, "\tretl");
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return true;
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}
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}
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SStream_concat0(O, "\tjmp ");
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printMemOperand(MI, 1, O);
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return true;
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case Sparc_O7: // call $addr
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SStream_concat0(O, "\tcall ");
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printMemOperand(MI, 1, O);
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return true;
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}
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}
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case Sparc_V9FCMPS:
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case Sparc_V9FCMPD:
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case Sparc_V9FCMPQ:
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case Sparc_V9FCMPES:
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case Sparc_V9FCMPED:
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case Sparc_V9FCMPEQ: {
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if (Sparc_getFeatureBits(MI->csh->mode, Sparc_FeatureV9) || (MCInst_getNumOperands(MI) != 3) ||
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(!MCOperand_isReg(MCInst_getOperand(MI, (0)))) ||
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(MCOperand_getReg(MCInst_getOperand(MI, (0))) != Sparc_FCC0))
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return false;
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// if V8, skip printing %fcc0.
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switch (MCInst_getOpcode(MI)) {
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default:
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case Sparc_V9FCMPS:
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SStream_concat0(O, "\tfcmps ");
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break;
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case Sparc_V9FCMPD:
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SStream_concat0(O, "\tfcmpd ");
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break;
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case Sparc_V9FCMPQ:
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SStream_concat0(O, "\tfcmpq ");
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break;
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case Sparc_V9FCMPES:
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SStream_concat0(O, "\tfcmpes ");
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break;
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case Sparc_V9FCMPED:
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SStream_concat0(O, "\tfcmped ");
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break;
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case Sparc_V9FCMPEQ:
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SStream_concat0(O, "\tfcmpeq ");
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break;
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}
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printOperand(MI, 1, O);
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SStream_concat0(O, ", ");
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printOperand(MI, 2, O);
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return true;
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}
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}
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}
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static void printOperand(MCInst *MI, int opNum, SStream *O)
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{
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Sparc_add_cs_detail_0(MI, Sparc_OP_GROUP_Operand, opNum);
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MCOperand *MO = MCInst_getOperand(MI, (opNum));
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if (MCOperand_isReg(MO)) {
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unsigned Reg = MCOperand_getReg(MO);
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if (Sparc_getFeatureBits(MI->csh->mode, Sparc_FeatureV9))
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printRegNameAlt(O, Reg, Sparc_RegNamesStateReg);
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else
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printRegName(O, Reg);
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return;
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}
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if (MCOperand_isImm(MO)) {
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switch (MCInst_getOpcode(MI)) {
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default:
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printInt32(O, (int)MCOperand_getImm(MO));
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return;
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case Sparc_TICCri: // Fall through
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case Sparc_TICCrr: // Fall through
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case Sparc_TRAPri: // Fall through
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case Sparc_TRAPrr: // Fall through
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case Sparc_TXCCri: // Fall through
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case Sparc_TXCCrr: // Fall through
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// Only seven-bit values up to 127.
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printInt8(O, ((int)MCOperand_getImm(MO) & 0x7f));
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return;
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}
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}
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CS_ASSERT(MCOperand_isExpr(MO) &&
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"Unknown operand kind in printOperand");
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}
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void printMemOperand(MCInst *MI, int opNum, SStream *O)
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{
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Sparc_add_cs_detail_0(MI, Sparc_OP_GROUP_MemOperand, opNum);
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MCOperand *Op1 = MCInst_getOperand(MI, (opNum));
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MCOperand *Op2 = MCInst_getOperand(MI, (opNum + 1));
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bool PrintedFirstOperand = false;
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if (MCOperand_isReg(Op1) && MCOperand_getReg(Op1) != Sparc_G0) {
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printOperand(MI, opNum, O);
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PrintedFirstOperand = true;
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}
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// Skip the second operand iff it adds nothing (literal 0 or %g0) and we've
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// already printed the first one
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const bool SkipSecondOperand =
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PrintedFirstOperand &&
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((MCOperand_isReg(Op2) && MCOperand_getReg(Op2) == Sparc_G0) ||
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(MCOperand_isImm(Op2) && MCOperand_getImm(Op2) == 0));
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if (!SkipSecondOperand) {
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if (PrintedFirstOperand)
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SStream_concat0(O, "+");
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printOperand(MI, opNum + 1, O);
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}
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}
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void printCCOperand(MCInst *MI, int opNum, SStream *O)
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{
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Sparc_add_cs_detail_0(MI, Sparc_OP_GROUP_CCOperand, opNum);
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int CC = (int)MCOperand_getImm(MCInst_getOperand(MI, (opNum)));
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switch (MCInst_getOpcode(MI)) {
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default:
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break;
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case Sparc_FBCOND:
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case Sparc_FBCONDA:
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case Sparc_FBCOND_V9:
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case Sparc_FBCONDA_V9:
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case Sparc_BPFCC:
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case Sparc_BPFCCA:
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case Sparc_BPFCCNT:
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case Sparc_BPFCCANT:
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case Sparc_MOVFCCrr:
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case Sparc_V9MOVFCCrr:
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case Sparc_MOVFCCri:
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case Sparc_V9MOVFCCri:
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case Sparc_FMOVS_FCC:
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case Sparc_V9FMOVS_FCC:
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case Sparc_FMOVD_FCC:
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case Sparc_V9FMOVD_FCC:
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case Sparc_FMOVQ_FCC:
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case Sparc_V9FMOVQ_FCC:
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// Make sure CC is a fp conditional flag.
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CC = (CC < SPARC_CC_FCC_BEGIN) ? (CC + SPARC_CC_FCC_BEGIN) : CC;
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break;
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case Sparc_CBCOND:
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case Sparc_CBCONDA:
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// Make sure CC is a cp conditional flag.
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CC = (CC < SPARC_CC_CPCC_BEGIN) ? (CC + SPARC_CC_CPCC_BEGIN) : CC;
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break;
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case Sparc_BPR:
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case Sparc_BPRA:
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case Sparc_BPRNT:
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case Sparc_BPRANT:
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case Sparc_MOVRri:
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case Sparc_MOVRrr:
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case Sparc_FMOVRS:
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case Sparc_FMOVRD:
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case Sparc_FMOVRQ:
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// Make sure CC is a register conditional flag.
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CC = (CC < SPARC_CC_REG_BEGIN) ? (CC + SPARC_CC_REG_BEGIN) : CC;
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break;
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}
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SStream_concat0(O, SPARCCondCodeToString((sparc_cc)CC));
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}
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bool printGetPCX(MCInst *MI, unsigned opNum, SStream *O)
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{
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printf("FIXME: Implement SparcInstPrinter::printGetPCX.");
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return true;
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}
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void printMembarTag(MCInst *MI, int opNum, SStream *O)
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{
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Sparc_add_cs_detail_0(MI, Sparc_OP_GROUP_MembarTag, opNum);
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static const char *const TagNames[] = { "#LoadLoad", "#StoreLoad",
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"#LoadStore", "#StoreStore",
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"#Lookaside", "#MemIssue",
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"#Sync" };
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unsigned Imm = MCOperand_getImm(MCInst_getOperand(MI, (opNum)));
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if (Imm > 127) {
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printUInt32(O, Imm);
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return;
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}
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bool First = true;
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for (unsigned i = 0; i < sizeof(TagNames); i++) {
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if (Imm & (1ull << i)) {
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SStream_concat(O, "%s", (First ? "" : " | "));
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SStream_concat0(O, TagNames[i]);
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First = false;
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}
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}
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}
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#define GET_ASITAG_IMPL
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#include "SparcGenSystemOperands.inc"
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void printASITag(MCInst *MI, int opNum, SStream *O)
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{
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Sparc_add_cs_detail_0(MI, Sparc_OP_GROUP_ASITag, opNum);
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unsigned Imm = MCOperand_getImm(MCInst_getOperand(MI, (opNum)));
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const Sparc_ASITag_ASITag *ASITag = Sparc_ASITag_lookupASITagByEncoding(Imm);
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if (Sparc_getFeatureBits(MI->csh->mode, Sparc_FeatureV9) && ASITag) {
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SStream_concat1(O, '#');
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SStream_concat0(O, ASITag->Name);
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} else
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printUInt32(O, Imm);
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}
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void Sparc_LLVM_printInst(MCInst *MI, uint64_t Address, const char *Annot,
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SStream *O)
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{
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printInst(MI, Address, O);
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}
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const char *Sparc_LLVM_getRegisterName(unsigned RegNo, unsigned AltIdx)
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{
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return getRegisterName(RegNo, AltIdx);
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}
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