Files
kaizen/src/backend/core/Interpreter.hpp
T
2026-03-23 12:11:07 +01:00

126 lines
3.1 KiB
C++

#pragma once
#include <BaseCPU.hpp>
#include <Mem.hpp>
#include <vector>
namespace n64 {
struct Core;
struct Interpreter final : BaseCPU {
explicit Interpreter(Mem&, Registers&);
~Interpreter() override = default;
u32 Step() override;
void Reset() override {
cop2Latch = {};
}
private:
Registers& regs;
Mem& mem;
u64 cop2Latch{};
friend struct Cop1;
#define check_address_error(mask, vaddr) \
(((!regs.cop0.is64BitAddressing) && (s32)(vaddr) != (vaddr)) || (((vaddr) & (mask)) != 0))
[[nodiscard]] bool ShouldServiceInterrupt() const;
void CheckCompareInterrupt() const;
void cop2Decode(Instruction);
void special(Instruction);
void regimm(Instruction);
void Exec(Instruction);
void add(Instruction);
void addu(Instruction);
void addi(Instruction);
void addiu(Instruction);
void andi(Instruction);
void and_(Instruction);
void branch(bool, s64);
void branch_likely(bool, s64);
void b(Instruction, bool);
void blink(Instruction, bool);
void bl(Instruction, bool);
void bllink(Instruction, bool);
void dadd(Instruction);
void daddu(Instruction);
void daddi(Instruction);
void daddiu(Instruction);
void ddiv(Instruction);
void ddivu(Instruction);
void div(Instruction);
void divu(Instruction);
void dmult(Instruction);
void dmultu(Instruction);
void dsll(Instruction);
void dsllv(Instruction);
void dsll32(Instruction);
void dsra(Instruction);
void dsrav(Instruction);
void dsra32(Instruction);
void dsrl(Instruction);
void dsrlv(Instruction);
void dsrl32(Instruction);
void dsub(Instruction);
void dsubu(Instruction);
void j(Instruction);
void jr(Instruction);
void jal(Instruction);
void jalr(Instruction);
void lui(Instruction);
void lbu(Instruction);
void lb(Instruction);
void ld(Instruction);
void ldl(Instruction);
void ldr(Instruction);
void lh(Instruction);
void lhu(Instruction);
void ll(Instruction);
void lld(Instruction);
void lw(Instruction);
void lwl(Instruction);
void lwu(Instruction);
void lwr(Instruction);
void mfhi(Instruction);
void mflo(Instruction);
void mult(Instruction);
void multu(Instruction);
void mthi(Instruction);
void mtlo(Instruction);
void nor(Instruction);
void sb(Instruction);
void sc(Instruction);
void scd(Instruction);
void sd(Instruction);
void sdl(Instruction);
void sdr(Instruction);
void sh(Instruction);
void sw(Instruction);
void swl(Instruction);
void swr(Instruction);
void slti(Instruction);
void sltiu(Instruction);
void slt(Instruction);
void sltu(Instruction);
void sll(Instruction);
void sllv(Instruction);
void sub(Instruction);
void subu(Instruction);
void sra(Instruction);
void srav(Instruction);
void srl(Instruction);
void srlv(Instruction);
void trap(bool) const;
void or_(Instruction);
void ori(Instruction);
void xor_(Instruction);
void xori(Instruction);
void mtc2(Instruction);
void mfc2(Instruction);
void dmtc2(Instruction);
void dmfc2(Instruction);
void ctc2(Instruction);
void cfc2(Instruction);
};
} // namespace n64