458 lines
13 KiB
C
458 lines
13 KiB
C
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2023 */
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/* Automatically translated source file from LLVM. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Only small edits allowed. */
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/* For multiple similar edits, please create a Patch for the translator. */
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/* Capstone's C++ file translator: */
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/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
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//===------ PPCDisassembler.cpp - Disassembler for PowerPC ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <capstone/platform.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "../../LEB128.h"
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#include "../../MCDisassembler.h"
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#include "../../MCFixedLenDisassembler.h"
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#include "../../MCInst.h"
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#include "../../MCInstPrinter.h"
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#include "../../MCInstrDesc.h"
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#include "../../MCRegisterInfo.h"
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#include "../../SStream.h"
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#include "../../utils.h"
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#include "PPCLinkage.h"
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#include "PPCMapping.h"
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#include "PPCMCTargetDesc.h"
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#include "PPCPredicates.h"
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#define CONCAT(a, b) CONCAT_(a, b)
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#define CONCAT_(a, b) a##_##b
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DEFINE_PPC_REGCLASSES
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#define DEBUG_TYPE "ppc-disassembler"
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DecodeStatus getInstruction(csh ud, const uint8_t *Bytes, size_t BytesLen,
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MCInst *MI, uint16_t *Size, uint64_t Address,
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void *Info);
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// end anonymous namespace
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static DecodeStatus decodeCondBrTarget(MCInst *Inst, unsigned Imm,
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uint64_t Address, const void *Decoder)
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{
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MCOperand_CreateImm0(Inst, (SignExtend32((Imm), 14)));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDirectBrTarget(MCInst *Inst, unsigned Imm,
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uint64_t Address, const void *Decoder)
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{
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int32_t Offset = SignExtend32((Imm), 24);
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MCOperand_CreateImm0(Inst, (Offset));
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return MCDisassembler_Success;
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}
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// FIXME: These can be generated by TableGen from the existing register
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// encoding values!
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static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo,
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const MCPhysReg *Regs)
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{
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MCOperand_CreateReg0(Inst, (Regs[RegNo]));
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return MCDisassembler_Success;
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}
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static DecodeStatus DecodeCRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, CRRegs);
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}
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static DecodeStatus DecodeCRBITRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, CRBITRegs);
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}
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static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, FRegs);
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}
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static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, FRegs);
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}
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static DecodeStatus DecodeFpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address, const void *Decoder)
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{
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if (RegNo > 30 || (RegNo & 1))
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return MCDisassembler_Fail;
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return decodeRegisterClass(Inst, RegNo >> 1, FpRegs);
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}
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static DecodeStatus DecodeVFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VFRegs);
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}
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static DecodeStatus DecodeVRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VRegs);
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}
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static DecodeStatus DecodeVSRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VSRegs);
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}
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static DecodeStatus DecodeVSFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VSFRegs);
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}
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static DecodeStatus DecodeVSSRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VSSRegs);
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}
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static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, RRegs);
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}
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static DecodeStatus DecodeGPRC_NOR0RegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, RRegsNoR0);
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}
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static DecodeStatus DecodeG8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, XRegs);
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}
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static DecodeStatus DecodeG8pRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, XRegs);
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}
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static DecodeStatus DecodeG8RC_NOX0RegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, XRegsNoX0);
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}
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#define DecodePointerLikeRegClass0 DecodeGPRCRegisterClass
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#define DecodePointerLikeRegClass1 DecodeGPRC_NOR0RegisterClass
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static DecodeStatus DecodeSPERCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, SPERegs);
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}
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static DecodeStatus DecodeACCRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, ACCRegs);
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}
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static DecodeStatus DecodeWACCRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, WACCRegs);
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}
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static DecodeStatus DecodeWACC_HIRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, WACC_HIRegs);
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}
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// TODO: Make this function static when the register class is used by a new
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// instruction.
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DecodeStatus DecodeDMRROWRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address, const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, DMRROWRegs);
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}
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static DecodeStatus DecodeDMRROWpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, DMRROWpRegs);
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}
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static DecodeStatus DecodeDMRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, DMRRegs);
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}
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// TODO: Make this function static when the register class is used by a new
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// instruction.
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DecodeStatus DecodeDMRpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address, const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, DMRpRegs);
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}
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static DecodeStatus DecodeVSRpRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, VSRpRegs);
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}
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#define DecodeQSRCRegisterClass DecodeQFRCRegisterClass
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#define DecodeQBRCRegisterClass DecodeQFRCRegisterClass
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static DecodeStatus DecodeQFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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return decodeRegisterClass(Inst, RegNo, QFRegs);
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}
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#define DEFINE_decodeUImmOperand(N) \
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static DecodeStatus CONCAT(decodeUImmOperand, \
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N)(MCInst * Inst, uint64_t Imm, \
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int64_t Address, const void *Decoder) \
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{ \
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if (!isUIntN(N, Imm)) \
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return MCDisassembler_Fail; \
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MCOperand_CreateImm0(Inst, (Imm)); \
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return MCDisassembler_Success; \
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}
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DEFINE_decodeUImmOperand(1);
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DEFINE_decodeUImmOperand(2);
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DEFINE_decodeUImmOperand(3);
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DEFINE_decodeUImmOperand(4);
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DEFINE_decodeUImmOperand(5);
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DEFINE_decodeUImmOperand(6);
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DEFINE_decodeUImmOperand(7);
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DEFINE_decodeUImmOperand(8);
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DEFINE_decodeUImmOperand(10);
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DEFINE_decodeUImmOperand(12);
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DEFINE_decodeUImmOperand(16);
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#define DEFINE_decodeSImmOperand(N) \
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static DecodeStatus CONCAT(decodeSImmOperand, \
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N)(MCInst * Inst, uint64_t Imm, \
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int64_t Address, const void *Decoder) \
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{ \
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if (!isUIntN(N, Imm)) \
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return MCDisassembler_Fail; \
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MCOperand_CreateImm0(Inst, (SignExtend64((Imm), N))); \
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return MCDisassembler_Success; \
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}
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DEFINE_decodeSImmOperand(16);
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DEFINE_decodeSImmOperand(5);
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DEFINE_decodeSImmOperand(34);
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static DecodeStatus decodeImmZeroOperand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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if (Imm != 0)
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return MCDisassembler_Fail;
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MCOperand_CreateImm0(Inst, (Imm));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeVSRpEvenOperands(MCInst *Inst, uint64_t RegNo,
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uint64_t Address,
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const void *Decoder)
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{
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if (RegNo & 1)
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return MCDisassembler_Fail;
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MCOperand_CreateReg0(Inst, (VSRpRegs[RegNo >> 1]));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispSPE8Operand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// Decode the dispSPE8 field, which has 5-bits, 8-byte aligned.
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uint64_t Disp = Imm & 0x1F;
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MCOperand_CreateImm0(Inst, (Disp << 3));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispSPE4Operand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// Decode the dispSPE8 field, which has 5-bits, 4-byte aligned.
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uint64_t Disp = Imm & 0x1F;
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MCOperand_CreateImm0(Inst, (Disp << 2));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispSPE2Operand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// Decode the dispSPE8 field, which has 5-bits, 2-byte aligned.
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uint64_t Disp = Imm & 0x1F;
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MCOperand_CreateImm0(Inst, (Disp << 1));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispRIXOperand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// The rix displacement is an immediate shifted by 2
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MCOperand_CreateImm0(Inst, (SignExtend64((Imm << 2), 16)));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispRIX16Operand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// The rix16 displacement has 12-bits which are shifted by 4.
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MCOperand_CreateImm0(Inst, (SignExtend64((Imm << 4), 16)));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeDispRIHashOperand(MCInst *Inst, uint64_t Imm,
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int64_t Address,
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const void *Decoder)
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{
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// Decode the disp field for a hash store or hash check operation.
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// The field is composed of an immediate value that is 6 bits
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// and covers the range -8 to -512. The immediate is always negative and 2s
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// complement which is why we sign extend a 7 bit value.
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const int64_t Disp = SignExtend64(((Imm & 0x3F) + 64), 7) * 8;
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MCOperand_CreateImm0(Inst, (Disp));
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return MCDisassembler_Success;
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}
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static DecodeStatus decodeCRBitMOperand(MCInst *Inst, uint64_t Imm,
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int64_t Address, const void *Decoder)
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{
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// The cr bit encoding is 0x80 >> cr_reg_num.
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unsigned Zeros = CountTrailingZeros_32(Imm);
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if (Zeros >= 8)
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return MCDisassembler_Fail;
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MCOperand_CreateReg0(Inst, (CRRegs[7 - Zeros]));
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return MCDisassembler_Success;
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}
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#include "PPCGenDisassemblerTables.inc"
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DecodeStatus getInstruction(csh ud, const uint8_t *Bytes, size_t BytesLen,
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MCInst *MI, uint16_t *Size, uint64_t Address,
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void *Info)
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{
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// If this is an 8-byte prefixed instruction, handle it here.
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// Note: prefixed instructions aren't technically 8-byte entities - the
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// prefix
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// appears in memory at an address 4 bytes prior to that of the base
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// instruction regardless of endianness. So we read the two pieces and
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// rebuild the 8-byte instruction.
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// TODO: In this function we call decodeInstruction several times with
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// different decoder tables. It may be possible to only call once by
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// looking at the top 6 bits of the instruction.
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if (PPC_getFeatureBits(MI->csh->mode, PPC_FeaturePrefixInstrs) &&
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BytesLen >= 8) {
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uint32_t Prefix = readBytes32(MI, Bytes);
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uint32_t BaseInst = readBytes32(MI, Bytes + 4);
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uint64_t Inst = BaseInst | (uint64_t)Prefix << 32;
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DecodeStatus result =
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decodeInstruction_4(DecoderTable64, MI, Inst, Address, NULL);
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if (result != MCDisassembler_Fail) {
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*Size = 8;
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return result;
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}
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}
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// Get the four bytes of the instruction.
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*Size = 4;
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if (BytesLen < 4) {
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*Size = 0;
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return MCDisassembler_Fail;
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}
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// Read the instruction in the proper endianness.
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uint64_t Inst = readBytes32(MI, Bytes);
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if (PPC_getFeatureBits(MI->csh->mode, PPC_FeatureQPX)) {
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DecodeStatus result = decodeInstruction_4(DecoderTableQPX32, MI,
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Inst, Address, NULL);
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if (result != MCDisassembler_Fail)
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return result;
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} else if (PPC_getFeatureBits(MI->csh->mode, PPC_FeatureSPE)) {
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DecodeStatus result = decodeInstruction_4(DecoderTableSPE32, MI,
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Inst, Address, NULL);
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if (result != MCDisassembler_Fail)
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return result;
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} else if (PPC_getFeatureBits(MI->csh->mode, PPC_FeaturePS)) {
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DecodeStatus result = decodeInstruction_4(DecoderTablePS32, MI,
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Inst, Address, NULL);
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if (result != MCDisassembler_Fail)
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return result;
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}
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return decodeInstruction_4(DecoderTable32, MI, Inst, Address, NULL);
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}
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DecodeStatus PPC_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
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size_t BytesLen, MCInst *MI,
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uint16_t *Size, uint64_t Address,
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void *Info)
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{
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return getInstruction(handle, Bytes, BytesLen, MI, Size, Address, Info);
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}
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