161 lines
3.5 KiB
YAML
161 lines
3.5 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x10 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vminu.vv v8, v4, v20, v0.t"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x12 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vminu.vv v8, v4, v20"
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x10 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vminu.vx v8, v4, a0, v0.t"
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x12 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vminu.vx v8, v4, a0"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x14 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmin.vv v8, v4, v20, v0.t"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x16 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmin.vv v8, v4, v20"
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-
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x14 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmin.vx v8, v4, a0, v0.t"
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x16 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmin.vx v8, v4, a0"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x18 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vmaxu.vv v8, v4, v20, v0.t"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x1a ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmaxu.vv v8, v4, v20"
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-
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x18 ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vmaxu.vx v8, v4, a0, v0.t"
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x1a ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmaxu.vx v8, v4, a0"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x1c ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmax.vv v8, v4, v20, v0.t"
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input:
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bytes: [ 0x57, 0x04, 0x4a, 0x1e ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmax.vv v8, v4, v20"
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-
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x1c ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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-
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asm_text: "vmax.vx v8, v4, a0, v0.t"
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input:
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bytes: [ 0x57, 0x44, 0x45, 0x1e ]
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arch: "CS_ARCH_RISCV"
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options: [ "CS_MODE_RISCV64", "CS_MODE_RISCV_V" ]
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expected:
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insns:
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asm_text: "vmax.vx v8, v4, a0"
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