Idle skipping... maybe?
This commit is contained in:
@@ -20,6 +20,7 @@ vgcore.*
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*.data
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*.data
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disasm.txt
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disasm.txt
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*log*.txt
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*log*.txt
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*.log
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CMakeSettings.json
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CMakeSettings.json
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compile_commands.json
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compile_commands.json
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*.diagsession
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*.diagsession
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@@ -110,6 +110,15 @@ void Core::Run(const float volumeL, const float volumeR) {
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}
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}
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while (cycles < mem->mmio.vi.cyclesPerHalfline) {
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while (cycles < mem->mmio.vi.cyclesPerHalfline) {
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if (IsAnythingSkippable()) {
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const u32 taken = Scheduler::GetInstance().events.top().time - Scheduler::GetInstance().ticks;
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cycles += taken;
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frameCycles += taken;
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Scheduler::GetInstance().Tick(taken);
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isReadingAnyIO = false;
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continue;
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}
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const u32 taken = StepCPU();
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const u32 taken = StepCPU();
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cycles += taken;
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cycles += taken;
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@@ -141,4 +150,9 @@ void Core::Run(const float volumeL, const float volumeR) {
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if (broken)
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if (broken)
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pause = true;
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pause = true;
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}
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}
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bool Core::IsAnythingSkippable() {
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MMIO &mmio = mem->mmio;
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return (mmio.si.status.dmaBusy || mmio.pi.dmaBusy || mmio.pi.ioBusy) && isReadingAnyIO;
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}
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} // namespace n64
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} // namespace n64
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@@ -19,6 +19,8 @@ struct Core {
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return instance;
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return instance;
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}
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}
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static void SetIdleSkippingStatus(bool v) { GetInstance().isReadingAnyIO = v; }
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static Registers &GetRegs() { return GetInstance().regs; }
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static Registers &GetRegs() { return GetInstance().regs; }
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static Mem &GetMem() { return *GetInstance().mem; }
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static Mem &GetMem() { return *GetInstance().mem; }
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@@ -57,5 +59,8 @@ struct Core {
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#endif
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#endif
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Interpreter interpreter;
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Interpreter interpreter;
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ParallelRDP parallel;
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ParallelRDP parallel;
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bool isReadingAnyIO = false;
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bool IsAnythingSkippable();
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};
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};
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} // namespace n64
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} // namespace n64
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@@ -186,7 +186,8 @@ auto PI::BusRead<u16, false>(u32 addr) -> u16 {
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addr = (addr + 2) & ~3;
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addr = (addr + 2) & ~3;
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const u32 index = HALF_ADDRESS(addr) - SREGION_PI_ROM;
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const u32 index = HALF_ADDRESS(addr) - SREGION_PI_ROM;
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if (index > mem.rom.cart.size() - 1) {
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if (index > mem.rom.cart.size() - 1) {
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panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
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panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index,
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index);
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}
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}
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return ircolib::ReadAccess<u16>(mem.rom.cart, index);
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return ircolib::ReadAccess<u16>(mem.rom.cart, index);
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}
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}
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@@ -260,7 +261,8 @@ auto PI::BusRead<u32, false>(u32 addr) -> u32 {
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if (index > mem.rom.cart.size() - 3) { // -3 because we're reading an entire word
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if (index > mem.rom.cart.size() - 3) { // -3 because we're reading an entire word
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switch (addr) {
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switch (addr) {
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case REGION_CART_ISVIEWER_BUFFER:
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case REGION_CART_ISVIEWER_BUFFER:
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return std::byteswap<u32>(ircolib::ReadAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER));
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return std::byteswap<u32>(
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ircolib::ReadAccess<u32>(mem.isviewer, addr - SREGION_CART_ISVIEWER_BUFFER));
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case CART_ISVIEWER_FLUSH:
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case CART_ISVIEWER_FLUSH:
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panic("Read from ISViewer flush!");
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panic("Read from ISViewer flush!");
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default:
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default:
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@@ -367,7 +369,8 @@ auto PI::BusRead<u64, false>(u32 addr) -> u64 {
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{
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{
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const u32 index = addr - SREGION_PI_ROM;
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const u32 index = addr - SREGION_PI_ROM;
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if (index > mem.rom.cart.size() - 7) { // -7 because we're reading an entire dword
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if (index > mem.rom.cart.size() - 7) { // -7 because we're reading an entire dword
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panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index, index);
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panic("Address 0x{:08X} accessed an index {}/0x{:X} outside the bounds of the ROM!", addr, index,
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index);
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}
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}
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return ircolib::ReadAccess<u64>(mem.rom.cart, index);
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return ircolib::ReadAccess<u64>(mem.rom.cart, index);
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}
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}
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@@ -422,6 +425,7 @@ auto PI::Read(u32 addr) const -> u32 {
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return wrLen;
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return wrLen;
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case 0x04600010:
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case 0x04600010:
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{
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{
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Core::SetIdleSkippingStatus(true);
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u32 value = 0;
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u32 value = 0;
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value |= (dmaBusy << 0); // Is PI DMA active?
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value |= (dmaBusy << 0); // Is PI DMA active?
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value |= (ioBusy << 1); // Is PI IO busy?
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value |= (ioBusy << 1); // Is PI IO busy?
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@@ -24,6 +24,7 @@ auto SI::Read(u32 addr) const -> u32 {
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return 0;
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return 0;
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case 0x04800018:
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case 0x04800018:
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{
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{
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Core::SetIdleSkippingStatus(true);
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u32 val = 0;
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u32 val = 0;
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val |= status.dmaBusy;
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val |= status.dmaBusy;
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val |= (0 << 1);
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val |= (0 << 1);
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@@ -4,8 +4,16 @@
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#include <core/mmio/PIF.hpp>
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#include <core/mmio/PIF.hpp>
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namespace n64 {
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namespace n64 {
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struct SI {
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SI();
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void Reset();
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[[nodiscard]] auto Read(u32) const -> u32;
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void Write(u32, u32);
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template <bool toDram>
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void DMA();
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void DMA();
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union SIStatus {
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union Status {
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u32 raw{};
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u32 raw{};
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struct {
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struct {
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unsigned dmaBusy : 1;
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unsigned dmaBusy : 1;
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@@ -17,17 +25,8 @@ union SIStatus {
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};
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};
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};
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};
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struct SI {
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SI();
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void Reset();
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[[nodiscard]] auto Read(u32) const -> u32;
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void Write(u32, u32);
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template <bool toDram>
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void DMA();
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void DMA();
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bool toDram = false;
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bool toDram = false;
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SIStatus status{};
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Status status{};
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u32 dramAddr{};
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u32 dramAddr{};
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u32 pifAddr{};
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u32 pifAddr{};
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PIF pif;
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PIF pif;
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