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[JIT]: Introduce pipeline simulation like in the interpreter (still borked)

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This commit is contained in:
Simone Coco
2025-01-29 13:29:42 +01:00
parent bb498e599e
commit 3b06950ba3
3 changed files with 14 additions and 10 deletions
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6
src/backend/core/JIT.cpp
View File

@@ -38,7 +38,9 @@ void JIT::InvalidateBlock(const u32 paddr) {
}
int JIT::Step() {
blockOldPC = regs.oldPC;
blockPC = regs.pc;
blockNextPC = regs.nextPC;
u32 paddr = 0;
if (!regs.cop0.MapVAddr(Cop0::LOAD, blockPC, paddr)) {
@@ -118,7 +120,9 @@ int JIT::Step() {
return 1;
}*/
blockPC += 4;
blockOldPC = blockPC;
blockPC = blockNextPC;
blockNextPC += 4;
instructionsInBlock++;
Emit(instruction);

3
src/backend/core/JIT.hpp
View File

@@ -28,6 +28,7 @@ struct JIT : BaseCPU {
mem.Reset();
code.reset();
blockCache = {};
blockCache.resize(kUpperSize);
}
void InvalidateBlock(u32);
@@ -43,7 +44,7 @@ private:
Registers regs;
Mem mem;
u64 cop2Latch{};
u64 blockPC = 0;
u64 blockOldPC = 0, blockPC = 0, blockNextPC = 0;
friend struct Cop1;
friend struct Registers;
using BlockFn = int (*)();

15
src/backend/core/jit/instructions.cpp
View File

@@ -334,7 +334,7 @@ void JIT::bgezl(const u32 instr) {
void JIT::bltzal(const u32 instr) {
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockPC + 4);
regs.Write<s64>(31, blockNextPC);
if (regs.IsRegConstant(RS(instr))) {
branch_constant(regs.Read<s64>(RS(instr)) < 0, offset);
return;
@@ -348,7 +348,7 @@ void JIT::bltzal(const u32 instr) {
void JIT::bgezal(const u32 instr) {
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockPC + 4);
regs.Write<s64>(31, blockNextPC);
if (regs.IsRegConstant(RS(instr))) {
branch_constant(regs.Read<s64>(RS(instr)) >= 0, offset);
return;
@@ -362,7 +362,7 @@ void JIT::bgezal(const u32 instr) {
void JIT::bltzall(const u32 instr) {
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockPC + 4);
regs.Write<s64>(31, blockNextPC);
if (regs.IsRegConstant(RS(instr))) {
branch_likely_constant(regs.Read<s64>(RS(instr)) < 0, offset);
return;
@@ -376,7 +376,7 @@ void JIT::bltzall(const u32 instr) {
void JIT::bgezall(const u32 instr) {
const s16 imm = instr;
const s64 offset = u64((s64)imm) << 2;
regs.Write<s64>(31, blockPC + 4);
regs.Write<s64>(31, blockNextPC);
if (regs.IsRegConstant(RS(instr))) {
branch_likely_constant(regs.Read<s64>(RS(instr)) >= 0, offset);
return;
@@ -864,8 +864,7 @@ void JIT::dsubu(u32 instr) {
void JIT::j(const u32 instr) {
const s32 target = (instr & 0x3ffffff) << 2;
const s64 oldPC = blockPC - 8;
const s64 address = (oldPC & ~0xfffffff) | target;
const s64 address = (blockOldPC & ~0xfffffff) | target;
branch_abs_constant(true, address);
}
@@ -881,12 +880,12 @@ void JIT::jr(const u32 instr) {
}
void JIT::jal(const u32 instr) {
regs.Write<s64>(31, blockPC + 4);
regs.Write<s64>(31, blockNextPC);
j(instr);
}
void JIT::jalr(const u32 instr) {
regs.Write<s64>(RD(instr), blockPC + 4);
regs.Write<s64>(RD(instr), blockNextPC);
jr(instr);
}