Refactor MIPS Interface
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@@ -37,7 +37,7 @@ void Scheduler::tick(u64 t, n64::Mem& mem, n64::Registers& regs) {
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si.DMA(mem, regs);
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break;
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case PI_DMA_COMPLETE:
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InterruptRaise(mi, regs, n64::Interrupt::PI);
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mi.InterruptRaise(n64::MI::Interrupt::PI);
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pi.dmaBusy = false;
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break;
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case PI_BUS_WRITE_COMPLETE:
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