SimoZ64
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b4c5c7a3e4
|
Compiles!
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2025-05-05 22:15:45 +02:00 |
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SimoneN64
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f67f968f91
|
[JIT]: First compiled block! Figure out why scheduling an event from the emitted code makes the underlying queue point to 0x0...
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2025-01-20 22:27:18 +01:00 |
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SimoneN64
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e065558147
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[JIT]: Simplify register accesses, implement more instructions, rework some branching logic
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2025-01-15 00:37:29 +01:00 |
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SimoneN64
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57fd6a9af8
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Minor nitpicks and smaller perf improvements (barely noticeable)
|
2024-10-14 23:25:09 +02:00 |
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SimoneN64
|
521cd7c2e0
|
Leverage new bswap functions to the fullest
|
2024-09-25 22:21:20 +02:00 |
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SimoneN64
|
b3a4a302cb
|
Finally clangformat
|
2024-08-27 21:18:10 +02:00 |
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SimoneN64
|
cdbb251be1
|
Better management of RDRAM accesses
|
2024-07-05 23:50:30 +02:00 |
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SimoneN64
|
40cee365a9
|
Refactor smaller things
|
2024-05-14 21:31:50 +02:00 |
|
Simone
|
02d1f888d8
|
Refactor Parallel RDP wrapper
|
2024-05-14 12:15:27 +02:00 |
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SimoneN64
|
e07f4880e6
|
Refactor Memory
|
2024-05-13 20:55:55 +02:00 |
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SimoneN64
|
f1e81a2dd5
|
Refactor MIPS Interface
|
2024-05-13 20:55:55 +02:00 |
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SimoneN64
|
b70188fdb1
|
fix a bunch of warnings
|
2024-01-03 14:22:06 +01:00 |
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SimoneN64
|
25cfd49e64
|
Use a more modern and clean paradigm for read/write handlers
asdasd
|
2023-11-14 16:34:23 +01:00 |
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SimoneN64
|
2a77c1ab25
|
general clean-up
|
2023-11-07 22:53:56 +01:00 |
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SimoneN64
|
7cceefd7fc
|
Share save data for sram and flash
|
2023-11-07 22:53:09 +01:00 |
|
SimoneN64
|
e75ea2beb7
|
Account different header
|
2023-11-05 19:29:09 +01:00 |
|
SimoneN64
|
4e6a3f2109
|
Improve cartridge regions handling
|
2023-11-05 18:27:01 +01:00 |
|
SimoneN64
|
b1f7659359
|
Experimental save state support
|
2023-10-30 09:37:09 +01:00 |
|
SimoneN64
|
91575fe4df
|
fix some warnings
|
2023-06-12 10:12:55 +02:00 |
|
SimoneN64
|
3bb4f5e31e
|
Support for loading archives
|
2023-06-11 18:27:08 +02:00 |
|
SimoneN64
|
cfc080fe2d
|
Finally use memory mapped file for saves
|
2023-06-10 23:12:35 +02:00 |
|
SimoneN64
|
cbc2ca147a
|
more flash work
|
2023-06-09 17:10:02 +02:00 |
|
SimoneN64
|
7e9cfa1f53
|
Lay down flash support (doesn't work properly yet)
|
2023-06-09 16:06:03 +02:00 |
|
SimoneN64
|
8fb0dd826d
|
more inlined stuff
|
2023-06-06 10:59:25 +02:00 |
|
SimoneN64
|
ecdf7473e2
|
cartinfo is useless
|
2023-06-06 10:58:32 +02:00 |
|
SimoneN64
|
537ab446ba
|
schedule pi dma (now works)
|
2023-06-06 10:12:18 +02:00 |
|
SimoneN64
|
32c66fdf5f
|
fix some warnings and use the damn FORCE_INLINE macro otherwise what's it there for
|
2023-06-05 20:54:34 +02:00 |
|
SimoneN64
|
30fce7ecf7
|
get rid of JIT and other things
|
2023-06-04 22:28:23 +02:00 |
|
CocoSimone
|
27516afaca
|
Update ImGui
|
2023-02-26 03:49:53 +01:00 |
|
CocoSimone
|
030f04df03
|
Rename dynarec to JIT everywhere
|
2023-02-21 02:20:35 +01:00 |
|
CocoSimone
|
f113db7059
|
Use virtual class for different cpu types rather than that hot mess with pointers and shiz
|
2023-02-19 22:14:59 +01:00 |
|
CocoSimone
|
e665f2d6e9
|
move controller logic to PIF
|
2023-02-19 14:54:26 +01:00 |
|
CocoSimone
|
abc14302cc
|
move MapVAddr to Cop0.hpp and no template necessary
|
2023-02-19 12:14:39 +01:00 |
|
CocoSimone
|
55f792d995
|
Optimizations (are they?)
|
2023-02-17 17:16:56 +01:00 |
|
CocoSimone
|
30c6931f09
|
fix buncha things, can't be assed to list
|
2023-02-10 16:16:16 +01:00 |
|
CocoSimone
|
ea5e4895ba
|
Use physical address for indexing into blocks
|
2023-01-13 19:19:51 +01:00 |
|
CocoSimone
|
64630ea06b
|
No more segfault in JIT. Keeps executing the same blocks over and over though...
|
2023-01-04 16:50:33 +01:00 |
|
CocoSimone
|
c915ebc11d
|
Dynarec + CMake restructure
|
2023-01-02 22:07:30 +01:00 |
|
CocoSimone
|
2ea4a88ae8
|
A bit more refactoring
|
2022-12-23 22:52:17 +01:00 |
|
CocoSimone
|
4adb7a46f8
|
Restructure
|
2022-12-22 23:08:37 +01:00 |
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