iris
00cc9309cb
de6e324bdseparate emu thread10d3daf86Roms List improvements95d202f37Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.fc306967fWow the ROM Header was just completely busted. Game list view works nowbad1691eefuck this shit2b59e5f46game list in progressd26417b83remappable inputs in progressac4af8106inpute72abc240update readme430139dc9Qt6 frontend3080d4d45Fix this small bug too08cd13b85Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.61bb4fb44make idle loop detection a little more specific with where the load goesb037de4c3SAZDFsdff12e81e73eneed to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)204f0e13bidle skipping seems to work!cb8bb634asdkfjlasdf58e5c89c1Fix compilation issue on my machine (no idea)24fb2898eattempting more serious idle skipping214719577Place rsp.Step inside cached interpreter. Gains about 3 more fpsbb97dcc23mmmmm920b77d38wjkhasdfjhkasdf430ccdab4it's a start...4f42a673aCached interpreter plays Mario 64. Start looking into RSP as wellc9a030787idle skipping works!5fbda03cenew idea366637abaIdle skipping... maybe?609fa2fb0Cache instructions implemented but broken lmao. Commented out for nowe140a6d12- Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work68e613057prep cache impl811b4d809fix clang formatfda755f7didkd5024ebbfsmall MI refactor in preparation of (eventually) implementing the RDRAM interface properly694b45341Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'206dcdedfSquashed 'external/SDL/' content from commit 4d17b99d0a4d16e1cb4need to update sdl848b19920Fix compilation errordb61b5299Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'e94a94559Squashed 'external/imgui/' content from commit 02e9b8cac52edb3757need to update imguic1a705e86Emulate weird JALR behaviour4b4c32f4bFix exception for "unusable COP1" in 4 instructions i missed accidentally (again)df5828142Bug putting 0s in the log everywheref8b580048Make isviewer a sink to file8241e9735Fix exception for "unusable COP1" in 4 instructions i missed accidentallyb29715f20small changesd9a620bc1make use of my new small utility library0d1aa938eAdd 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'e64eb40b3Fuck git git-subtree-dir: external/ircolib git-subtree-split:de6e324bde
384 lines
12 KiB
C
384 lines
12 KiB
C
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/* Rot127 <unisono@quyllur.org> 2022-2023 */
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/* Automatically translated source file from LLVM. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Only small edits allowed. */
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/* For multiple similar edits, please create a Patch for the translator. */
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/* Capstone's C++ file translator: */
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/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
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//===- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <ctype.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <capstone/platform.h>
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#include "../../MathExtras.h"
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#include "../../MCAsmInfo.h"
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#include "SystemZMapping.h"
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#include "SystemZInstPrinter.h"
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#define CONCAT(a, b) CONCAT_(a, b)
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#define CONCAT_(a, b) a##_##b
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static void printAddress(const MCAsmInfo *MAI, MCRegister Base,
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const MCOperand *DispMO, MCRegister Index, SStream *O);
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static void printMCOperandMAI(const MCOperand *MO, const MCAsmInfo *MAI,
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SStream *O);
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static void printRegName(const MCInst *MI, SStream *O, MCRegister Reg);
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static void printInst(MCInst *MI, uint64_t Address, const char *Annot, SStream *O);
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static void printOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU1ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU2ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU3ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU12ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printU48ImmOperand(MCInst *MI, int OpNum, SStream *O);
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static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O);
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static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O);
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static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O);
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static void printBDRAddrOperand(MCInst *MI, int OpNum, SStream *O);
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static void printBDVAddrOperand(MCInst *MI, int OpNum, SStream *O);
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static void printPCRelOperand(MCInst *MI, uint64_t Address, int OpNum, SStream *O);
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static void printPCRelTLSOperand(MCInst *MI, uint64_t Address, int OpNum, SStream *O);
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// This forms part of the instruction name rather than the operand list.
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// Print the mnemonic for a condition-code mask ("ne", "lh", etc.)
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static void printCond4Operand(MCInst *MI, int OpNum, SStream *O);
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#include "SystemZGenAsmWriter.inc"
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#define DECLARE_printUImmOperand(N) \
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static void CONCAT(printUImmOperand, N)(MCInst * MI, int OpNum, SStream *O);
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DECLARE_printUImmOperand(1);
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DECLARE_printUImmOperand(2);
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DECLARE_printUImmOperand(3);
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DECLARE_printUImmOperand(4);
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DECLARE_printUImmOperand(8);
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DECLARE_printUImmOperand(12);
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DECLARE_printUImmOperand(16);
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DECLARE_printUImmOperand(32);
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DECLARE_printUImmOperand(48);
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#define DECLARE_printSImmOperand(N) \
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static void CONCAT(printSImmOperand, N)(MCInst * MI, int OpNum, SStream *O);
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DECLARE_printSImmOperand(8);
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DECLARE_printSImmOperand(16);
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DECLARE_printSImmOperand(32);
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static void printAddress(const MCAsmInfo *MAI, MCRegister Base,
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const MCOperand *DispMO, MCRegister Index, SStream *O)
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{
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printMCOperandMAI(DispMO, MAI, O);
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if (Base || Index) {
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SStream_concat0(O, "(");
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if (Index) {
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printFormattedRegName(MAI, Index, O);
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SStream_concat0(O, ",");
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}
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if (Base)
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printFormattedRegName(MAI, Base, O);
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else
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SStream_concat0(O, "0");
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SStream_concat0(O, ")");
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}
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}
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static void printMCOperandMAI(const MCOperand *MO, const MCAsmInfo *MAI,
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SStream *O) {
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if (MCOperand_isReg(MO)) {
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if (!MCOperand_getReg(MO))
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SStream_concat1(O, '0');
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else
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printFormattedRegName(MAI, MCOperand_getReg(MO), O);
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}
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else if (MCOperand_isImm(MO))
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printInt64(markup_OS(O, Markup_Immediate), MCOperand_getImm(MO));
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else if (MCOperand_isExpr(MO))
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printExpr(O, MCOperand_getExpr(MO));
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else
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CS_ASSERT(0 && "Invalid operand");
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}
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static void printMCOperand(const MCInst *MI, const MCOperand *MO, SStream *O)
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{
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if (MCOperand_isReg(MO)) {
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if (!MCOperand_getReg(MO))
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SStream_concat0(O, "0");
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else
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printFormattedRegName(&MI->MAI, MCOperand_getReg(MO), O);
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} else if (MCOperand_isImm(MO))
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printInt64(markup_OS(O, Markup_Immediate),
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MCOperand_getImm(MO));
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else if (MCOperand_isExpr(MO))
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printExpr(O, MCOperand_getExpr(MO)); \
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else
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CS_ASSERT_RET(0 && "Invalid operand");
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}
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void printFormattedRegName(const MCAsmInfo *MAI, MCRegister Reg, SStream *O)
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{
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const char *RegName = getRegisterName(Reg);
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if (MAI->assemblerDialect == SYSTEMZASMDIALECT_AD_ATT) {
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// Skip register prefix so that only register number is left
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CS_ASSERT((isalpha(RegName[0]) && isdigit(RegName[1])));
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SStream_concat0(markup_OS(O, Markup_Register), (RegName + 1));
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} else
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SStream_concat1(markup_OS(O, Markup_Register), '%');
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SStream_concat0(markup_OS(O, Markup_Register), RegName);
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}
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static void printRegName(const MCInst *MI, SStream *O, MCRegister Reg)
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{
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printFormattedRegName(&MI->MAI, Reg, O);
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}
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static void printInst(MCInst *MI, uint64_t Address, const char *Annot, SStream *O)
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{
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printInstruction(MI, Address, O);
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}
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#define DEFINE_printUImmOperand(N) \
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void CONCAT(printUImmOperand, N)(MCInst * MI, int OpNum, SStream *O) \
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{ \
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MCOperand *MO = MCInst_getOperand(MI, (OpNum)); \
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if (MCOperand_isExpr(MO)) { \
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printExpr(O, MCOperand_getExpr(MO)); \
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return; \
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} \
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uint64_t Value = (uint64_t)(MCOperand_getImm(MO)); \
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CS_ASSERT((isUIntN(N, Value) && "Invalid uimm argument")); \
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printUInt64(markup_OS(O, Markup_Immediate), Value); \
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}
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DEFINE_printUImmOperand(1);
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DEFINE_printUImmOperand(2);
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DEFINE_printUImmOperand(3);
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DEFINE_printUImmOperand(4);
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DEFINE_printUImmOperand(8);
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DEFINE_printUImmOperand(12);
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DEFINE_printUImmOperand(16);
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DEFINE_printUImmOperand(32);
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DEFINE_printUImmOperand(48);
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#define DEFINE_printSImmOperand(N) \
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void CONCAT(printSImmOperand, N)(MCInst * MI, int OpNum, SStream *O) \
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{ \
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MCOperand *MO = MCInst_getOperand(MI, (OpNum)); \
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if (MCOperand_isExpr(MO)) { \
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printExpr(O, MCOperand_getExpr(MO)); \
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return; \
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} \
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int64_t Value = \
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MCOperand_getImm(MCInst_getOperand(MI, (OpNum))); \
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if (N == 8) \
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printInt8(markup_OS(O, Markup_Immediate), Value); \
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else if (N == 16) \
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printInt16(markup_OS(O, Markup_Immediate), Value); \
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else if (N == 32) \
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printInt32(markup_OS(O, Markup_Immediate), Value); \
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else \
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CS_ASSERT(0 && "Unreachable"); \
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}
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DEFINE_printSImmOperand(8);
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DEFINE_printSImmOperand(16);
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DEFINE_printSImmOperand(32);
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static void printU1ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U1ImmOperand, OpNum);
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CONCAT(printUImmOperand, 1)(MI, OpNum, O);
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}
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static void printU2ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U2ImmOperand, OpNum);
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CONCAT(printUImmOperand, 2)(MI, OpNum, O);
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}
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static void printU3ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U3ImmOperand, OpNum);
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CONCAT(printUImmOperand, 3)(MI, OpNum, O);
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}
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static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U4ImmOperand, OpNum);
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CONCAT(printUImmOperand, 4)(MI, OpNum, O);
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}
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static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_S8ImmOperand, OpNum);
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CONCAT(printSImmOperand, 8)(MI, OpNum, O);
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}
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static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U8ImmOperand, OpNum);
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CONCAT(printUImmOperand, 8)(MI, OpNum, O);
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}
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static void printU12ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U12ImmOperand, OpNum);
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CONCAT(printUImmOperand, 12)(MI, OpNum, O);
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}
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static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_S16ImmOperand, OpNum);
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CONCAT(printSImmOperand, 16)(MI, OpNum, O);
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}
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static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U16ImmOperand, OpNum);
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CONCAT(printUImmOperand, 16)(MI, OpNum, O);
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}
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static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_S32ImmOperand, OpNum);
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CONCAT(printSImmOperand, 32)(MI, OpNum, O);
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}
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static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U32ImmOperand, OpNum);
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CONCAT(printUImmOperand, 32)(MI, OpNum, O);
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}
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static void printU48ImmOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_U48ImmOperand, OpNum);
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CONCAT(printUImmOperand, 48)(MI, OpNum, O);
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}
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static void printPCRelOperand(MCInst *MI, uint64_t Address, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_PCRelOperand, OpNum);
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MCOperand *MO = MCInst_getOperand(MI, (OpNum));
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if (MCOperand_isImm(MO)) {
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printInt64(O, MCOperand_getImm(MO));
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} else
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printExpr(O, MCOperand_getExpr(MO));
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}
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static void printPCRelTLSOperand(MCInst *MI, uint64_t Address, int OpNum, SStream *O)
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{
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// Output the PC-relative operand.
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printPCRelOperand(MI, MI->address, OpNum, O);
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// Output the TLS marker if present.
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if ((unsigned)OpNum + 1 < MCInst_getNumOperands(MI)) {
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// Expressions not supported
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}
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}
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static void printOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_Operand, OpNum);
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printMCOperand(MI, MCInst_getOperand(MI, (OpNum)), O);
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}
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static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_BDAddrOperand, OpNum);
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printAddress(&MI->MAI, MCOperand_getReg(MCInst_getOperand(MI, (OpNum))),
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MCInst_getOperand(MI, (OpNum + 1)), 0, O);
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}
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static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_BDXAddrOperand, OpNum);
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printAddress(&MI->MAI, MCOperand_getReg(MCInst_getOperand(MI, (OpNum))),
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MCInst_getOperand(MI, (OpNum + 1)),
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MCOperand_getReg(MCInst_getOperand(MI, (OpNum + 2))), O);
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}
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static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_BDLAddrOperand, OpNum);
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unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, (OpNum)));
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MCOperand *DispMO = MCInst_getOperand(MI, (OpNum + 1));
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uint64_t Length = MCOperand_getImm(MCInst_getOperand(MI, (OpNum + 2)));
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printMCOperandMAI(DispMO, &MI->MAI, O);
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SStream_concat1(O, '(');
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printUInt64(O, Length);
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if (Base) {
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SStream_concat0(O, ",");
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printRegName(MI, O, Base);
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}
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SStream_concat0(O, ")");
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}
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static void printBDRAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_BDRAddrOperand, OpNum);
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unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, (OpNum)));
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MCOperand *DispMO = MCInst_getOperand(MI, (OpNum + 1));
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unsigned Length = MCOperand_getReg(MCInst_getOperand(MI, (OpNum + 2)));
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printMCOperandMAI(DispMO, &MI->MAI, O);
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SStream_concat0(O, "(");
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printRegName(MI, O, Length);
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if (Base) {
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SStream_concat0(O, ",");
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printRegName(MI, O, Base);
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}
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SStream_concat0(O, ")");
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}
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static void printBDVAddrOperand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_BDVAddrOperand, OpNum);
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printAddress(&MI->MAI, MCOperand_getReg(MCInst_getOperand(MI, (OpNum))),
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MCInst_getOperand(MI, (OpNum + 1)),
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MCOperand_getReg(MCInst_getOperand(MI, (OpNum + 2))), O);
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}
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static void printCond4Operand(MCInst *MI, int OpNum, SStream *O)
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{
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add_cs_detail(MI, SystemZ_OP_GROUP_Cond4Operand, OpNum);
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static const char *const CondNames[] = { "o", "h", "nle", "l",
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"nhe", "lh", "ne", "e",
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"nlh", "he", "nl", "le",
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"nh", "no" };
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uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, (OpNum)));
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CS_ASSERT((Imm > 0 && Imm < 15 && "Invalid condition"));
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SStream_concat0(O, CondNames[Imm - 1]);
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}
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|
|
|
const char *SystemZ_LLVM_getRegisterName(unsigned RegNo)
|
|
{
|
|
return getRegisterName(RegNo);
|
|
}
|
|
|
|
void SystemZ_LLVM_printInstruction(MCInst *MI, const char *Annotation, SStream *O)
|
|
{
|
|
printInst(MI, MI->address, Annotation, O);
|
|
}
|