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Squashed 'external/ircolib/' changes from ce3cd726c..de6e324bd

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de6e324bd separate emu thread
10d3daf86 Roms List improvements
95d202f37 Let's make the rom list process on a separate thread so the emulator doesnt take ages to load.
fc306967f Wow the ROM Header was just completely busted. Game list view works now
bad1691ee fuck this shit
2b59e5f46 game list in progress
d26417b83 remappable inputs in progress
ac4af8106 input
e72abc240 update readme
430139dc9 Qt6 frontend
3080d4d45 Fix this small bug too
08cd13b85 Cop0 unused functions do not actually pose a threat (as per manual). They don't do anything, so shall we.
61bb4fb44 make idle loop detection a little more specific with where the load goes
b037de4c3 SAZDFsdff
12e81e73e need to figure out why n64-systemtest loops indefinitely at some address that appears to be valid (i think it's me not invalidating the cache properly)
204f0e13b idle skipping seems to work!
cb8bb634a sdkfjlasdf
58e5c89c1 Fix compilation issue on my machine (no idea)
24fb2898e attempting more serious idle skipping
214719577 Place rsp.Step inside cached interpreter. Gains about 3 more fps
bb97dcc23 mmmmm
920b77d38 wjkhasdfjhkasdf
430ccdab4 it's a start...
4f42a673a Cached interpreter plays Mario 64. Start looking into RSP as well
c9a030787 idle skipping works!
5fbda03ce new idea
366637aba Idle skipping... maybe?
609fa2fb0 Cache instructions implemented but broken lmao. Commented out for now
e140a6d12 - Stop using inheritance for CPU, instead use composition. - Introduce KAIZEN_JIT_ENABLED optional define instead of relying on __aarch64__ and the like. - More cache work
68e613057 prep cache impl
811b4d809 fix clang format
fda755f7d idk
d5024ebbf small MI refactor in preparation of (eventually) implementing the RDRAM interface properly
694b45341 Merge commit '206dcdedf195fb320913584180edb12c7731e396' as 'external/SDL'
206dcdedf Squashed 'external/SDL/' content from commit 4d17b99d0a
4d16e1cb4 need to update sdl
848b19920 Fix compilation error
db61b5299 Merge commit 'e94a94559f28e49678fbcf72199a5258137b0fe9' as 'external/imgui'
e94a94559 Squashed 'external/imgui/' content from commit 02e9b8cac
52edb3757 need to update imgui
c1a705e86 Emulate weird JALR behaviour
4b4c32f4b Fix exception for "unusable COP1" in 4 instructions i missed accidentally (again)
df5828142 Bug putting 0s in the log everywhere
f8b580048 Make isviewer a sink to file
8241e9735 Fix exception for "unusable COP1" in 4 instructions i missed accidentally
b29715f20 small changes
d9a620bc1 make use of my new small utility library
0d1aa938e Add 'external/ircolib/' from commit 'ce3cd726c8df8388d554abf8bb55d55020eb4450'
e64eb40b3 Fuck git

git-subtree-dir: external/ircolib
git-subtree-split: de6e324bde
This commit is contained in:
iris
2026-06-15 11:56:38 +02:00
parent ce3cd726c8
commit 00cc9309cb
4479 changed files with 2943227 additions and 7 deletions
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external/capstone/bindings/ocaml/Makefile
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# Capstone Disassembler Engine
# By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015
LIB = capstone
FLAGS = '-Wall -Wextra -Wwrite-strings'
PYTHON2 ?= python
all: arm_const.cmxa arm64_const.cmxa m680x_const.cmxa mips_const.cmxa ppc_const.cmxa sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa m680x.cmxa mips.cmxa ppc.cmxa x86.cmxa sparc.cmxa systemz.cmxa xcore.cmxa capstone.cmxa test_basic.cmx test_detail.cmx test_x86.cmx test_arm.cmx test_aarch64.cmx test_mips.cmx test_ppc.cmx test_sparc.cmx test_systemz.cmx test_xcore.cmx test_m680x.cmx ocaml.o
ocamlopt -o test_basic -ccopt $(FLAGS) ocaml.o capstone.cmx test_basic.cmx -cclib -l$(LIB)
ocamlopt -o test_detail -ccopt $(FLAGS) capstone.cmx ocaml.o test_detail.cmx -cclib -l$(LIB)
ocamlopt -o test_x86 -ccopt $(FLAGS) capstone.cmx ocaml.o x86.cmx x86_const.cmx test_x86.cmx -cclib -l$(LIB)
ocamlopt -o test_arm -ccopt $(FLAGS) capstone.cmx ocaml.o arm.cmx arm_const.cmx test_arm.cmx -cclib -l$(LIB)
ocamlopt -o test_aarch64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_aarch64.cmx -cclib -l$(LIB)
ocamlopt -o test_mips -ccopt $(FLAGS) capstone.cmx ocaml.o mips.cmx mips_const.cmx test_mips.cmx -cclib -l$(LIB)
ocamlopt -o test_ppc -ccopt $(FLAGS) capstone.cmx ocaml.o ppc.cmx ppc_const.cmx test_ppc.cmx -cclib -l$(LIB)
ocamlopt -o test_sparc -ccopt $(FLAGS) capstone.cmx ocaml.o sparc.cmx sparc_const.cmx test_sparc.cmx -cclib -l$(LIB)
ocamlopt -o test_systemz -ccopt $(FLAGS) capstone.cmx ocaml.o systemz.cmx sysz_const.cmx test_systemz.cmx -cclib -l$(LIB)
ocamlopt -o test_xcore -ccopt $(FLAGS) capstone.cmx ocaml.o xcore.cmx xcore_const.cmx test_xcore.cmx -cclib -l$(LIB)
ocamlopt -o test_m680x -ccopt $(FLAGS) capstone.cmx ocaml.o m680x.cmx m680x_const.cmx test_m680x.cmx -cclib -l$(LIB)
test_basic.cmx: test_basic.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_detail.cmx: test_detail.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_x86.cmx: test_x86.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_arm.cmx: test_arm.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_aarch64.cmx: test_aarch64.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_mips.cmx: test_mips.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_ppc.cmx: test_ppc.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_sparc.cmx: test_sparc.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_systemz.cmx: test_systemz.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_xcore.cmx: test_xcore.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
test_m680x.cmx: test_m680x.ml
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
ocaml.o: ocaml.c
ocamlc -ccopt $(FLAGS) -c $<
capstone.mli: capstone.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
capstone.cmi: capstone.mli
ocamlc -ccopt $(FLAGS) -c $<
capstone.cmx: capstone.ml capstone.cmi
ocamlopt -ccopt $(FLAGS) -c $< -cclib -l$(LIB)
capstone.cmxa: capstone.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $< -cclib -lsb_ocaml -cclib -l$(LIB)
x86.mli: x86.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
x86.cmi: x86.mli
ocamlc -ccopt $(FLAGS) -c $<
x86.cmx: x86.ml x86.cmi
ocamlopt -ccopt $(FLAGS) -c $<
x86.cmxa: x86.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
x86_const.mli: x86_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
x86_const.cmi: x86_const.mli
ocamlc -ccopt $(FLAGS) -c $<
x86_const.cmx: x86_const.ml x86_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
x86_const.cmxa: x86_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm.mli: arm.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm.cmi: arm.mli
ocamlc -ccopt $(FLAGS) -c $<
arm.cmx: arm.ml arm.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm.cmxa: arm.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm_const.mli: arm_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm_const.cmi: arm_const.mli
ocamlc -ccopt $(FLAGS) -c $<
arm_const.cmx: arm_const.ml arm_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm_const.cmxa: arm_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm64.mli: arm64.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm64.cmi: arm64.mli
ocamlc -ccopt $(FLAGS) -c $<
arm64.cmx: arm64.ml arm64.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm64.cmxa: arm64.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
arm64_const.mli: arm64_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
arm64_const.cmi: arm64_const.mli
ocamlc -ccopt $(FLAGS) -c $<
arm64_const.cmx: arm64_const.ml arm64_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
arm64_const.cmxa: arm64_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
m680x.mli: m680x.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
m680x.cmi: m680x.mli
ocamlc -ccopt $(FLAGS) -c $<
m680x.cmx: m680x.ml m680x.cmi
ocamlopt -ccopt $(FLAGS) -c $<
m680x.cmxa: m680x.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
m680x_const.mli: m680x_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
m680x_const.cmi: m680x_const.mli
ocamlc -ccopt $(FLAGS) -c $<
m680x_const.cmx: m680x_const.ml m680x_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
m680x_const.cmxa: m680x_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
mips.mli: mips.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
mips.cmi: mips.mli
ocamlc -ccopt $(FLAGS) -c $<
mips.cmx: mips.ml mips.cmi
ocamlopt -ccopt $(FLAGS) -c $<
mips.cmxa: mips.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
mips_const.mli: mips_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
mips_const.cmi: mips_const.mli
ocamlc -ccopt $(FLAGS) -c $<
mips_const.cmx: mips_const.ml mips_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
mips_const.cmxa: mips_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
ppc.mli: ppc.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
ppc.cmi: ppc.mli
ocamlc -ccopt $(FLAGS) -c $<
ppc.cmx: ppc.ml ppc.cmi
ocamlopt -ccopt $(FLAGS) -c $<
ppc.cmxa: ppc.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
ppc_const.mli: ppc_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
ppc_const.cmi: ppc_const.mli
ocamlc -ccopt $(FLAGS) -c $<
ppc_const.cmx: ppc_const.ml ppc_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
ppc_const.cmxa: ppc_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sparc.mli: sparc.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sparc.cmi: sparc.mli
ocamlc -ccopt $(FLAGS) -c $<
sparc.cmx: sparc.ml sparc.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sparc.cmxa: sparc.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sparc_const.mli: sparc_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sparc_const.cmi: sparc_const.mli
ocamlc -ccopt $(FLAGS) -c $<
sparc_const.cmx: sparc_const.ml sparc_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sparc_const.cmxa: sparc_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
systemz.mli: systemz.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
systemz.cmi: systemz.mli
ocamlc -ccopt $(FLAGS) -c $<
systemz.cmx: systemz.ml systemz.cmi
ocamlopt -ccopt $(FLAGS) -c $<
systemz.cmxa: systemz.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
sysz_const.mli: sysz_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
sysz_const.cmi: sysz_const.mli
ocamlc -ccopt $(FLAGS) -c $<
sysz_const.cmx: sysz_const.ml sysz_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
sysz_const.cmxa: sysz_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
xcore.mli: xcore.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
xcore.cmi: xcore.mli
ocamlc -ccopt $(FLAGS) -c $<
xcore.cmx: xcore.ml xcore.cmi
ocamlopt -ccopt $(FLAGS) -c $<
xcore.cmxa: xcore.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
xcore_const.mli: xcore_const.ml
ocamlc -ccopt $(FLAGS) -i $< > $@
xcore_const.cmi: xcore_const.mli
ocamlc -ccopt $(FLAGS) -c $<
xcore_const.cmx: xcore_const.ml xcore_const.cmi
ocamlopt -ccopt $(FLAGS) -c $<
xcore_const.cmxa: xcore_const.cmx
ocamlopt -ccopt $(FLAGS) -a -o $@ $<
clean:
rm -f *.[oa] *.so *.cm[ixoa] *.cmxa *.mli test_basic test_detail test_x86 test_arm test_aarch64 test_mips test_ppc test_sparc test_systemz test_xcore test_m680x
gen_const:
cd .. && $(PYTHON2) const_generator.py ocaml
TESTS = test_basic test_detail test_arm test_aarch64 test_m680x test_mips test_ppc
TESTS += test_sparc test_systemz test_x86 test_xcore
check:
@for t in $(TESTS); do \
echo Check $$t ... ; \
./$$t > /dev/null && echo OK || echo FAILED; \
done
external/capstone/bindings/ocaml/README
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To compile Ocaml binding, Ocaml toolchain is needed. On Ubuntu Linux,
you can install Ocaml with:
$ sudo apt-get install ocaml-nox
To compile Ocaml binding, simply run "make" on the command line.
This directory also contains some test code to show how to use Capstone API.
- test_basic.ml
This code shows the most simple form of API where we only want to get basic
information out of disassembled instruction, such as address, mnemonic and
operand string.
- test_detail.ml:
This code shows how to access to architecture-neutral information in disassembled
instructions, such as implicit registers read/written, or groups of instructions
that this instruction belong to.
- test_<arch>.ml
These code show how to access architecture-specific information for each
architecture.
external/capstone/bindings/ocaml/arm.ml
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm_const
let _CS_OP_ARCH = 5;;
let _CS_OP_CIMM = _CS_OP_ARCH (* C-Immediate *)
let _CS_OP_PIMM = _CS_OP_ARCH + 1 (* P-Immediate *)
(* architecture specific info of instruction *)
type arm_op_shift = {
shift_type: int; (* TODO: covert this to pattern like arm_op_value? *)
shift_value: int;
}
type arm_op_mem = {
base: int;
index: int;
scale: int;
disp: int;
lshift: int;
}
type arm_op_value =
| ARM_OP_INVALID of int
| ARM_OP_REG of int
| ARM_OP_CIMM of int
| ARM_OP_PIMM of int
| ARM_OP_IMM of int
| ARM_OP_FP of float
| ARM_OP_MEM of arm_op_mem
| ARM_OP_SETEND of int
type arm_op = {
vector_index: int;
shift: arm_op_shift;
value: arm_op_value;
subtracted: bool;
access: int;
neon_lane: int;
}
type cs_arm = {
usermode: bool;
vector_size: int;
vector_data: int;
cps_mode: int;
cps_flag: int;
cc: int;
update_flags: bool;
writeback: bool;
mem_barrier: int;
operands: arm_op array;
}
external/capstone/bindings/ocaml/arm64.ml
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm64_const
(* architecture specific info of instruction *)
type arm64_op_shift = {
shift_type: int;
shift_value: int;
}
type arm64_op_mem = {
base: int;
index: int;
disp: int
}
type arm64_op_value =
| ARM64_OP_INVALID of int
| ARM64_OP_REG of int
| ARM64_OP_CIMM of int
| ARM64_OP_IMM of int
| ARM64_OP_FP of float
| ARM64_OP_MEM of arm64_op_mem
| ARM64_OP_REG_MRS of int
| ARM64_OP_REG_MSR of int
| ARM64_OP_PSTATE of int
| ARM64_OP_SYS of int
| ARM64_OP_PREFETCH of int
| ARM64_OP_BARRIER of int
type arm64_op = {
vector_index: int;
vas: int;
shift: arm64_op_shift;
ext: int;
value: arm64_op_value;
}
type cs_arm64 = {
cc: int;
update_flags: bool;
writeback: bool;
operands: arm64_op array;
}
external/capstone/bindings/ocaml/arm64_const.ml
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external/capstone/bindings/ocaml/arm_const.ml
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external/capstone/bindings/ocaml/capstone.ml
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Arm
open Arm64
open Mips
open Ppc
open X86
open Sparc
open Systemz
open Xcore
open M680x
open Printf (* debug *)
(* Hardware architectures *)
type arch =
| CS_ARCH_ARM
| CS_ARCH_ARM64
| CS_ARCH_MIPS
| CS_ARCH_X86
| CS_ARCH_PPC
| CS_ARCH_SPARC
| CS_ARCH_SYSZ
| CS_ARCH_XCORE
| CS_ARCH_M68K
| CS_ARCH_TMS320C64X
| CS_ARCH_M680X
(* Hardware modes *)
type mode =
| CS_MODE_LITTLE_ENDIAN (* little-endian mode (default mode) *)
| CS_MODE_ARM (* ARM mode *)
| CS_MODE_16 (* 16-bit mode (for X86) *)
| CS_MODE_32 (* 32-bit mode (for X86) *)
| CS_MODE_64 (* 64-bit mode (for X86, PPC) *)
| CS_MODE_THUMB (* ARM's Thumb mode, including Thumb-2 *)
| CS_MODE_MCLASS (* ARM's MClass mode *)
| CS_MODE_V8 (* ARMv8 A32 encodings for ARM *)
| CS_MODE_MICRO (* MicroMips mode (MIPS architecture) *)
| CS_MODE_MIPS3 (* Mips3 mode (MIPS architecture) *)
| CS_MODE_MIPS32R6 (* Mips32-R6 mode (MIPS architecture) *)
| CS_MODE_MIPS2 (* Mips2 mode (MIPS architecture) *)
| CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *)
| CS_MODE_BIG_ENDIAN (* big-endian mode *)
| CS_MODE_MIPS32 (* Mips32 mode (for Mips) *)
| CS_MODE_MIPS64 (* Mips64 mode (for Mips) *)
| CS_MODE_QPX (* Quad Processing eXtensions mode (PowerPC) *)
| CS_MODE_SPE (* Signal Processing Engine mode (PowerPC) *)
| CS_MODE_BOOKE (* Book-E mode (PowerPC) *)
| CS_MODE_PS (* Paired-singles mode (PowerPC) *)
| CS_MODE_M680X_6301 (* M680X Hitachi 6301,6303 mode *)
| CS_MODE_M680X_6309 (* M680X Hitachi 6309 mode *)
| CS_MODE_M680X_6800 (* M680X Motorola 6800,6802 mode *)
| CS_MODE_M680X_6801 (* M680X Motorola 6801,6803 mode *)
| CS_MODE_M680X_6805 (* M680X Motorola 6805 mode *)
| CS_MODE_M680X_6808 (* M680X Motorola 6808 mode *)
| CS_MODE_M680X_6809 (* M680X Motorola 6809 mode *)
| CS_MODE_M680X_6811 (* M680X Motorola/Freescale 68HC11 mode *)
| CS_MODE_M680X_CPU12 (* M680X Motorola/Freescale/NXP CPU12 mode *)
| CS_MODE_M680X_HCS08 (* M680X Freescale HCS08 mode *)
(* Runtime option for the disassembled engine *)
type opt_type =
| CS_OPT_SYNTAX (* Assembly output syntax *)
| CS_OPT_DETAIL (* Break down instruction structure into details *)
| CS_OPT_MODE (* Change engine's mode at run-time *)
| CS_OPT_MEM (* User-defined dynamic memory related functions *)
| CS_OPT_SKIPDATA (* Skip data when disassembling. Then engine is in SKIPDATA mode. *)
| CS_OPT_SKIPDATA_SETUP (* Setup user-defined function for SKIPDATA option *)
(* Common instruction operand access types - to be consistent across all architectures. *)
(* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *)
let _CS_AC_INVALID = 0;; (* Uninitialized/invalid access type. *)
let _CS_AC_READ = 1 lsl 0;; (* Operand read from memory or register. *)
let _CS_AC_WRITE = 1 lsl 1;; (* Operand write to memory or register. *)
(* Runtime option value (associated with option type above) *)
let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
let _CS_OPT_ON = 3L;; (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *)
(* Common instruction operand types - to be consistent across all architectures. *)
let _CS_OP_INVALID = 0;; (* uninitialized/invalid operand. *)
let _CS_OP_REG = 1;; (* Register operand. *)
let _CS_OP_IMM = 2;; (* Immediate operand. *)
let _CS_OP_MEM = 3;; (* Memory operand. *)
let _CS_OP_FP = 4;; (* Floating-Point operand. *)
(* Common instruction groups - to be consistent across all architectures. *)
let _CS_GRP_INVALID = 0;; (* uninitialized/invalid group. *)
let _CS_GRP_JUMP = 1;; (* all jump instructions (conditional+direct+indirect jumps) *)
let _CS_GRP_CALL = 2;; (* all call instructions *)
let _CS_GRP_RET = 3;; (* all return instructions *)
let _CS_GRP_INT = 4;; (* all interrupt instructions (int+syscall) *)
let _CS_GRP_IRET = 5;; (* all interrupt return instructions *)
let _CS_GRP_PRIVILEGE = 6;; (* all privileged instructions *)
type cs_arch =
| CS_INFO_ARM of cs_arm
| CS_INFO_ARM64 of cs_arm64
| CS_INFO_MIPS of cs_mips
| CS_INFO_X86 of cs_x86
| CS_INFO_PPC of cs_ppc
| CS_INFO_SPARC of cs_sparc
| CS_INFO_SYSZ of cs_sysz
| CS_INFO_XCORE of cs_xcore
| CS_INFO_M680X of cs_m680x
type csh = {
h: Int64.t;
a: arch;
}
type cs_insn0 = {
id: int;
address: int;
size: int;
bytes: int array;
mnemonic: string;
op_str: string;
regs_read: int array;
regs_write: int array;
groups: int array;
arch: cs_arch;
}
external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open"
external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm"
external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal"
external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
external cs_version: unit -> int = "ocaml_version"
external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option"
external _cs_close: Int64.t -> int = "ocaml_close"
let cs_open _arch _mode: csh = (
let _handle = _cs_open _arch _mode in (
match _handle with
| None -> { h = 0L; a = _arch }
| Some v -> { h = v; a = _arch }
);
);;
let cs_close handle = (
_cs_close handle.h;
)
let cs_option handle opt value = (
_cs_option handle.h opt value;
);;
let cs_disasm handle code address count = (
_cs_disasm_internal handle.a handle.h code address count;
);;
let cs_reg_name handle id = (
_cs_reg_name handle.h id;
);;
let cs_insn_name handle id = (
_cs_insn_name handle.h id;
);;
let cs_group_name handle id = (
_cs_group_name handle.h id;
);;
class cs_insn c a =
let csh = c in
let (id, address, size, bytes, mnemonic, op_str, regs_read,
regs_write, groups, arch) =
(a.id, a.address, a.size, a.bytes, a.mnemonic, a.op_str,
a.regs_read, a.regs_write, a.groups, a.arch) in
object
method id = id;
method address = address;
method size = size;
method bytes = bytes;
method mnemonic = mnemonic;
method op_str = op_str;
method regs_read = regs_read;
method regs_write = regs_write;
method groups = groups;
method arch = arch;
method reg_name id = _cs_reg_name csh.h id;
method insn_name id = _cs_insn_name csh.h id;
method group_name id = _cs_group_name csh.h id;
end;;
let cs_insn_group handle insn group_id =
List.exists (fun g -> g == group_id) (Array.to_list insn.groups);;
let cs_reg_read handle insn reg_id =
List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_read);;
let cs_reg_write handle insn reg_id =
List.exists (fun g -> g == reg_id) (Array.to_list insn.regs_write);;
class cs a m =
let mode = m and arch = a in
let handle = cs_open arch mode in
object
method disasm code offset count =
let insns = (_cs_disasm_internal arch handle.h code offset count) in
List.map (fun x -> new cs_insn handle x) insns;
end;;
external/capstone/bindings/ocaml/evm_const.ml
Vendored
+163
View File
@@ -0,0 +1,163 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.ml] *)
let _EVM_INS_STOP = 0;;
let _EVM_INS_ADD = 1;;
let _EVM_INS_MUL = 2;;
let _EVM_INS_SUB = 3;;
let _EVM_INS_DIV = 4;;
let _EVM_INS_SDIV = 5;;
let _EVM_INS_MOD = 6;;
let _EVM_INS_SMOD = 7;;
let _EVM_INS_ADDMOD = 8;;
let _EVM_INS_MULMOD = 9;;
let _EVM_INS_EXP = 10;;
let _EVM_INS_SIGNEXTEND = 11;;
let _EVM_INS_LT = 16;;
let _EVM_INS_GT = 17;;
let _EVM_INS_SLT = 18;;
let _EVM_INS_SGT = 19;;
let _EVM_INS_EQ = 20;;
let _EVM_INS_ISZERO = 21;;
let _EVM_INS_AND = 22;;
let _EVM_INS_OR = 23;;
let _EVM_INS_XOR = 24;;
let _EVM_INS_NOT = 25;;
let _EVM_INS_BYTE = 26;;
let _EVM_INS_SHL = 27;;
let _EVM_INS_SHR = 28;;
let _EVM_INS_SAR = 29;;
let _EVM_INS_SHA3 = 32;;
let _EVM_INS_ADDRESS = 48;;
let _EVM_INS_BALANCE = 49;;
let _EVM_INS_ORIGIN = 50;;
let _EVM_INS_CALLER = 51;;
let _EVM_INS_CALLVALUE = 52;;
let _EVM_INS_CALLDATALOAD = 53;;
let _EVM_INS_CALLDATASIZE = 54;;
let _EVM_INS_CALLDATACOPY = 55;;
let _EVM_INS_CODESIZE = 56;;
let _EVM_INS_CODECOPY = 57;;
let _EVM_INS_GASPRICE = 58;;
let _EVM_INS_EXTCODESIZE = 59;;
let _EVM_INS_EXTCODECOPY = 60;;
let _EVM_INS_RETURNDATASIZE = 61;;
let _EVM_INS_RETURNDATACOPY = 62;;
let _EVM_INS_BLOCKHASH = 64;;
let _EVM_INS_COINBASE = 65;;
let _EVM_INS_TIMESTAMP = 66;;
let _EVM_INS_NUMBER = 67;;
let _EVM_INS_DIFFICULTY = 68;;
let _EVM_INS_GASLIMIT = 69;;
let _EVM_INS_CHAINID = 70;;
let _EVM_INS_SELFBALANCE = 71;;
let _EVM_INS_BASEFEE = 72;;
let _EVM_INS_BLOBHASH = 73;;
let _EVM_INS_BLOBBASEFEE = 74;;
let _EVM_INS_POP = 80;;
let _EVM_INS_MLOAD = 81;;
let _EVM_INS_MSTORE = 82;;
let _EVM_INS_MSTORE8 = 83;;
let _EVM_INS_SLOAD = 84;;
let _EVM_INS_SSTORE = 85;;
let _EVM_INS_JUMP = 86;;
let _EVM_INS_JUMPI = 87;;
let _EVM_INS_PC = 88;;
let _EVM_INS_MSIZE = 89;;
let _EVM_INS_GAS = 90;;
let _EVM_INS_JUMPDEST = 91;;
let _EVM_INS_TLOAD = 92;;
let _EVM_INS_TSTORE = 93;;
let _EVM_INS_MCOPY = 94;;
let _EVM_INS_PUSH0 = 95;;
let _EVM_INS_PUSH1 = 96;;
let _EVM_INS_PUSH2 = 97;;
let _EVM_INS_PUSH3 = 98;;
let _EVM_INS_PUSH4 = 99;;
let _EVM_INS_PUSH5 = 100;;
let _EVM_INS_PUSH6 = 101;;
let _EVM_INS_PUSH7 = 102;;
let _EVM_INS_PUSH8 = 103;;
let _EVM_INS_PUSH9 = 104;;
let _EVM_INS_PUSH10 = 105;;
let _EVM_INS_PUSH11 = 106;;
let _EVM_INS_PUSH12 = 107;;
let _EVM_INS_PUSH13 = 108;;
let _EVM_INS_PUSH14 = 109;;
let _EVM_INS_PUSH15 = 110;;
let _EVM_INS_PUSH16 = 111;;
let _EVM_INS_PUSH17 = 112;;
let _EVM_INS_PUSH18 = 113;;
let _EVM_INS_PUSH19 = 114;;
let _EVM_INS_PUSH20 = 115;;
let _EVM_INS_PUSH21 = 116;;
let _EVM_INS_PUSH22 = 117;;
let _EVM_INS_PUSH23 = 118;;
let _EVM_INS_PUSH24 = 119;;
let _EVM_INS_PUSH25 = 120;;
let _EVM_INS_PUSH26 = 121;;
let _EVM_INS_PUSH27 = 122;;
let _EVM_INS_PUSH28 = 123;;
let _EVM_INS_PUSH29 = 124;;
let _EVM_INS_PUSH30 = 125;;
let _EVM_INS_PUSH31 = 126;;
let _EVM_INS_PUSH32 = 127;;
let _EVM_INS_DUP1 = 128;;
let _EVM_INS_DUP2 = 129;;
let _EVM_INS_DUP3 = 130;;
let _EVM_INS_DUP4 = 131;;
let _EVM_INS_DUP5 = 132;;
let _EVM_INS_DUP6 = 133;;
let _EVM_INS_DUP7 = 134;;
let _EVM_INS_DUP8 = 135;;
let _EVM_INS_DUP9 = 136;;
let _EVM_INS_DUP10 = 137;;
let _EVM_INS_DUP11 = 138;;
let _EVM_INS_DUP12 = 139;;
let _EVM_INS_DUP13 = 140;;
let _EVM_INS_DUP14 = 141;;
let _EVM_INS_DUP15 = 142;;
let _EVM_INS_DUP16 = 143;;
let _EVM_INS_SWAP1 = 144;;
let _EVM_INS_SWAP2 = 145;;
let _EVM_INS_SWAP3 = 146;;
let _EVM_INS_SWAP4 = 147;;
let _EVM_INS_SWAP5 = 148;;
let _EVM_INS_SWAP6 = 149;;
let _EVM_INS_SWAP7 = 150;;
let _EVM_INS_SWAP8 = 151;;
let _EVM_INS_SWAP9 = 152;;
let _EVM_INS_SWAP10 = 153;;
let _EVM_INS_SWAP11 = 154;;
let _EVM_INS_SWAP12 = 155;;
let _EVM_INS_SWAP13 = 156;;
let _EVM_INS_SWAP14 = 157;;
let _EVM_INS_SWAP15 = 158;;
let _EVM_INS_SWAP16 = 159;;
let _EVM_INS_LOG0 = 160;;
let _EVM_INS_LOG1 = 161;;
let _EVM_INS_LOG2 = 162;;
let _EVM_INS_LOG3 = 163;;
let _EVM_INS_LOG4 = 164;;
let _EVM_INS_CREATE = 240;;
let _EVM_INS_CALL = 241;;
let _EVM_INS_CALLCODE = 242;;
let _EVM_INS_RETURN = 243;;
let _EVM_INS_DELEGATECALL = 244;;
let _EVM_INS_CREATE2 = 245;;
let _EVM_INS_STATICCALL = 250;;
let _EVM_INS_REVERT = 253;;
let _EVM_INS_INVALID = 254;;
let _EVM_INS_SELFDESTRUCT = 255;;
let _EVM_INS_ENDING = 256;;
let _EVM_GRP_INVALID = 0;;
let _EVM_GRP_JUMP = 1;;
let _EVM_GRP_MATH = 8;;
let _EVM_GRP_STACK_WRITE = 9;;
let _EVM_GRP_STACK_READ = 10;;
let _EVM_GRP_MEM_WRITE = 11;;
let _EVM_GRP_MEM_READ = 12;;
let _EVM_GRP_STORE_WRITE = 13;;
let _EVM_GRP_STORE_READ = 14;;
let _EVM_GRP_HALT = 15;;
let _EVM_GRP_ENDING = 16;;
external/capstone/bindings/ocaml/m680x.ml
Vendored
+48
View File
@@ -0,0 +1,48 @@
(* Capstone Disassembly Engine
* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
open M680x_const
(* architecture specific info of instruction *)
type m680x_op_idx = {
base_reg: int;
offset_reg: int;
offset: int;
offset_addr: int;
offset_bits: int;
inc_dec: int;
flags: int;
}
type m680x_op_rel = {
addr_rel: int;
offset: int;
}
type m680x_op_ext = {
addr_ext: int;
indirect: bool;
}
type m680x_op_value =
| M680X_OP_INVALID of int
| M680X_OP_IMMEDIATE of int
| M680X_OP_REGISTER of int
| M680X_OP_INDEXED of m680x_op_idx
| M680X_OP_RELATIVE of m680x_op_rel
| M680X_OP_EXTENDED of m680x_op_ext
| M680X_OP_DIRECT of int
| M680X_OP_CONSTANT of int
type m680x_op = {
value: m680x_op_value;
size: int;
access: int;
}
type cs_m680x = {
flags: int;
operands: m680x_op array;
}
external/capstone/bindings/ocaml/m680x_const.ml
Vendored
+414
View File
@@ -0,0 +1,414 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m680x_const.ml] *)
let _M680X_OPERAND_COUNT = 9;;
let _M680X_REG_INVALID = 0;;
let _M680X_REG_A = 1;;
let _M680X_REG_B = 2;;
let _M680X_REG_E = 3;;
let _M680X_REG_F = 4;;
let _M680X_REG_0 = 5;;
let _M680X_REG_D = 6;;
let _M680X_REG_W = 7;;
let _M680X_REG_CC = 8;;
let _M680X_REG_DP = 9;;
let _M680X_REG_MD = 10;;
let _M680X_REG_HX = 11;;
let _M680X_REG_H = 12;;
let _M680X_REG_X = 13;;
let _M680X_REG_Y = 14;;
let _M680X_REG_S = 15;;
let _M680X_REG_U = 16;;
let _M680X_REG_V = 17;;
let _M680X_REG_Q = 18;;
let _M680X_REG_PC = 19;;
let _M680X_REG_TMP2 = 20;;
let _M680X_REG_TMP3 = 21;;
let _M680X_REG_ENDING = 22;;
let _M680X_OP_INVALID = _CS_OP_INVALID;;
let _M680X_OP_REGISTER = _CS_OP_REG;;
let _M680X_OP_IMMEDIATE = _CS_OP_IMM;;
let _M680X_OP_INDEXED = _CS_OP_SPECIAL+0;;
let _M680X_OP_EXTENDED = _CS_OP_SPECIAL+1;;
let _M680X_OP_DIRECT = _CS_OP_SPECIAL+2;;
let _M680X_OP_RELATIVE = _CS_OP_SPECIAL+3;;
let _M680X_OP_CONSTANT = _CS_OP_SPECIAL+4;;
let _M680X_OFFSET_NONE = 0;;
let _M680X_OFFSET_BITS_5 = 5;;
let _M680X_OFFSET_BITS_8 = 8;;
let _M680X_OFFSET_BITS_9 = 9;;
let _M680X_OFFSET_BITS_16 = 16;;
let _M680X_IDX_INDIRECT = 1;;
let _M680X_IDX_NO_COMMA = 2;;
let _M680X_IDX_POST_INC_DEC = 4;;
let _M680X_GRP_INVALID = 0;;
let _M680X_GRP_JUMP = 1;;
let _M680X_GRP_CALL = 2;;
let _M680X_GRP_RET = 3;;
let _M680X_GRP_INT = 4;;
let _M680X_GRP_IRET = 5;;
let _M680X_GRP_PRIV = 6;;
let _M680X_GRP_BRAREL = 7;;
let _M680X_GRP_ENDING = 8;;
let _M680X_FIRST_OP_IN_MNEM = 1;;
let _M680X_SECOND_OP_IN_MNEM = 2;;
let _M680X_INS_INVLD = 0;;
let _M680X_INS_ABA = 1;;
let _M680X_INS_ABX = 2;;
let _M680X_INS_ABY = 3;;
let _M680X_INS_ADC = 4;;
let _M680X_INS_ADCA = 5;;
let _M680X_INS_ADCB = 6;;
let _M680X_INS_ADCD = 7;;
let _M680X_INS_ADCR = 8;;
let _M680X_INS_ADD = 9;;
let _M680X_INS_ADDA = 10;;
let _M680X_INS_ADDB = 11;;
let _M680X_INS_ADDD = 12;;
let _M680X_INS_ADDE = 13;;
let _M680X_INS_ADDF = 14;;
let _M680X_INS_ADDR = 15;;
let _M680X_INS_ADDW = 16;;
let _M680X_INS_AIM = 17;;
let _M680X_INS_AIS = 18;;
let _M680X_INS_AIX = 19;;
let _M680X_INS_AND = 20;;
let _M680X_INS_ANDA = 21;;
let _M680X_INS_ANDB = 22;;
let _M680X_INS_ANDCC = 23;;
let _M680X_INS_ANDD = 24;;
let _M680X_INS_ANDR = 25;;
let _M680X_INS_ASL = 26;;
let _M680X_INS_ASLA = 27;;
let _M680X_INS_ASLB = 28;;
let _M680X_INS_ASLD = 29;;
let _M680X_INS_ASR = 30;;
let _M680X_INS_ASRA = 31;;
let _M680X_INS_ASRB = 32;;
let _M680X_INS_ASRD = 33;;
let _M680X_INS_ASRX = 34;;
let _M680X_INS_BAND = 35;;
let _M680X_INS_BCC = 36;;
let _M680X_INS_BCLR = 37;;
let _M680X_INS_BCS = 38;;
let _M680X_INS_BEOR = 39;;
let _M680X_INS_BEQ = 40;;
let _M680X_INS_BGE = 41;;
let _M680X_INS_BGND = 42;;
let _M680X_INS_BGT = 43;;
let _M680X_INS_BHCC = 44;;
let _M680X_INS_BHCS = 45;;
let _M680X_INS_BHI = 46;;
let _M680X_INS_BIAND = 47;;
let _M680X_INS_BIEOR = 48;;
let _M680X_INS_BIH = 49;;
let _M680X_INS_BIL = 50;;
let _M680X_INS_BIOR = 51;;
let _M680X_INS_BIT = 52;;
let _M680X_INS_BITA = 53;;
let _M680X_INS_BITB = 54;;
let _M680X_INS_BITD = 55;;
let _M680X_INS_BITMD = 56;;
let _M680X_INS_BLE = 57;;
let _M680X_INS_BLS = 58;;
let _M680X_INS_BLT = 59;;
let _M680X_INS_BMC = 60;;
let _M680X_INS_BMI = 61;;
let _M680X_INS_BMS = 62;;
let _M680X_INS_BNE = 63;;
let _M680X_INS_BOR = 64;;
let _M680X_INS_BPL = 65;;
let _M680X_INS_BRCLR = 66;;
let _M680X_INS_BRSET = 67;;
let _M680X_INS_BRA = 68;;
let _M680X_INS_BRN = 69;;
let _M680X_INS_BSET = 70;;
let _M680X_INS_BSR = 71;;
let _M680X_INS_BVC = 72;;
let _M680X_INS_BVS = 73;;
let _M680X_INS_CALL = 74;;
let _M680X_INS_CBA = 75;;
let _M680X_INS_CBEQ = 76;;
let _M680X_INS_CBEQA = 77;;
let _M680X_INS_CBEQX = 78;;
let _M680X_INS_CLC = 79;;
let _M680X_INS_CLI = 80;;
let _M680X_INS_CLR = 81;;
let _M680X_INS_CLRA = 82;;
let _M680X_INS_CLRB = 83;;
let _M680X_INS_CLRD = 84;;
let _M680X_INS_CLRE = 85;;
let _M680X_INS_CLRF = 86;;
let _M680X_INS_CLRH = 87;;
let _M680X_INS_CLRW = 88;;
let _M680X_INS_CLRX = 89;;
let _M680X_INS_CLV = 90;;
let _M680X_INS_CMP = 91;;
let _M680X_INS_CMPA = 92;;
let _M680X_INS_CMPB = 93;;
let _M680X_INS_CMPD = 94;;
let _M680X_INS_CMPE = 95;;
let _M680X_INS_CMPF = 96;;
let _M680X_INS_CMPR = 97;;
let _M680X_INS_CMPS = 98;;
let _M680X_INS_CMPU = 99;;
let _M680X_INS_CMPW = 100;;
let _M680X_INS_CMPX = 101;;
let _M680X_INS_CMPY = 102;;
let _M680X_INS_COM = 103;;
let _M680X_INS_COMA = 104;;
let _M680X_INS_COMB = 105;;
let _M680X_INS_COMD = 106;;
let _M680X_INS_COME = 107;;
let _M680X_INS_COMF = 108;;
let _M680X_INS_COMW = 109;;
let _M680X_INS_COMX = 110;;
let _M680X_INS_CPD = 111;;
let _M680X_INS_CPHX = 112;;
let _M680X_INS_CPS = 113;;
let _M680X_INS_CPX = 114;;
let _M680X_INS_CPY = 115;;
let _M680X_INS_CWAI = 116;;
let _M680X_INS_DAA = 117;;
let _M680X_INS_DBEQ = 118;;
let _M680X_INS_DBNE = 119;;
let _M680X_INS_DBNZ = 120;;
let _M680X_INS_DBNZA = 121;;
let _M680X_INS_DBNZX = 122;;
let _M680X_INS_DEC = 123;;
let _M680X_INS_DECA = 124;;
let _M680X_INS_DECB = 125;;
let _M680X_INS_DECD = 126;;
let _M680X_INS_DECE = 127;;
let _M680X_INS_DECF = 128;;
let _M680X_INS_DECW = 129;;
let _M680X_INS_DECX = 130;;
let _M680X_INS_DES = 131;;
let _M680X_INS_DEX = 132;;
let _M680X_INS_DEY = 133;;
let _M680X_INS_DIV = 134;;
let _M680X_INS_DIVD = 135;;
let _M680X_INS_DIVQ = 136;;
let _M680X_INS_EDIV = 137;;
let _M680X_INS_EDIVS = 138;;
let _M680X_INS_EIM = 139;;
let _M680X_INS_EMACS = 140;;
let _M680X_INS_EMAXD = 141;;
let _M680X_INS_EMAXM = 142;;
let _M680X_INS_EMIND = 143;;
let _M680X_INS_EMINM = 144;;
let _M680X_INS_EMUL = 145;;
let _M680X_INS_EMULS = 146;;
let _M680X_INS_EOR = 147;;
let _M680X_INS_EORA = 148;;
let _M680X_INS_EORB = 149;;
let _M680X_INS_EORD = 150;;
let _M680X_INS_EORR = 151;;
let _M680X_INS_ETBL = 152;;
let _M680X_INS_EXG = 153;;
let _M680X_INS_FDIV = 154;;
let _M680X_INS_IBEQ = 155;;
let _M680X_INS_IBNE = 156;;
let _M680X_INS_IDIV = 157;;
let _M680X_INS_IDIVS = 158;;
let _M680X_INS_ILLGL = 159;;
let _M680X_INS_INC = 160;;
let _M680X_INS_INCA = 161;;
let _M680X_INS_INCB = 162;;
let _M680X_INS_INCD = 163;;
let _M680X_INS_INCE = 164;;
let _M680X_INS_INCF = 165;;
let _M680X_INS_INCW = 166;;
let _M680X_INS_INCX = 167;;
let _M680X_INS_INS = 168;;
let _M680X_INS_INX = 169;;
let _M680X_INS_INY = 170;;
let _M680X_INS_JMP = 171;;
let _M680X_INS_JSR = 172;;
let _M680X_INS_LBCC = 173;;
let _M680X_INS_LBCS = 174;;
let _M680X_INS_LBEQ = 175;;
let _M680X_INS_LBGE = 176;;
let _M680X_INS_LBGT = 177;;
let _M680X_INS_LBHI = 178;;
let _M680X_INS_LBLE = 179;;
let _M680X_INS_LBLS = 180;;
let _M680X_INS_LBLT = 181;;
let _M680X_INS_LBMI = 182;;
let _M680X_INS_LBNE = 183;;
let _M680X_INS_LBPL = 184;;
let _M680X_INS_LBRA = 185;;
let _M680X_INS_LBRN = 186;;
let _M680X_INS_LBSR = 187;;
let _M680X_INS_LBVC = 188;;
let _M680X_INS_LBVS = 189;;
let _M680X_INS_LDA = 190;;
let _M680X_INS_LDAA = 191;;
let _M680X_INS_LDAB = 192;;
let _M680X_INS_LDB = 193;;
let _M680X_INS_LDBT = 194;;
let _M680X_INS_LDD = 195;;
let _M680X_INS_LDE = 196;;
let _M680X_INS_LDF = 197;;
let _M680X_INS_LDHX = 198;;
let _M680X_INS_LDMD = 199;;
let _M680X_INS_LDQ = 200;;
let _M680X_INS_LDS = 201;;
let _M680X_INS_LDU = 202;;
let _M680X_INS_LDW = 203;;
let _M680X_INS_LDX = 204;;
let _M680X_INS_LDY = 205;;
let _M680X_INS_LEAS = 206;;
let _M680X_INS_LEAU = 207;;
let _M680X_INS_LEAX = 208;;
let _M680X_INS_LEAY = 209;;
let _M680X_INS_LSL = 210;;
let _M680X_INS_LSLA = 211;;
let _M680X_INS_LSLB = 212;;
let _M680X_INS_LSLD = 213;;
let _M680X_INS_LSLX = 214;;
let _M680X_INS_LSR = 215;;
let _M680X_INS_LSRA = 216;;
let _M680X_INS_LSRB = 217;;
let _M680X_INS_LSRD = 218;;
let _M680X_INS_LSRW = 219;;
let _M680X_INS_LSRX = 220;;
let _M680X_INS_MAXA = 221;;
let _M680X_INS_MAXM = 222;;
let _M680X_INS_MEM = 223;;
let _M680X_INS_MINA = 224;;
let _M680X_INS_MINM = 225;;
let _M680X_INS_MOV = 226;;
let _M680X_INS_MOVB = 227;;
let _M680X_INS_MOVW = 228;;
let _M680X_INS_MUL = 229;;
let _M680X_INS_MULD = 230;;
let _M680X_INS_NEG = 231;;
let _M680X_INS_NEGA = 232;;
let _M680X_INS_NEGB = 233;;
let _M680X_INS_NEGD = 234;;
let _M680X_INS_NEGX = 235;;
let _M680X_INS_NOP = 236;;
let _M680X_INS_NSA = 237;;
let _M680X_INS_OIM = 238;;
let _M680X_INS_ORA = 239;;
let _M680X_INS_ORAA = 240;;
let _M680X_INS_ORAB = 241;;
let _M680X_INS_ORB = 242;;
let _M680X_INS_ORCC = 243;;
let _M680X_INS_ORD = 244;;
let _M680X_INS_ORR = 245;;
let _M680X_INS_PSHA = 246;;
let _M680X_INS_PSHB = 247;;
let _M680X_INS_PSHC = 248;;
let _M680X_INS_PSHD = 249;;
let _M680X_INS_PSHH = 250;;
let _M680X_INS_PSHS = 251;;
let _M680X_INS_PSHSW = 252;;
let _M680X_INS_PSHU = 253;;
let _M680X_INS_PSHUW = 254;;
let _M680X_INS_PSHX = 255;;
let _M680X_INS_PSHY = 256;;
let _M680X_INS_PULA = 257;;
let _M680X_INS_PULB = 258;;
let _M680X_INS_PULC = 259;;
let _M680X_INS_PULD = 260;;
let _M680X_INS_PULH = 261;;
let _M680X_INS_PULS = 262;;
let _M680X_INS_PULSW = 263;;
let _M680X_INS_PULU = 264;;
let _M680X_INS_PULUW = 265;;
let _M680X_INS_PULX = 266;;
let _M680X_INS_PULY = 267;;
let _M680X_INS_REV = 268;;
let _M680X_INS_REVW = 269;;
let _M680X_INS_ROL = 270;;
let _M680X_INS_ROLA = 271;;
let _M680X_INS_ROLB = 272;;
let _M680X_INS_ROLD = 273;;
let _M680X_INS_ROLW = 274;;
let _M680X_INS_ROLX = 275;;
let _M680X_INS_ROR = 276;;
let _M680X_INS_RORA = 277;;
let _M680X_INS_RORB = 278;;
let _M680X_INS_RORD = 279;;
let _M680X_INS_RORW = 280;;
let _M680X_INS_RORX = 281;;
let _M680X_INS_RSP = 282;;
let _M680X_INS_RTC = 283;;
let _M680X_INS_RTI = 284;;
let _M680X_INS_RTS = 285;;
let _M680X_INS_SBA = 286;;
let _M680X_INS_SBC = 287;;
let _M680X_INS_SBCA = 288;;
let _M680X_INS_SBCB = 289;;
let _M680X_INS_SBCD = 290;;
let _M680X_INS_SBCR = 291;;
let _M680X_INS_SEC = 292;;
let _M680X_INS_SEI = 293;;
let _M680X_INS_SEV = 294;;
let _M680X_INS_SEX = 295;;
let _M680X_INS_SEXW = 296;;
let _M680X_INS_SLP = 297;;
let _M680X_INS_STA = 298;;
let _M680X_INS_STAA = 299;;
let _M680X_INS_STAB = 300;;
let _M680X_INS_STB = 301;;
let _M680X_INS_STBT = 302;;
let _M680X_INS_STD = 303;;
let _M680X_INS_STE = 304;;
let _M680X_INS_STF = 305;;
let _M680X_INS_STOP = 306;;
let _M680X_INS_STHX = 307;;
let _M680X_INS_STQ = 308;;
let _M680X_INS_STS = 309;;
let _M680X_INS_STU = 310;;
let _M680X_INS_STW = 311;;
let _M680X_INS_STX = 312;;
let _M680X_INS_STY = 313;;
let _M680X_INS_SUB = 314;;
let _M680X_INS_SUBA = 315;;
let _M680X_INS_SUBB = 316;;
let _M680X_INS_SUBD = 317;;
let _M680X_INS_SUBE = 318;;
let _M680X_INS_SUBF = 319;;
let _M680X_INS_SUBR = 320;;
let _M680X_INS_SUBW = 321;;
let _M680X_INS_SWI = 322;;
let _M680X_INS_SWI2 = 323;;
let _M680X_INS_SWI3 = 324;;
let _M680X_INS_SYNC = 325;;
let _M680X_INS_TAB = 326;;
let _M680X_INS_TAP = 327;;
let _M680X_INS_TAX = 328;;
let _M680X_INS_TBA = 329;;
let _M680X_INS_TBEQ = 330;;
let _M680X_INS_TBL = 331;;
let _M680X_INS_TBNE = 332;;
let _M680X_INS_TEST = 333;;
let _M680X_INS_TFM = 334;;
let _M680X_INS_TFR = 335;;
let _M680X_INS_TIM = 336;;
let _M680X_INS_TPA = 337;;
let _M680X_INS_TST = 338;;
let _M680X_INS_TSTA = 339;;
let _M680X_INS_TSTB = 340;;
let _M680X_INS_TSTD = 341;;
let _M680X_INS_TSTE = 342;;
let _M680X_INS_TSTF = 343;;
let _M680X_INS_TSTW = 344;;
let _M680X_INS_TSTX = 345;;
let _M680X_INS_TSX = 346;;
let _M680X_INS_TSY = 347;;
let _M680X_INS_TXA = 348;;
let _M680X_INS_TXS = 349;;
let _M680X_INS_TYS = 350;;
let _M680X_INS_WAI = 351;;
let _M680X_INS_WAIT = 352;;
let _M680X_INS_WAV = 353;;
let _M680X_INS_WAVR = 354;;
let _M680X_INS_XGDX = 355;;
let _M680X_INS_XGDY = 356;;
let _M680X_INS_ENDING = 357;;
external/capstone/bindings/ocaml/m68k_const.ml
Vendored
+484
View File
@@ -0,0 +1,484 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.ml] *)
let _M68K_OPERAND_COUNT = 4;;
let _M68K_REG_INVALID = 0;;
let _M68K_REG_D0 = 1;;
let _M68K_REG_D1 = 2;;
let _M68K_REG_D2 = 3;;
let _M68K_REG_D3 = 4;;
let _M68K_REG_D4 = 5;;
let _M68K_REG_D5 = 6;;
let _M68K_REG_D6 = 7;;
let _M68K_REG_D7 = 8;;
let _M68K_REG_A0 = 9;;
let _M68K_REG_A1 = 10;;
let _M68K_REG_A2 = 11;;
let _M68K_REG_A3 = 12;;
let _M68K_REG_A4 = 13;;
let _M68K_REG_A5 = 14;;
let _M68K_REG_A6 = 15;;
let _M68K_REG_A7 = 16;;
let _M68K_REG_FP0 = 17;;
let _M68K_REG_FP1 = 18;;
let _M68K_REG_FP2 = 19;;
let _M68K_REG_FP3 = 20;;
let _M68K_REG_FP4 = 21;;
let _M68K_REG_FP5 = 22;;
let _M68K_REG_FP6 = 23;;
let _M68K_REG_FP7 = 24;;
let _M68K_REG_PC = 25;;
let _M68K_REG_SR = 26;;
let _M68K_REG_CCR = 27;;
let _M68K_REG_SFC = 28;;
let _M68K_REG_DFC = 29;;
let _M68K_REG_USP = 30;;
let _M68K_REG_VBR = 31;;
let _M68K_REG_CACR = 32;;
let _M68K_REG_CAAR = 33;;
let _M68K_REG_MSP = 34;;
let _M68K_REG_ISP = 35;;
let _M68K_REG_TC = 36;;
let _M68K_REG_ITT0 = 37;;
let _M68K_REG_ITT1 = 38;;
let _M68K_REG_DTT0 = 39;;
let _M68K_REG_DTT1 = 40;;
let _M68K_REG_MMUSR = 41;;
let _M68K_REG_URP = 42;;
let _M68K_REG_SRP = 43;;
let _M68K_REG_FPCR = 44;;
let _M68K_REG_FPSR = 45;;
let _M68K_REG_FPIAR = 46;;
let _M68K_REG_ENDING = 47;;
let _M68K_AM_NONE = 0;;
let _M68K_AM_REG_DIRECT_DATA = 1;;
let _M68K_AM_REG_DIRECT_ADDR = 2;;
let _M68K_AM_REGI_ADDR = 3;;
let _M68K_AM_REGI_ADDR_POST_INC = 4;;
let _M68K_AM_REGI_ADDR_PRE_DEC = 5;;
let _M68K_AM_REGI_ADDR_DISP = 6;;
let _M68K_AM_AREGI_INDEX_8_BIT_DISP = 7;;
let _M68K_AM_AREGI_INDEX_BASE_DISP = 8;;
let _M68K_AM_MEMI_POST_INDEX = 9;;
let _M68K_AM_MEMI_PRE_INDEX = 10;;
let _M68K_AM_PCI_DISP = 11;;
let _M68K_AM_PCI_INDEX_8_BIT_DISP = 12;;
let _M68K_AM_PCI_INDEX_BASE_DISP = 13;;
let _M68K_AM_PC_MEMI_POST_INDEX = 14;;
let _M68K_AM_PC_MEMI_PRE_INDEX = 15;;
let _M68K_AM_ABSOLUTE_DATA_SHORT = 16;;
let _M68K_AM_ABSOLUTE_DATA_LONG = 17;;
let _M68K_AM_IMMEDIATE = 18;;
let _M68K_AM_BRANCH_DISPLACEMENT = 19;;
let _M68K_OP_INVALID = _CS_OP_INVALID;;
let _M68K_OP_REG = _CS_OP_REG;;
let _M68K_OP_IMM = _CS_OP_IMM;;
let _M68K_OP_FP_SINGLE = _CS_OP_SPECIAL+0;;
let _M68K_OP_FP_DOUBLE = _CS_OP_SPECIAL+1;;
let _M68K_OP_REG_BITS = _CS_OP_SPECIAL+2;;
let _M68K_OP_REG_PAIR = _CS_OP_SPECIAL+3;;
let _M68K_OP_BR_DISP = _CS_OP_SPECIAL+4;;
let _M68K_OP_MEM = _CS_OP_MEM;;
let _M68K_OP_BR_DISP_SIZE_INVALID = 0;;
let _M68K_OP_BR_DISP_SIZE_BYTE = 1;;
let _M68K_OP_BR_DISP_SIZE_WORD = 2;;
let _M68K_OP_BR_DISP_SIZE_LONG = 4;;
let _M68K_CPU_SIZE_NONE = 0;;
let _M68K_CPU_SIZE_BYTE = 1;;
let _M68K_CPU_SIZE_WORD = 2;;
let _M68K_CPU_SIZE_LONG = 4;;
let _M68K_FPU_SIZE_NONE = 0;;
let _M68K_FPU_SIZE_SINGLE = 4;;
let _M68K_FPU_SIZE_DOUBLE = 8;;
let _M68K_FPU_SIZE_EXTENDED = 12;;
let _M68K_SIZE_TYPE_INVALID = 0;;
let _M68K_SIZE_TYPE_CPU = 1;;
let _M68K_SIZE_TYPE_FPU = 2;;
let _M68K_INS_INVALID = 0;;
let _M68K_INS_ABCD = 1;;
let _M68K_INS_ADD = 2;;
let _M68K_INS_ADDA = 3;;
let _M68K_INS_ADDI = 4;;
let _M68K_INS_ADDQ = 5;;
let _M68K_INS_ADDX = 6;;
let _M68K_INS_AND = 7;;
let _M68K_INS_ANDI = 8;;
let _M68K_INS_ASL = 9;;
let _M68K_INS_ASR = 10;;
let _M68K_INS_BHS = 11;;
let _M68K_INS_BLO = 12;;
let _M68K_INS_BHI = 13;;
let _M68K_INS_BLS = 14;;
let _M68K_INS_BCC = 15;;
let _M68K_INS_BCS = 16;;
let _M68K_INS_BNE = 17;;
let _M68K_INS_BEQ = 18;;
let _M68K_INS_BVC = 19;;
let _M68K_INS_BVS = 20;;
let _M68K_INS_BPL = 21;;
let _M68K_INS_BMI = 22;;
let _M68K_INS_BGE = 23;;
let _M68K_INS_BLT = 24;;
let _M68K_INS_BGT = 25;;
let _M68K_INS_BLE = 26;;
let _M68K_INS_BRA = 27;;
let _M68K_INS_BSR = 28;;
let _M68K_INS_BCHG = 29;;
let _M68K_INS_BCLR = 30;;
let _M68K_INS_BSET = 31;;
let _M68K_INS_BTST = 32;;
let _M68K_INS_BFCHG = 33;;
let _M68K_INS_BFCLR = 34;;
let _M68K_INS_BFEXTS = 35;;
let _M68K_INS_BFEXTU = 36;;
let _M68K_INS_BFFFO = 37;;
let _M68K_INS_BFINS = 38;;
let _M68K_INS_BFSET = 39;;
let _M68K_INS_BFTST = 40;;
let _M68K_INS_BKPT = 41;;
let _M68K_INS_CALLM = 42;;
let _M68K_INS_CAS = 43;;
let _M68K_INS_CAS2 = 44;;
let _M68K_INS_CHK = 45;;
let _M68K_INS_CHK2 = 46;;
let _M68K_INS_CLR = 47;;
let _M68K_INS_CMP = 48;;
let _M68K_INS_CMPA = 49;;
let _M68K_INS_CMPI = 50;;
let _M68K_INS_CMPM = 51;;
let _M68K_INS_CMP2 = 52;;
let _M68K_INS_CINVL = 53;;
let _M68K_INS_CINVP = 54;;
let _M68K_INS_CINVA = 55;;
let _M68K_INS_CPUSHL = 56;;
let _M68K_INS_CPUSHP = 57;;
let _M68K_INS_CPUSHA = 58;;
let _M68K_INS_DBT = 59;;
let _M68K_INS_DBF = 60;;
let _M68K_INS_DBHI = 61;;
let _M68K_INS_DBLS = 62;;
let _M68K_INS_DBCC = 63;;
let _M68K_INS_DBCS = 64;;
let _M68K_INS_DBNE = 65;;
let _M68K_INS_DBEQ = 66;;
let _M68K_INS_DBVC = 67;;
let _M68K_INS_DBVS = 68;;
let _M68K_INS_DBPL = 69;;
let _M68K_INS_DBMI = 70;;
let _M68K_INS_DBGE = 71;;
let _M68K_INS_DBLT = 72;;
let _M68K_INS_DBGT = 73;;
let _M68K_INS_DBLE = 74;;
let _M68K_INS_DBRA = 75;;
let _M68K_INS_DIVS = 76;;
let _M68K_INS_DIVSL = 77;;
let _M68K_INS_DIVU = 78;;
let _M68K_INS_DIVUL = 79;;
let _M68K_INS_EOR = 80;;
let _M68K_INS_EORI = 81;;
let _M68K_INS_EXG = 82;;
let _M68K_INS_EXT = 83;;
let _M68K_INS_EXTB = 84;;
let _M68K_INS_FABS = 85;;
let _M68K_INS_FSABS = 86;;
let _M68K_INS_FDABS = 87;;
let _M68K_INS_FACOS = 88;;
let _M68K_INS_FADD = 89;;
let _M68K_INS_FSADD = 90;;
let _M68K_INS_FDADD = 91;;
let _M68K_INS_FASIN = 92;;
let _M68K_INS_FATAN = 93;;
let _M68K_INS_FATANH = 94;;
let _M68K_INS_FBF = 95;;
let _M68K_INS_FBEQ = 96;;
let _M68K_INS_FBOGT = 97;;
let _M68K_INS_FBOGE = 98;;
let _M68K_INS_FBOLT = 99;;
let _M68K_INS_FBOLE = 100;;
let _M68K_INS_FBOGL = 101;;
let _M68K_INS_FBOR = 102;;
let _M68K_INS_FBUN = 103;;
let _M68K_INS_FBUEQ = 104;;
let _M68K_INS_FBUGT = 105;;
let _M68K_INS_FBUGE = 106;;
let _M68K_INS_FBULT = 107;;
let _M68K_INS_FBULE = 108;;
let _M68K_INS_FBNE = 109;;
let _M68K_INS_FBT = 110;;
let _M68K_INS_FBSF = 111;;
let _M68K_INS_FBSEQ = 112;;
let _M68K_INS_FBGT = 113;;
let _M68K_INS_FBGE = 114;;
let _M68K_INS_FBLT = 115;;
let _M68K_INS_FBLE = 116;;
let _M68K_INS_FBGL = 117;;
let _M68K_INS_FBGLE = 118;;
let _M68K_INS_FBNGLE = 119;;
let _M68K_INS_FBNGL = 120;;
let _M68K_INS_FBNLE = 121;;
let _M68K_INS_FBNLT = 122;;
let _M68K_INS_FBNGE = 123;;
let _M68K_INS_FBNGT = 124;;
let _M68K_INS_FBSNE = 125;;
let _M68K_INS_FBST = 126;;
let _M68K_INS_FCMP = 127;;
let _M68K_INS_FCOS = 128;;
let _M68K_INS_FCOSH = 129;;
let _M68K_INS_FDBF = 130;;
let _M68K_INS_FDBEQ = 131;;
let _M68K_INS_FDBOGT = 132;;
let _M68K_INS_FDBOGE = 133;;
let _M68K_INS_FDBOLT = 134;;
let _M68K_INS_FDBOLE = 135;;
let _M68K_INS_FDBOGL = 136;;
let _M68K_INS_FDBOR = 137;;
let _M68K_INS_FDBUN = 138;;
let _M68K_INS_FDBUEQ = 139;;
let _M68K_INS_FDBUGT = 140;;
let _M68K_INS_FDBUGE = 141;;
let _M68K_INS_FDBULT = 142;;
let _M68K_INS_FDBULE = 143;;
let _M68K_INS_FDBNE = 144;;
let _M68K_INS_FDBT = 145;;
let _M68K_INS_FDBSF = 146;;
let _M68K_INS_FDBSEQ = 147;;
let _M68K_INS_FDBGT = 148;;
let _M68K_INS_FDBGE = 149;;
let _M68K_INS_FDBLT = 150;;
let _M68K_INS_FDBLE = 151;;
let _M68K_INS_FDBGL = 152;;
let _M68K_INS_FDBGLE = 153;;
let _M68K_INS_FDBNGLE = 154;;
let _M68K_INS_FDBNGL = 155;;
let _M68K_INS_FDBNLE = 156;;
let _M68K_INS_FDBNLT = 157;;
let _M68K_INS_FDBNGE = 158;;
let _M68K_INS_FDBNGT = 159;;
let _M68K_INS_FDBSNE = 160;;
let _M68K_INS_FDBST = 161;;
let _M68K_INS_FDIV = 162;;
let _M68K_INS_FSDIV = 163;;
let _M68K_INS_FDDIV = 164;;
let _M68K_INS_FETOX = 165;;
let _M68K_INS_FETOXM1 = 166;;
let _M68K_INS_FGETEXP = 167;;
let _M68K_INS_FGETMAN = 168;;
let _M68K_INS_FINT = 169;;
let _M68K_INS_FINTRZ = 170;;
let _M68K_INS_FLOG10 = 171;;
let _M68K_INS_FLOG2 = 172;;
let _M68K_INS_FLOGN = 173;;
let _M68K_INS_FLOGNP1 = 174;;
let _M68K_INS_FMOD = 175;;
let _M68K_INS_FMOVE = 176;;
let _M68K_INS_FSMOVE = 177;;
let _M68K_INS_FDMOVE = 178;;
let _M68K_INS_FMOVECR = 179;;
let _M68K_INS_FMOVEM = 180;;
let _M68K_INS_FMUL = 181;;
let _M68K_INS_FSMUL = 182;;
let _M68K_INS_FDMUL = 183;;
let _M68K_INS_FNEG = 184;;
let _M68K_INS_FSNEG = 185;;
let _M68K_INS_FDNEG = 186;;
let _M68K_INS_FNOP = 187;;
let _M68K_INS_FREM = 188;;
let _M68K_INS_FRESTORE = 189;;
let _M68K_INS_FSAVE = 190;;
let _M68K_INS_FSCALE = 191;;
let _M68K_INS_FSGLDIV = 192;;
let _M68K_INS_FSGLMUL = 193;;
let _M68K_INS_FSIN = 194;;
let _M68K_INS_FSINCOS = 195;;
let _M68K_INS_FSINH = 196;;
let _M68K_INS_FSQRT = 197;;
let _M68K_INS_FSSQRT = 198;;
let _M68K_INS_FDSQRT = 199;;
let _M68K_INS_FSF = 200;;
let _M68K_INS_FSBEQ = 201;;
let _M68K_INS_FSOGT = 202;;
let _M68K_INS_FSOGE = 203;;
let _M68K_INS_FSOLT = 204;;
let _M68K_INS_FSOLE = 205;;
let _M68K_INS_FSOGL = 206;;
let _M68K_INS_FSOR = 207;;
let _M68K_INS_FSUN = 208;;
let _M68K_INS_FSUEQ = 209;;
let _M68K_INS_FSUGT = 210;;
let _M68K_INS_FSUGE = 211;;
let _M68K_INS_FSULT = 212;;
let _M68K_INS_FSULE = 213;;
let _M68K_INS_FSNE = 214;;
let _M68K_INS_FST = 215;;
let _M68K_INS_FSSF = 216;;
let _M68K_INS_FSSEQ = 217;;
let _M68K_INS_FSGT = 218;;
let _M68K_INS_FSGE = 219;;
let _M68K_INS_FSLT = 220;;
let _M68K_INS_FSLE = 221;;
let _M68K_INS_FSGL = 222;;
let _M68K_INS_FSGLE = 223;;
let _M68K_INS_FSNGLE = 224;;
let _M68K_INS_FSNGL = 225;;
let _M68K_INS_FSNLE = 226;;
let _M68K_INS_FSNLT = 227;;
let _M68K_INS_FSNGE = 228;;
let _M68K_INS_FSNGT = 229;;
let _M68K_INS_FSSNE = 230;;
let _M68K_INS_FSST = 231;;
let _M68K_INS_FSUB = 232;;
let _M68K_INS_FSSUB = 233;;
let _M68K_INS_FDSUB = 234;;
let _M68K_INS_FTAN = 235;;
let _M68K_INS_FTANH = 236;;
let _M68K_INS_FTENTOX = 237;;
let _M68K_INS_FTRAPF = 238;;
let _M68K_INS_FTRAPEQ = 239;;
let _M68K_INS_FTRAPOGT = 240;;
let _M68K_INS_FTRAPOGE = 241;;
let _M68K_INS_FTRAPOLT = 242;;
let _M68K_INS_FTRAPOLE = 243;;
let _M68K_INS_FTRAPOGL = 244;;
let _M68K_INS_FTRAPOR = 245;;
let _M68K_INS_FTRAPUN = 246;;
let _M68K_INS_FTRAPUEQ = 247;;
let _M68K_INS_FTRAPUGT = 248;;
let _M68K_INS_FTRAPUGE = 249;;
let _M68K_INS_FTRAPULT = 250;;
let _M68K_INS_FTRAPULE = 251;;
let _M68K_INS_FTRAPNE = 252;;
let _M68K_INS_FTRAPT = 253;;
let _M68K_INS_FTRAPSF = 254;;
let _M68K_INS_FTRAPSEQ = 255;;
let _M68K_INS_FTRAPGT = 256;;
let _M68K_INS_FTRAPGE = 257;;
let _M68K_INS_FTRAPLT = 258;;
let _M68K_INS_FTRAPLE = 259;;
let _M68K_INS_FTRAPGL = 260;;
let _M68K_INS_FTRAPGLE = 261;;
let _M68K_INS_FTRAPNGLE = 262;;
let _M68K_INS_FTRAPNGL = 263;;
let _M68K_INS_FTRAPNLE = 264;;
let _M68K_INS_FTRAPNLT = 265;;
let _M68K_INS_FTRAPNGE = 266;;
let _M68K_INS_FTRAPNGT = 267;;
let _M68K_INS_FTRAPSNE = 268;;
let _M68K_INS_FTRAPST = 269;;
let _M68K_INS_FTST = 270;;
let _M68K_INS_FTWOTOX = 271;;
let _M68K_INS_HALT = 272;;
let _M68K_INS_ILLEGAL = 273;;
let _M68K_INS_JMP = 274;;
let _M68K_INS_JSR = 275;;
let _M68K_INS_LEA = 276;;
let _M68K_INS_LINK = 277;;
let _M68K_INS_LPSTOP = 278;;
let _M68K_INS_LSL = 279;;
let _M68K_INS_LSR = 280;;
let _M68K_INS_MOVE = 281;;
let _M68K_INS_MOVEA = 282;;
let _M68K_INS_MOVEC = 283;;
let _M68K_INS_MOVEM = 284;;
let _M68K_INS_MOVEP = 285;;
let _M68K_INS_MOVEQ = 286;;
let _M68K_INS_MOVES = 287;;
let _M68K_INS_MOVE16 = 288;;
let _M68K_INS_MULS = 289;;
let _M68K_INS_MULU = 290;;
let _M68K_INS_NBCD = 291;;
let _M68K_INS_NEG = 292;;
let _M68K_INS_NEGX = 293;;
let _M68K_INS_NOP = 294;;
let _M68K_INS_NOT = 295;;
let _M68K_INS_OR = 296;;
let _M68K_INS_ORI = 297;;
let _M68K_INS_PACK = 298;;
let _M68K_INS_PEA = 299;;
let _M68K_INS_PFLUSH = 300;;
let _M68K_INS_PFLUSHA = 301;;
let _M68K_INS_PFLUSHAN = 302;;
let _M68K_INS_PFLUSHN = 303;;
let _M68K_INS_PLOADR = 304;;
let _M68K_INS_PLOADW = 305;;
let _M68K_INS_PLPAR = 306;;
let _M68K_INS_PLPAW = 307;;
let _M68K_INS_PMOVE = 308;;
let _M68K_INS_PMOVEFD = 309;;
let _M68K_INS_PTESTR = 310;;
let _M68K_INS_PTESTW = 311;;
let _M68K_INS_PULSE = 312;;
let _M68K_INS_REMS = 313;;
let _M68K_INS_REMU = 314;;
let _M68K_INS_RESET = 315;;
let _M68K_INS_ROL = 316;;
let _M68K_INS_ROR = 317;;
let _M68K_INS_ROXL = 318;;
let _M68K_INS_ROXR = 319;;
let _M68K_INS_RTD = 320;;
let _M68K_INS_RTE = 321;;
let _M68K_INS_RTM = 322;;
let _M68K_INS_RTR = 323;;
let _M68K_INS_RTS = 324;;
let _M68K_INS_SBCD = 325;;
let _M68K_INS_ST = 326;;
let _M68K_INS_SF = 327;;
let _M68K_INS_SHI = 328;;
let _M68K_INS_SLS = 329;;
let _M68K_INS_SCC = 330;;
let _M68K_INS_SHS = 331;;
let _M68K_INS_SCS = 332;;
let _M68K_INS_SLO = 333;;
let _M68K_INS_SNE = 334;;
let _M68K_INS_SEQ = 335;;
let _M68K_INS_SVC = 336;;
let _M68K_INS_SVS = 337;;
let _M68K_INS_SPL = 338;;
let _M68K_INS_SMI = 339;;
let _M68K_INS_SGE = 340;;
let _M68K_INS_SLT = 341;;
let _M68K_INS_SGT = 342;;
let _M68K_INS_SLE = 343;;
let _M68K_INS_STOP = 344;;
let _M68K_INS_SUB = 345;;
let _M68K_INS_SUBA = 346;;
let _M68K_INS_SUBI = 347;;
let _M68K_INS_SUBQ = 348;;
let _M68K_INS_SUBX = 349;;
let _M68K_INS_SWAP = 350;;
let _M68K_INS_TAS = 351;;
let _M68K_INS_TRAP = 352;;
let _M68K_INS_TRAPV = 353;;
let _M68K_INS_TRAPT = 354;;
let _M68K_INS_TRAPF = 355;;
let _M68K_INS_TRAPHI = 356;;
let _M68K_INS_TRAPLS = 357;;
let _M68K_INS_TRAPCC = 358;;
let _M68K_INS_TRAPHS = 359;;
let _M68K_INS_TRAPCS = 360;;
let _M68K_INS_TRAPLO = 361;;
let _M68K_INS_TRAPNE = 362;;
let _M68K_INS_TRAPEQ = 363;;
let _M68K_INS_TRAPVC = 364;;
let _M68K_INS_TRAPVS = 365;;
let _M68K_INS_TRAPPL = 366;;
let _M68K_INS_TRAPMI = 367;;
let _M68K_INS_TRAPGE = 368;;
let _M68K_INS_TRAPLT = 369;;
let _M68K_INS_TRAPGT = 370;;
let _M68K_INS_TRAPLE = 371;;
let _M68K_INS_TST = 372;;
let _M68K_INS_UNLK = 373;;
let _M68K_INS_UNPK = 374;;
let _M68K_INS_ENDING = 375;;
let _M68K_GRP_INVALID = 0;;
let _M68K_GRP_JUMP = 1;;
let _M68K_GRP_RET = 3;;
let _M68K_GRP_IRET = 5;;
let _M68K_GRP_BRANCH_RELATIVE = 7;;
let _M68K_GRP_ENDING = 8;;
external/capstone/bindings/ocaml/mips.ml
Vendored
+24
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@@ -0,0 +1,24 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Mips_const
(* architecture specific info of instruction *)
type mips_op_mem = {
base: int;
disp: int
}
type mips_op_value =
| MIPS_OP_INVALID of int
| MIPS_OP_REG of int
| MIPS_OP_IMM of int
| MIPS_OP_MEM of mips_op_mem
type mips_op = {
value: mips_op_value;
}
type cs_mips = {
operands: mips_op array;
}
external/capstone/bindings/ocaml/mips_const.ml
Vendored
+2182
View File
File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/ocaml.c
Vendored
+1104
View File
File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/ppc.ml
Vendored
+34
View File
@@ -0,0 +1,34 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Ppc_const
type ppc_op_mem = {
base: int;
disp: int;
}
type ppc_op_crx = {
scale: int;
reg: int;
cond: int;
}
type ppc_op_value =
| PPC_OP_INVALID of int
| PPC_OP_REG of int
| PPC_OP_IMM of int
| PPC_OP_MEM of ppc_op_mem
| PPC_OP_CRX of ppc_op_crx
type ppc_op = {
value: ppc_op_value;
}
type cs_ppc = {
bc: int;
bh: int;
update_cr0: bool;
operands: ppc_op array;
}
external/capstone/bindings/ocaml/ppc_const.ml
Vendored
+3237
View File
File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/sparc.ml
Vendored
+27
View File
@@ -0,0 +1,27 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Sparc_const
type sparc_op_mem = {
base: int;
index: int;
disp: int;
}
type sparc_op_value =
| SPARC_OP_INVALID of int
| SPARC_OP_REG of int
| SPARC_OP_IMM of int
| SPARC_OP_MEM of sparc_op_mem
type sparc_op = {
value: sparc_op_value;
}
type cs_sparc = {
cc: int;
hint: int;
operands: sparc_op array;
}
external/capstone/bindings/ocaml/sparc_const.ml
Vendored
+430
View File
@@ -0,0 +1,430 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.ml] *)
let _SPARC_CC_INVALID = 0;;
let _SPARC_CC_ICC_A = 8+256;;
let _SPARC_CC_ICC_N = 0+256;;
let _SPARC_CC_ICC_NE = 9+256;;
let _SPARC_CC_ICC_E = 1+256;;
let _SPARC_CC_ICC_G = 10+256;;
let _SPARC_CC_ICC_LE = 2+256;;
let _SPARC_CC_ICC_GE = 11+256;;
let _SPARC_CC_ICC_L = 3+256;;
let _SPARC_CC_ICC_GU = 12+256;;
let _SPARC_CC_ICC_LEU = 4+256;;
let _SPARC_CC_ICC_CC = 13+256;;
let _SPARC_CC_ICC_CS = 5+256;;
let _SPARC_CC_ICC_POS = 14+256;;
let _SPARC_CC_ICC_NEG = 6+256;;
let _SPARC_CC_ICC_VC = 15+256;;
let _SPARC_CC_ICC_VS = 7+256;;
let _SPARC_CC_FCC_A = 8+16+256;;
let _SPARC_CC_FCC_N = 0+16+256;;
let _SPARC_CC_FCC_U = 7+16+256;;
let _SPARC_CC_FCC_G = 6+16+256;;
let _SPARC_CC_FCC_UG = 5+16+256;;
let _SPARC_CC_FCC_L = 4+16+256;;
let _SPARC_CC_FCC_UL = 3+16+256;;
let _SPARC_CC_FCC_LG = 2+16+256;;
let _SPARC_CC_FCC_NE = 1+16+256;;
let _SPARC_CC_FCC_E = 9+16+256;;
let _SPARC_CC_FCC_UE = 10+16+256;;
let _SPARC_CC_FCC_GE = 11+16+256;;
let _SPARC_CC_FCC_UGE = 12+16+256;;
let _SPARC_CC_FCC_LE = 13+16+256;;
let _SPARC_CC_FCC_ULE = 14+16+256;;
let _SPARC_CC_FCC_O = 15+16+256;;
let _SPARC_HINT_INVALID = 0;;
let _SPARC_HINT_A = 1 lsl 0;;
let _SPARC_HINT_PT = 1 lsl 1;;
let _SPARC_HINT_PN = 1 lsl 2;;
let _SPARC_HINT_A_PN = _SPARC_HINT_A lor SPARC_HINT_PN;;
let _SPARC_HINT_A_PT = _SPARC_HINT_A lor SPARC_HINT_PT;;
let _SPARC_OP_INVALID = _CS_OP_INVALID;;
let _SPARC_OP_REG = _CS_OP_REG;;
let _SPARC_OP_IMM = _CS_OP_IMM;;
let _SPARC_OP_MEM = _CS_OP_MEM;;
let _SPARC_REG_INVALID = 0;;
let _SPARC_REG_F0 = 1;;
let _SPARC_REG_F1 = 2;;
let _SPARC_REG_F2 = 3;;
let _SPARC_REG_F3 = 4;;
let _SPARC_REG_F4 = 5;;
let _SPARC_REG_F5 = 6;;
let _SPARC_REG_F6 = 7;;
let _SPARC_REG_F7 = 8;;
let _SPARC_REG_F8 = 9;;
let _SPARC_REG_F9 = 10;;
let _SPARC_REG_F10 = 11;;
let _SPARC_REG_F11 = 12;;
let _SPARC_REG_F12 = 13;;
let _SPARC_REG_F13 = 14;;
let _SPARC_REG_F14 = 15;;
let _SPARC_REG_F15 = 16;;
let _SPARC_REG_F16 = 17;;
let _SPARC_REG_F17 = 18;;
let _SPARC_REG_F18 = 19;;
let _SPARC_REG_F19 = 20;;
let _SPARC_REG_F20 = 21;;
let _SPARC_REG_F21 = 22;;
let _SPARC_REG_F22 = 23;;
let _SPARC_REG_F23 = 24;;
let _SPARC_REG_F24 = 25;;
let _SPARC_REG_F25 = 26;;
let _SPARC_REG_F26 = 27;;
let _SPARC_REG_F27 = 28;;
let _SPARC_REG_F28 = 29;;
let _SPARC_REG_F29 = 30;;
let _SPARC_REG_F30 = 31;;
let _SPARC_REG_F31 = 32;;
let _SPARC_REG_F32 = 33;;
let _SPARC_REG_F34 = 34;;
let _SPARC_REG_F36 = 35;;
let _SPARC_REG_F38 = 36;;
let _SPARC_REG_F40 = 37;;
let _SPARC_REG_F42 = 38;;
let _SPARC_REG_F44 = 39;;
let _SPARC_REG_F46 = 40;;
let _SPARC_REG_F48 = 41;;
let _SPARC_REG_F50 = 42;;
let _SPARC_REG_F52 = 43;;
let _SPARC_REG_F54 = 44;;
let _SPARC_REG_F56 = 45;;
let _SPARC_REG_F58 = 46;;
let _SPARC_REG_F60 = 47;;
let _SPARC_REG_F62 = 48;;
let _SPARC_REG_FCC0 = 49;;
let _SPARC_REG_FCC1 = 50;;
let _SPARC_REG_FCC2 = 51;;
let _SPARC_REG_FCC3 = 52;;
let _SPARC_REG_FP = 53;;
let _SPARC_REG_G0 = 54;;
let _SPARC_REG_G1 = 55;;
let _SPARC_REG_G2 = 56;;
let _SPARC_REG_G3 = 57;;
let _SPARC_REG_G4 = 58;;
let _SPARC_REG_G5 = 59;;
let _SPARC_REG_G6 = 60;;
let _SPARC_REG_G7 = 61;;
let _SPARC_REG_I0 = 62;;
let _SPARC_REG_I1 = 63;;
let _SPARC_REG_I2 = 64;;
let _SPARC_REG_I3 = 65;;
let _SPARC_REG_I4 = 66;;
let _SPARC_REG_I5 = 67;;
let _SPARC_REG_I7 = 68;;
let _SPARC_REG_ICC = 69;;
let _SPARC_REG_L0 = 70;;
let _SPARC_REG_L1 = 71;;
let _SPARC_REG_L2 = 72;;
let _SPARC_REG_L3 = 73;;
let _SPARC_REG_L4 = 74;;
let _SPARC_REG_L5 = 75;;
let _SPARC_REG_L6 = 76;;
let _SPARC_REG_L7 = 77;;
let _SPARC_REG_O0 = 78;;
let _SPARC_REG_O1 = 79;;
let _SPARC_REG_O2 = 80;;
let _SPARC_REG_O3 = 81;;
let _SPARC_REG_O4 = 82;;
let _SPARC_REG_O5 = 83;;
let _SPARC_REG_O7 = 84;;
let _SPARC_REG_SP = 85;;
let _SPARC_REG_Y = 86;;
let _SPARC_REG_XCC = 87;;
let _SPARC_REG_ENDING = 88;;
let _SPARC_REG_O6 = _SPARC_REG_SP;;
let _SPARC_REG_I6 = _SPARC_REG_FP;;
let _SPARC_INS_INVALID = 0;;
let _SPARC_INS_ADDCC = 1;;
let _SPARC_INS_ADDX = 2;;
let _SPARC_INS_ADDXCC = 3;;
let _SPARC_INS_ADDXC = 4;;
let _SPARC_INS_ADDXCCC = 5;;
let _SPARC_INS_ADD = 6;;
let _SPARC_INS_ALIGNADDR = 7;;
let _SPARC_INS_ALIGNADDRL = 8;;
let _SPARC_INS_ANDCC = 9;;
let _SPARC_INS_ANDNCC = 10;;
let _SPARC_INS_ANDN = 11;;
let _SPARC_INS_AND = 12;;
let _SPARC_INS_ARRAY16 = 13;;
let _SPARC_INS_ARRAY32 = 14;;
let _SPARC_INS_ARRAY8 = 15;;
let _SPARC_INS_B = 16;;
let _SPARC_INS_JMP = 17;;
let _SPARC_INS_BMASK = 18;;
let _SPARC_INS_FB = 19;;
let _SPARC_INS_BRGEZ = 20;;
let _SPARC_INS_BRGZ = 21;;
let _SPARC_INS_BRLEZ = 22;;
let _SPARC_INS_BRLZ = 23;;
let _SPARC_INS_BRNZ = 24;;
let _SPARC_INS_BRZ = 25;;
let _SPARC_INS_BSHUFFLE = 26;;
let _SPARC_INS_CALL = 27;;
let _SPARC_INS_CASX = 28;;
let _SPARC_INS_CAS = 29;;
let _SPARC_INS_CMASK16 = 30;;
let _SPARC_INS_CMASK32 = 31;;
let _SPARC_INS_CMASK8 = 32;;
let _SPARC_INS_CMP = 33;;
let _SPARC_INS_EDGE16 = 34;;
let _SPARC_INS_EDGE16L = 35;;
let _SPARC_INS_EDGE16LN = 36;;
let _SPARC_INS_EDGE16N = 37;;
let _SPARC_INS_EDGE32 = 38;;
let _SPARC_INS_EDGE32L = 39;;
let _SPARC_INS_EDGE32LN = 40;;
let _SPARC_INS_EDGE32N = 41;;
let _SPARC_INS_EDGE8 = 42;;
let _SPARC_INS_EDGE8L = 43;;
let _SPARC_INS_EDGE8LN = 44;;
let _SPARC_INS_EDGE8N = 45;;
let _SPARC_INS_FABSD = 46;;
let _SPARC_INS_FABSQ = 47;;
let _SPARC_INS_FABSS = 48;;
let _SPARC_INS_FADDD = 49;;
let _SPARC_INS_FADDQ = 50;;
let _SPARC_INS_FADDS = 51;;
let _SPARC_INS_FALIGNDATA = 52;;
let _SPARC_INS_FAND = 53;;
let _SPARC_INS_FANDNOT1 = 54;;
let _SPARC_INS_FANDNOT1S = 55;;
let _SPARC_INS_FANDNOT2 = 56;;
let _SPARC_INS_FANDNOT2S = 57;;
let _SPARC_INS_FANDS = 58;;
let _SPARC_INS_FCHKSM16 = 59;;
let _SPARC_INS_FCMPD = 60;;
let _SPARC_INS_FCMPEQ16 = 61;;
let _SPARC_INS_FCMPEQ32 = 62;;
let _SPARC_INS_FCMPGT16 = 63;;
let _SPARC_INS_FCMPGT32 = 64;;
let _SPARC_INS_FCMPLE16 = 65;;
let _SPARC_INS_FCMPLE32 = 66;;
let _SPARC_INS_FCMPNE16 = 67;;
let _SPARC_INS_FCMPNE32 = 68;;
let _SPARC_INS_FCMPQ = 69;;
let _SPARC_INS_FCMPS = 70;;
let _SPARC_INS_FDIVD = 71;;
let _SPARC_INS_FDIVQ = 72;;
let _SPARC_INS_FDIVS = 73;;
let _SPARC_INS_FDMULQ = 74;;
let _SPARC_INS_FDTOI = 75;;
let _SPARC_INS_FDTOQ = 76;;
let _SPARC_INS_FDTOS = 77;;
let _SPARC_INS_FDTOX = 78;;
let _SPARC_INS_FEXPAND = 79;;
let _SPARC_INS_FHADDD = 80;;
let _SPARC_INS_FHADDS = 81;;
let _SPARC_INS_FHSUBD = 82;;
let _SPARC_INS_FHSUBS = 83;;
let _SPARC_INS_FITOD = 84;;
let _SPARC_INS_FITOQ = 85;;
let _SPARC_INS_FITOS = 86;;
let _SPARC_INS_FLCMPD = 87;;
let _SPARC_INS_FLCMPS = 88;;
let _SPARC_INS_FLUSHW = 89;;
let _SPARC_INS_FMEAN16 = 90;;
let _SPARC_INS_FMOVD = 91;;
let _SPARC_INS_FMOVQ = 92;;
let _SPARC_INS_FMOVRDGEZ = 93;;
let _SPARC_INS_FMOVRQGEZ = 94;;
let _SPARC_INS_FMOVRSGEZ = 95;;
let _SPARC_INS_FMOVRDGZ = 96;;
let _SPARC_INS_FMOVRQGZ = 97;;
let _SPARC_INS_FMOVRSGZ = 98;;
let _SPARC_INS_FMOVRDLEZ = 99;;
let _SPARC_INS_FMOVRQLEZ = 100;;
let _SPARC_INS_FMOVRSLEZ = 101;;
let _SPARC_INS_FMOVRDLZ = 102;;
let _SPARC_INS_FMOVRQLZ = 103;;
let _SPARC_INS_FMOVRSLZ = 104;;
let _SPARC_INS_FMOVRDNZ = 105;;
let _SPARC_INS_FMOVRQNZ = 106;;
let _SPARC_INS_FMOVRSNZ = 107;;
let _SPARC_INS_FMOVRDZ = 108;;
let _SPARC_INS_FMOVRQZ = 109;;
let _SPARC_INS_FMOVRSZ = 110;;
let _SPARC_INS_FMOVS = 111;;
let _SPARC_INS_FMUL8SUX16 = 112;;
let _SPARC_INS_FMUL8ULX16 = 113;;
let _SPARC_INS_FMUL8X16 = 114;;
let _SPARC_INS_FMUL8X16AL = 115;;
let _SPARC_INS_FMUL8X16AU = 116;;
let _SPARC_INS_FMULD = 117;;
let _SPARC_INS_FMULD8SUX16 = 118;;
let _SPARC_INS_FMULD8ULX16 = 119;;
let _SPARC_INS_FMULQ = 120;;
let _SPARC_INS_FMULS = 121;;
let _SPARC_INS_FNADDD = 122;;
let _SPARC_INS_FNADDS = 123;;
let _SPARC_INS_FNAND = 124;;
let _SPARC_INS_FNANDS = 125;;
let _SPARC_INS_FNEGD = 126;;
let _SPARC_INS_FNEGQ = 127;;
let _SPARC_INS_FNEGS = 128;;
let _SPARC_INS_FNHADDD = 129;;
let _SPARC_INS_FNHADDS = 130;;
let _SPARC_INS_FNOR = 131;;
let _SPARC_INS_FNORS = 132;;
let _SPARC_INS_FNOT1 = 133;;
let _SPARC_INS_FNOT1S = 134;;
let _SPARC_INS_FNOT2 = 135;;
let _SPARC_INS_FNOT2S = 136;;
let _SPARC_INS_FONE = 137;;
let _SPARC_INS_FONES = 138;;
let _SPARC_INS_FOR = 139;;
let _SPARC_INS_FORNOT1 = 140;;
let _SPARC_INS_FORNOT1S = 141;;
let _SPARC_INS_FORNOT2 = 142;;
let _SPARC_INS_FORNOT2S = 143;;
let _SPARC_INS_FORS = 144;;
let _SPARC_INS_FPACK16 = 145;;
let _SPARC_INS_FPACK32 = 146;;
let _SPARC_INS_FPACKFIX = 147;;
let _SPARC_INS_FPADD16 = 148;;
let _SPARC_INS_FPADD16S = 149;;
let _SPARC_INS_FPADD32 = 150;;
let _SPARC_INS_FPADD32S = 151;;
let _SPARC_INS_FPADD64 = 152;;
let _SPARC_INS_FPMERGE = 153;;
let _SPARC_INS_FPSUB16 = 154;;
let _SPARC_INS_FPSUB16S = 155;;
let _SPARC_INS_FPSUB32 = 156;;
let _SPARC_INS_FPSUB32S = 157;;
let _SPARC_INS_FQTOD = 158;;
let _SPARC_INS_FQTOI = 159;;
let _SPARC_INS_FQTOS = 160;;
let _SPARC_INS_FQTOX = 161;;
let _SPARC_INS_FSLAS16 = 162;;
let _SPARC_INS_FSLAS32 = 163;;
let _SPARC_INS_FSLL16 = 164;;
let _SPARC_INS_FSLL32 = 165;;
let _SPARC_INS_FSMULD = 166;;
let _SPARC_INS_FSQRTD = 167;;
let _SPARC_INS_FSQRTQ = 168;;
let _SPARC_INS_FSQRTS = 169;;
let _SPARC_INS_FSRA16 = 170;;
let _SPARC_INS_FSRA32 = 171;;
let _SPARC_INS_FSRC1 = 172;;
let _SPARC_INS_FSRC1S = 173;;
let _SPARC_INS_FSRC2 = 174;;
let _SPARC_INS_FSRC2S = 175;;
let _SPARC_INS_FSRL16 = 176;;
let _SPARC_INS_FSRL32 = 177;;
let _SPARC_INS_FSTOD = 178;;
let _SPARC_INS_FSTOI = 179;;
let _SPARC_INS_FSTOQ = 180;;
let _SPARC_INS_FSTOX = 181;;
let _SPARC_INS_FSUBD = 182;;
let _SPARC_INS_FSUBQ = 183;;
let _SPARC_INS_FSUBS = 184;;
let _SPARC_INS_FXNOR = 185;;
let _SPARC_INS_FXNORS = 186;;
let _SPARC_INS_FXOR = 187;;
let _SPARC_INS_FXORS = 188;;
let _SPARC_INS_FXTOD = 189;;
let _SPARC_INS_FXTOQ = 190;;
let _SPARC_INS_FXTOS = 191;;
let _SPARC_INS_FZERO = 192;;
let _SPARC_INS_FZEROS = 193;;
let _SPARC_INS_JMPL = 194;;
let _SPARC_INS_LDD = 195;;
let _SPARC_INS_LD = 196;;
let _SPARC_INS_LDQ = 197;;
let _SPARC_INS_LDSB = 198;;
let _SPARC_INS_LDSH = 199;;
let _SPARC_INS_LDSW = 200;;
let _SPARC_INS_LDUB = 201;;
let _SPARC_INS_LDUH = 202;;
let _SPARC_INS_LDX = 203;;
let _SPARC_INS_LZCNT = 204;;
let _SPARC_INS_MEMBAR = 205;;
let _SPARC_INS_MOVDTOX = 206;;
let _SPARC_INS_MOV = 207;;
let _SPARC_INS_MOVRGEZ = 208;;
let _SPARC_INS_MOVRGZ = 209;;
let _SPARC_INS_MOVRLEZ = 210;;
let _SPARC_INS_MOVRLZ = 211;;
let _SPARC_INS_MOVRNZ = 212;;
let _SPARC_INS_MOVRZ = 213;;
let _SPARC_INS_MOVSTOSW = 214;;
let _SPARC_INS_MOVSTOUW = 215;;
let _SPARC_INS_MULX = 216;;
let _SPARC_INS_NOP = 217;;
let _SPARC_INS_ORCC = 218;;
let _SPARC_INS_ORNCC = 219;;
let _SPARC_INS_ORN = 220;;
let _SPARC_INS_OR = 221;;
let _SPARC_INS_PDIST = 222;;
let _SPARC_INS_PDISTN = 223;;
let _SPARC_INS_POPC = 224;;
let _SPARC_INS_RD = 225;;
let _SPARC_INS_RESTORE = 226;;
let _SPARC_INS_RETT = 227;;
let _SPARC_INS_SAVE = 228;;
let _SPARC_INS_SDIVCC = 229;;
let _SPARC_INS_SDIVX = 230;;
let _SPARC_INS_SDIV = 231;;
let _SPARC_INS_SETHI = 232;;
let _SPARC_INS_SHUTDOWN = 233;;
let _SPARC_INS_SIAM = 234;;
let _SPARC_INS_SLLX = 235;;
let _SPARC_INS_SLL = 236;;
let _SPARC_INS_SMULCC = 237;;
let _SPARC_INS_SMUL = 238;;
let _SPARC_INS_SRAX = 239;;
let _SPARC_INS_SRA = 240;;
let _SPARC_INS_SRLX = 241;;
let _SPARC_INS_SRL = 242;;
let _SPARC_INS_STBAR = 243;;
let _SPARC_INS_STB = 244;;
let _SPARC_INS_STD = 245;;
let _SPARC_INS_ST = 246;;
let _SPARC_INS_STH = 247;;
let _SPARC_INS_STQ = 248;;
let _SPARC_INS_STX = 249;;
let _SPARC_INS_SUBCC = 250;;
let _SPARC_INS_SUBX = 251;;
let _SPARC_INS_SUBXCC = 252;;
let _SPARC_INS_SUB = 253;;
let _SPARC_INS_SWAP = 254;;
let _SPARC_INS_TADDCCTV = 255;;
let _SPARC_INS_TADDCC = 256;;
let _SPARC_INS_T = 257;;
let _SPARC_INS_TSUBCCTV = 258;;
let _SPARC_INS_TSUBCC = 259;;
let _SPARC_INS_UDIVCC = 260;;
let _SPARC_INS_UDIVX = 261;;
let _SPARC_INS_UDIV = 262;;
let _SPARC_INS_UMULCC = 263;;
let _SPARC_INS_UMULXHI = 264;;
let _SPARC_INS_UMUL = 265;;
let _SPARC_INS_UNIMP = 266;;
let _SPARC_INS_FCMPED = 267;;
let _SPARC_INS_FCMPEQ = 268;;
let _SPARC_INS_FCMPES = 269;;
let _SPARC_INS_WR = 270;;
let _SPARC_INS_XMULX = 271;;
let _SPARC_INS_XMULXHI = 272;;
let _SPARC_INS_XNORCC = 273;;
let _SPARC_INS_XNOR = 274;;
let _SPARC_INS_XORCC = 275;;
let _SPARC_INS_XOR = 276;;
let _SPARC_INS_RET = 277;;
let _SPARC_INS_RETL = 278;;
let _SPARC_INS_ENDING = 279;;
let _SPARC_GRP_INVALID = 0;;
let _SPARC_GRP_JUMP = 1;;
let _SPARC_GRP_HARDQUAD = 128;;
let _SPARC_GRP_V9 = 129;;
let _SPARC_GRP_VIS = 130;;
let _SPARC_GRP_VIS2 = 131;;
let _SPARC_GRP_VIS3 = 132;;
let _SPARC_GRP_32BIT = 133;;
let _SPARC_GRP_64BIT = 134;;
let _SPARC_GRP_ENDING = 135;;
external/capstone/bindings/ocaml/systemz.ml
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+27
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@@ -0,0 +1,27 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Sysz_const
type sysz_op_mem = {
base: int;
index: int;
length: int64;
disp: int64;
}
type sysz_op_value =
| SYSZ_OP_INVALID of int
| SYSZ_OP_REG of int
| SYSZ_OP_ACREG of int
| SYSZ_OP_IMM of int
| SYSZ_OP_MEM of sysz_op_mem
type sysz_op = {
value: sysz_op_value;
}
type cs_sysz = {
cc: int;
operands: sysz_op array;
}
external/capstone/bindings/ocaml/systemz_const.ml
Vendored
+2903
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File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/sysz_const.ml
Vendored
+2523
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File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/test_arm.ml
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+105
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Arm
open Arm_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\xd1\xe8\x00\xf0\xf0\x24\x04\x07\x1f\x3c\xf2\xc0\x00\x00\x4f\xf0\x00\x01\x46\x6c";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68\x1f\xb1";;
let all_tests = [
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM");
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "Thumb");
(CS_ARCH_ARM, [CS_MODE_THUMB], _ARM_CODE2, "Thumb-mixed");
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "Thumb-2");
];;
let print_op handle i op =
( match op.value with
| ARM_OP_INVALID _ -> (); (* this would never happens *)
| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm;
| ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
if mem.lshift != 0 then
printf "\t\t\toperands[%u].mem.lshift: 0x%x\n" i mem.lshift;
);
| ARM_OP_SETEND sd -> printf "\t\top[%d]: SETEND = %u\n" i sd;
);
if op.shift.shift_type != _ARM_SFT_INVALID && op.shift.shift_value > 0 then
printf "\t\t\tShift: type = %u, value = %u\n"
op.shift.shift_type op.shift.shift_value;
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM arm -> (
if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
printf "\tCode condition: %u\n" arm.cc;
if arm.update_flags then
printf "\tUpdate-flags: True\n";
if arm.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm.operands);
Array.iteri (print_op handle) arm.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_arm64.ml
Vendored
+101
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Arm64
open Arm64_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9\x20\x04\x81\xda\x20\x08\x02\x8b";;
let all_tests = [
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64");
];;
let print_op handle i op =
( match op.value with
| ARM64_OP_INVALID _ -> (); (* this would never happens *)
| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
| ARM64_OP_REG_MRS reg -> printf "\t\top[%d]: REG_MRS = %u\n" i reg;
| ARM64_OP_REG_MSR reg -> printf "\t\top[%d]: REG_MSR = %u\n" i reg;
| ARM64_OP_PSTATE v -> printf "\t\top[%d]: PSTATE = %u\n" i v;
| ARM64_OP_SYS v -> printf "\t\top[%d]: SYS = %u\n" i v;
| ARM64_OP_PREFETCH v -> printf "\t\top[%d]: PREFETCH = %u\n" i v;
| ARM64_OP_BARRIER v -> printf "\t\top[%d]: BARRIER = %u\n" i v;
);
if op.shift.shift_type != _ARM64_SFT_INVALID && op.shift.shift_value > 0 then
printf "\t\t\tShift: type = %u, value = %u\n"
op.shift.shift_type op.shift.shift_value;
if op.ext != _ARM64_EXT_INVALID then
printf "\t\t\tExt: %u\n" op.ext;
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM64 arm64 -> (
if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
printf "\tCode condition: %u\n" arm64.cc;
if arm64.update_flags then
printf "\tUpdate-flags: True\n";
if arm64.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm64.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm64.operands);
Array.iteri (print_op handle) arm64.operands;
);
printf "\n";
)
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_basic.ml
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+67
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open List
open Capstone
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L);
];;
let print_insn insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;;
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter print_insn insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_detail.ml
Vendored
+87
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@@ -0,0 +1,87 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open List
open Capstone
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let _ARM_CODE = "\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3";;
let _ARM_CODE2 = "\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3";;
let _THUMB_CODE = "\x70\x47\xeb\x46\x83\xb0\xc9\x68";;
let _THUMB_CODE2 = "\x4f\xf0\x00\x01\xbd\xe8\x00\x88";;
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let _ARM64_CODE = "\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9";;
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0);
];;
let print_detail handle insn =
(* print immediate operands *)
if (Array.length insn.regs_read) > 0 then begin
printf "\tImplicit registers read: ";
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read;
printf "\n";
end;
if (Array.length insn.regs_write) > 0 then begin
printf "\tImplicit registers written: ";
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write;
printf "\n";
end;
if (Array.length insn.groups) > 0 then begin
printf "\tThis instruction belongs to groups: ";
Array.iter (printf "%u ") insn.groups;
printf "\n";
end;
printf "\n";;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_m680x.ml
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+167
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(* Capstone Disassembly Engine
* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 *)
open Printf
open Capstone
open M680x
open M680x_const
let print_char_hex ch =
printf " 0x%02x" (Char.code ch)
let print_int_hex_short value =
printf "%02x" value
let print_string_hex comment str =
printf "%s" comment;
String.iter print_char_hex str;
printf "\n"
let print_array_hex_short arr =
Array.iter print_int_hex_short arr
let s_access = [
"UNCHANGED"; "READ"; "WRITE"; "READ | WRITE" ];;
let _M6800_CODE = "\x01\x09\x36\x64\x7f\x74\x10\x00\x90\x10\xA4\x10\xb6\x10\x00\x39";;
let _M6801_CODE = "\x04\x05\x3c\x3d\x38\x93\x10\xec\x10\xed\x10\x39";;
let _M6805_CODE = "\x04\x7f\x00\x17\x22\x28\x00\x2e\x00\x40\x42\x5a\x70\x8e\x97\x9c\xa0\x15\xad\x00\xc3\x10\x00\xda\x12\x34\xe5\x7f\xfe";;
let _M6808_CODE = "\x31\x22\x00\x35\x22\x45\x10\x00\x4b\x00\x51\x10\x52\x5e\x22\x62\x65\x12\x34\x72\x84\x85\x86\x87\x8a\x8b\x8c\x94\x95\xa7\x10\xaf\x10\x9e\x60\x7f\x9e\x6b\x7f\x00\x9e\xd6\x10\x00\x9e\xe6\x7f";;
let _HD6301_CODE = "\x6b\x10\x00\x71\x10\x00\x72\x10\x10\x39";;
let _M6809_CODE = "\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39\xA6\x07\xA6\x27\xA6\x47\xA6\x67\xA6\x0F\xA6\x10\xA6\x80\xA6\x81\xA6\x82\xA6\x83\xA6\x84\xA6\x85\xA6\x86\xA6\x88\x7F\xA6\x88\x80\xA6\x89\x7F\xFF\xA6\x89\x80\x00\xA6\x8B\xA6\x8C\x10\xA6\x8D\x10\x00\xA6\x91\xA6\x93\xA6\x94\xA6\x95\xA6\x96\xA6\x98\x7F\xA6\x98\x80\xA6\x99\x7F\xFF\xA6\x99\x80\x00\xA6\x9B\xA6\x9C\x10\xA6\x9D\x10\x00\xA6\x9F\x10\x00";;
let _HD6309_CODE = "\x01\x10\x10\x62\x10\x10\x7b\x10\x10\x00\xcd\x49\x96\x02\xd2\x10\x30\x23\x10\x38\x10\x3b\x10\x53\x10\x5d\x11\x30\x43\x10\x11\x37\x25\x10\x11\x38\x12\x11\x39\x23\x11\x3b\x34\x11\x8e\x10\x00\x11\xaf\x10\x11\xab\x10\x11\xf6\x80\x00";;
let _M6811_CODE = "\x02\x03\x12\x7f\x10\x00\x13\x99\x08\x00\x14\x7f\x02\x15\x7f\x01\x1e\x7f\x20\x00\x8f\xcf\x18\x08\x18\x30\x18\x3c\x18\x67\x18\x8c\x10\x00\x18\x8f\x18\xce\x10\x00\x18\xff\x10\x00\x1a\xa3\x7f\x1a\xac\x1a\xee\x7f\x1a\xef\x7f\xcd\xac\x7f";;
let _CPU12_CODE = "\x00\x04\x01\x00\x0c\x00\x80\x0e\x00\x80\x00\x11\x1e\x10\x00\x80\x00\x3b\x4a\x10\x00\x04\x4b\x01\x04\x4f\x7f\x80\x00\x8f\x10\x00\xb7\x52\xb7\xb1\xa6\x67\xa6\xfe\xa6\xf7\x18\x02\xe2\x30\x39\xe2\x10\x00\x18\x0c\x30\x39\x10\x00\x18\x11\x18\x12\x10\x00\x18\x19\x00\x18\x1e\x00\x18\x3e\x18\x3f\x00";;
let _HCS08_CODE = "\x32\x10\x00\x9e\xae\x9e\xce\x7f\x9e\xbe\x10\x00\x9e\xfe\x7f\x3e\x10\x00\x9e\xf3\x7f\x96\x10\x00\x9e\xff\x7f\x82";;
let bit_set value mask =
value land mask != 0
let all_tests = [
(CS_ARCH_M680X, [CS_MODE_M680X_6301], _HD6301_CODE, "M680X_HD6301");
(CS_ARCH_M680X, [CS_MODE_M680X_6309], _HD6309_CODE, "M680X_HD6309");
(CS_ARCH_M680X, [CS_MODE_M680X_6800], _M6800_CODE, "M680X_M6800");
(CS_ARCH_M680X, [CS_MODE_M680X_6801], _M6801_CODE, "M680X_M6801");
(CS_ARCH_M680X, [CS_MODE_M680X_6805], _M6805_CODE, "M680X_M68HC05");
(CS_ARCH_M680X, [CS_MODE_M680X_6808], _M6808_CODE, "M680X_M68HC08");
(CS_ARCH_M680X, [CS_MODE_M680X_6809], _M6809_CODE, "M680X_M6809");
(CS_ARCH_M680X, [CS_MODE_M680X_6811], _M6811_CODE, "M680X_M68HC11");
(CS_ARCH_M680X, [CS_MODE_M680X_CPU12], _CPU12_CODE, "M680X_CPU12");
(CS_ARCH_M680X, [CS_MODE_M680X_HCS08], _HCS08_CODE, "M680X_HCS08");
];;
let print_inc_dec inc_dec is_post = (
printf "\t\t\t";
if is_post then printf "post" else printf "pre";
if inc_dec > 0 then
printf " increment: %d\n" inc_dec
else
printf " decrement: %d\n" (abs inc_dec);
);
();;
let print_op handle flags i op =
( match op.value with
| M680X_OP_INVALID _ -> (); (* this would never happens *)
| M680X_OP_REGISTER reg -> (
printf "\t\toperands[%d].type: REGISTER = %s" i (cs_reg_name handle reg);
if (((i == 0) && (bit_set flags _M680X_FIRST_OP_IN_MNEM)) ||
((i == 1) && (bit_set flags _M680X_SECOND_OP_IN_MNEM))) then
printf " (in mnemonic)";
printf "\n";
);
| M680X_OP_IMMEDIATE imm ->
printf "\t\toperands[%d].type: IMMEDIATE = #%d\n" i imm;
| M680X_OP_DIRECT direct_addr ->
printf "\t\toperands[%d].type: DIRECT = 0x%02x\n" i direct_addr;
| M680X_OP_EXTENDED ext -> (
printf "\t\toperands[%d].type: EXTENDED " i;
if ext.indirect then
printf "INDIRECT";
printf " = 0x%04x\n" ext.addr_ext;
);
| M680X_OP_RELATIVE rel ->
printf "\t\toperands[%d].type: RELATIVE = 0x%04x\n" i rel.addr_rel;
| M680X_OP_INDEXED idx -> (
printf "\t\toperands[%d].type: INDEXED" i;
if (bit_set idx.flags _M680X_IDX_INDIRECT) then
printf " INDIRECT";
printf "\n";
if idx.base_reg != _M680X_REG_INVALID then
printf "\t\t\tbase register: %s\n" (cs_reg_name handle idx.base_reg);
if idx.offset_reg != _M680X_REG_INVALID then
printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg);
if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin
printf "\t\t\toffset: %d\n" idx.offset;
if idx.base_reg == _M680X_REG_PC then
printf "\t\t\toffset address: 0x%x\n" idx.offset_addr;
printf "\t\t\toffset bits: %u\n" idx.offset_bits;
end;
if idx.inc_dec != 0 then
print_inc_dec idx.inc_dec (bit_set idx.flags _M680X_IDX_POST_INC_DEC);
);
| M680X_OP_CONSTANT const_val ->
printf "\t\toperands[%d].type: CONSTANT = %d\n" i const_val;
);
if op.size != 0 then
printf "\t\t\tsize: %d\n" op.size;
if op.access != _CS_AC_INVALID then
printf "\t\t\taccess: %s\n" (List.nth s_access op.access);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_M680X m680x -> (
(* print all operands info (type & value) *)
if (Array.length m680x.operands) > 0 then (
printf "\top_count: %d\n" (Array.length m680x.operands);
Array.iteri (print_op handle m680x.flags) m680x.operands;
);
);
| _ -> ();
;;
let print_reg handle reg =
printf " %s" (cs_reg_name handle reg)
let print_insn handle insn =
printf "0x%04x:\t" insn.address;
print_array_hex_short insn.bytes;
printf "\t%s\t%s\n" insn.mnemonic insn.op_str;
print_detail handle insn;
if (Array.length insn.regs_read) > 0 then begin
printf "\tRegisters read:";
Array.iter (print_reg handle) insn.regs_read;
printf "\n";
end;
if (Array.length insn.regs_write) > 0 then begin
printf "\tRegisters modified:";
Array.iter (print_reg handle) insn.regs_write;
printf "\n";
end;
if (Array.length insn.groups) > 0 then
printf "\tgroups_count: %d\n" (Array.length insn.groups);
printf "\n"
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "********************\n";
printf "Platform: %s\n" comment;
print_string_hex "Code: " code;
printf "Disasm:\n";
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_mips.ml
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+75
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(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open Mips
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56";;
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let all_tests = [
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
];;
let print_op handle i op =
( match op.value with
| MIPS_OP_INVALID _ -> (); (* this would never happens *)
| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_MIPS mips -> (
(* print all operands info (type & value) *)
if (Array.length mips.operands) > 0 then (
printf "\top_count: %d\n" (Array.length mips.operands);
Array.iteri (print_op handle) mips.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_ppc.ml
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+81
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Ppc
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _PPC_CODE = "\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21";;
let all_tests = [
(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64");
];;
let print_op handle i op =
( match op.value with
| PPC_OP_INVALID _ -> (); (* this would never happens *)
| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
| PPC_OP_CRX crx -> ( printf "\t\top[%d]: CRX\n" i;
if crx.scale != 0 then
printf "\t\t\toperands[%u].crx.scale = %u\n" i crx.scale;
if crx.reg != 0 then
printf "\t\t\toperands[%u].crx.reg = %s\n" i (cs_reg_name handle crx.reg);
if crx.cond != 0 then
printf "\t\t\toperands[%u].crx.cond = 0x%x\n" i crx.cond;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_PPC ppc -> (
(* print all operands info (type & value) *)
if (Array.length ppc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length ppc.operands);
Array.iteri (print_op handle) ppc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_sparc.ml
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+79
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Sparc
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _SPARC_CODE = "\x80\xa0\x40\x02\x85\xc2\x60\x08\x85\xe8\x20\x01\x81\xe8\x00\x00\x90\x10\x20\x01\xd5\xf6\x10\x16\x21\x00\x00\x0a\x86\x00\x40\x02\x01\x00\x00\x00\x12\xbf\xff\xff\x10\xbf\xff\xff\xa0\x02\x00\x09\x0d\xbf\xff\xff\xd4\x20\x60\x00\xd4\x4e\x00\x16\x2a\xc2\x80\x03";;
let _SPARCV9_CODE = "\x81\xa8\x0a\x24\x89\xa0\x10\x20\x89\xa0\x1a\x60\x89\xa0\x00\xe0";;
let all_tests = [
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc");
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9");
];;
let print_op handle i op =
( match op.value with
| SPARC_OP_INVALID _ -> (); (* this would never happens *)
| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SPARC sparc -> (
(* print all operands info (type & value) *)
if (Array.length sparc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sparc.operands);
Array.iteri (print_op handle) sparc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_systemz.ml
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+80
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(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Systemz
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x00\x07\xf7\xeb\x2a\xff\xff\x7f\x57\xe3\x01\xff\xff\x7f\x57\xeb\x00\xf0\x00\x00\x24\xb2\x4f\x00\x78";;
let all_tests = [
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ");
];;
let print_op handle i op =
( match op.value with
| SYSZ_OP_INVALID _ -> (); (* this would never happens *)
| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg;
| SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.length != 0L then
printf "\t\t\toperands[%u].mem.length: 0x%Lx\n" i mem.length;
if mem.disp != 0L then
printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SYSZ sysz -> (
(* print all operands info (type & value) *)
if (Array.length sysz.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sysz.operands);
Array.iteri (print_op handle) sysz.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_x86.ml
Vendored
+117
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@@ -0,0 +1,117 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open Printf
open Capstone
open X86
open X86_const
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";;
let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
];;
let print_op handle i op =
( match op.value with
| X86_OP_INVALID _ -> (); (* this would never happens *)
| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s [sz=%d]\n" i (cs_reg_name handle reg) op.size;
| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x [sz=%d]\n" i imm op.size;
| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM [sz=%d]\n" i op.size;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail handle mode insn =
match insn.arch with
| CS_INFO_X86 x86 -> (
print_string_hex "\tPrefix: " x86.prefix;
(* print instruction's opcode *)
print_string_hex "\tOpcode: " x86.opcode;
(* print operand's size, address size, displacement size & immediate size *)
printf "\taddr_size: %u\n" x86.addr_size;
(* print modRM byte *)
printf "\tmodrm: 0x%x\n" x86.modrm;
(* print displacement value *)
if x86.disp != 0 then
printf "\tdisp: 0x%x\n" x86.disp;
(* SIB is invalid in 16-bit mode *)
if not (List.mem CS_MODE_16 mode) then (
(* print SIB byte *)
printf "\tsib: 0x%x\n" x86.sib;
(* print sib index/scale/base (if applicable) *)
if x86.sib_index != _X86_REG_INVALID then
printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
(cs_reg_name handle x86.sib_index)
x86.sib_scale
(cs_reg_name handle x86.sib_base);
);
(* print all operands info (type & value) *)
if (Array.length x86.operands) > 0 then (
printf "\top_count: %d\n" (Array.length x86.operands);
Array.iteri (print_op handle) x86.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle mode insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle mode insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle mode) insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/test_xcore.ml
Vendored
+78
View File
@@ -0,0 +1,78 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Printf
open Capstone
open Xcore
let print_string_hex comment str =
printf "%s" comment;
for i = 0 to (Array.length str - 1) do
printf "0x%02x " str.(i)
done;
printf "\n"
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore");
];;
let print_op handle i op =
( match op.value with
| XCORE_OP_INVALID _ -> (); (* this would never happens *)
| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
if mem.direct != 0 then
printf "\t\t\toperands[%u].mem.direct: 0x%x\n" i mem.direct;
);
);
();;
let print_detail handle insn =
match insn.arch with
| CS_INFO_XCORE xcore -> (
(* print all operands info (type & value) *)
if (Array.length xcore.operands) > 0 then (
printf "\top_count: %d\n" (Array.length xcore.operands);
Array.iteri (print_op handle) xcore.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
external/capstone/bindings/ocaml/tms320c64x_const.ml
Vendored
+276
View File
@@ -0,0 +1,276 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [tms320c64x_const.ml] *)
let _TMS320C64X_OP_INVALID = _CS_OP_INVALID;;
let _TMS320C64X_OP_REG = _CS_OP_REG;;
let _TMS320C64X_OP_IMM = _CS_OP_IMM;;
let _TMS320C64X_OP_REGPAIR = _CS_OP_SPECIAL+0;;
let _TMS320C64X_OP_MEM = _CS_OP_MEM;;
let _TMS320C64X_MEM_DISP_INVALID = 0;;
let _TMS320C64X_MEM_DISP_CONSTANT = 1;;
let _TMS320C64X_MEM_DISP_REGISTER = 2;;
let _TMS320C64X_MEM_DIR_INVALID = 0;;
let _TMS320C64X_MEM_DIR_FW = 1;;
let _TMS320C64X_MEM_DIR_BW = 2;;
let _TMS320C64X_MEM_MOD_INVALID = 0;;
let _TMS320C64X_MEM_MOD_NO = 1;;
let _TMS320C64X_MEM_MOD_PRE = 2;;
let _TMS320C64X_MEM_MOD_POST = 3;;
let _TMS320C64X_REG_INVALID = 0;;
let _TMS320C64X_REG_AMR = 1;;
let _TMS320C64X_REG_CSR = 2;;
let _TMS320C64X_REG_DIER = 3;;
let _TMS320C64X_REG_DNUM = 4;;
let _TMS320C64X_REG_ECR = 5;;
let _TMS320C64X_REG_GFPGFR = 6;;
let _TMS320C64X_REG_GPLYA = 7;;
let _TMS320C64X_REG_GPLYB = 8;;
let _TMS320C64X_REG_ICR = 9;;
let _TMS320C64X_REG_IER = 10;;
let _TMS320C64X_REG_IERR = 11;;
let _TMS320C64X_REG_ILC = 12;;
let _TMS320C64X_REG_IRP = 13;;
let _TMS320C64X_REG_ISR = 14;;
let _TMS320C64X_REG_ISTP = 15;;
let _TMS320C64X_REG_ITSR = 16;;
let _TMS320C64X_REG_NRP = 17;;
let _TMS320C64X_REG_NTSR = 18;;
let _TMS320C64X_REG_REP = 19;;
let _TMS320C64X_REG_RILC = 20;;
let _TMS320C64X_REG_SSR = 21;;
let _TMS320C64X_REG_TSCH = 22;;
let _TMS320C64X_REG_TSCL = 23;;
let _TMS320C64X_REG_TSR = 24;;
let _TMS320C64X_REG_A0 = 25;;
let _TMS320C64X_REG_A1 = 26;;
let _TMS320C64X_REG_A2 = 27;;
let _TMS320C64X_REG_A3 = 28;;
let _TMS320C64X_REG_A4 = 29;;
let _TMS320C64X_REG_A5 = 30;;
let _TMS320C64X_REG_A6 = 31;;
let _TMS320C64X_REG_A7 = 32;;
let _TMS320C64X_REG_A8 = 33;;
let _TMS320C64X_REG_A9 = 34;;
let _TMS320C64X_REG_A10 = 35;;
let _TMS320C64X_REG_A11 = 36;;
let _TMS320C64X_REG_A12 = 37;;
let _TMS320C64X_REG_A13 = 38;;
let _TMS320C64X_REG_A14 = 39;;
let _TMS320C64X_REG_A15 = 40;;
let _TMS320C64X_REG_A16 = 41;;
let _TMS320C64X_REG_A17 = 42;;
let _TMS320C64X_REG_A18 = 43;;
let _TMS320C64X_REG_A19 = 44;;
let _TMS320C64X_REG_A20 = 45;;
let _TMS320C64X_REG_A21 = 46;;
let _TMS320C64X_REG_A22 = 47;;
let _TMS320C64X_REG_A23 = 48;;
let _TMS320C64X_REG_A24 = 49;;
let _TMS320C64X_REG_A25 = 50;;
let _TMS320C64X_REG_A26 = 51;;
let _TMS320C64X_REG_A27 = 52;;
let _TMS320C64X_REG_A28 = 53;;
let _TMS320C64X_REG_A29 = 54;;
let _TMS320C64X_REG_A30 = 55;;
let _TMS320C64X_REG_A31 = 56;;
let _TMS320C64X_REG_B0 = 57;;
let _TMS320C64X_REG_B1 = 58;;
let _TMS320C64X_REG_B2 = 59;;
let _TMS320C64X_REG_B3 = 60;;
let _TMS320C64X_REG_B4 = 61;;
let _TMS320C64X_REG_B5 = 62;;
let _TMS320C64X_REG_B6 = 63;;
let _TMS320C64X_REG_B7 = 64;;
let _TMS320C64X_REG_B8 = 65;;
let _TMS320C64X_REG_B9 = 66;;
let _TMS320C64X_REG_B10 = 67;;
let _TMS320C64X_REG_B11 = 68;;
let _TMS320C64X_REG_B12 = 69;;
let _TMS320C64X_REG_B13 = 70;;
let _TMS320C64X_REG_B14 = 71;;
let _TMS320C64X_REG_B15 = 72;;
let _TMS320C64X_REG_B16 = 73;;
let _TMS320C64X_REG_B17 = 74;;
let _TMS320C64X_REG_B18 = 75;;
let _TMS320C64X_REG_B19 = 76;;
let _TMS320C64X_REG_B20 = 77;;
let _TMS320C64X_REG_B21 = 78;;
let _TMS320C64X_REG_B22 = 79;;
let _TMS320C64X_REG_B23 = 80;;
let _TMS320C64X_REG_B24 = 81;;
let _TMS320C64X_REG_B25 = 82;;
let _TMS320C64X_REG_B26 = 83;;
let _TMS320C64X_REG_B27 = 84;;
let _TMS320C64X_REG_B28 = 85;;
let _TMS320C64X_REG_B29 = 86;;
let _TMS320C64X_REG_B30 = 87;;
let _TMS320C64X_REG_B31 = 88;;
let _TMS320C64X_REG_PCE1 = 89;;
let _TMS320C64X_REG_ENDING = 90;;
let _TMS320C64X_REG_EFR = _TMS320C64X_REG_ECR;;
let _TMS320C64X_REG_IFR = _TMS320C64X_REG_ISR;;
let _TMS320C64X_INS_INVALID = 0;;
let _TMS320C64X_INS_ABS = 1;;
let _TMS320C64X_INS_ABS2 = 2;;
let _TMS320C64X_INS_ADD = 3;;
let _TMS320C64X_INS_ADD2 = 4;;
let _TMS320C64X_INS_ADD4 = 5;;
let _TMS320C64X_INS_ADDAB = 6;;
let _TMS320C64X_INS_ADDAD = 7;;
let _TMS320C64X_INS_ADDAH = 8;;
let _TMS320C64X_INS_ADDAW = 9;;
let _TMS320C64X_INS_ADDK = 10;;
let _TMS320C64X_INS_ADDKPC = 11;;
let _TMS320C64X_INS_ADDU = 12;;
let _TMS320C64X_INS_AND = 13;;
let _TMS320C64X_INS_ANDN = 14;;
let _TMS320C64X_INS_AVG2 = 15;;
let _TMS320C64X_INS_AVGU4 = 16;;
let _TMS320C64X_INS_B = 17;;
let _TMS320C64X_INS_BDEC = 18;;
let _TMS320C64X_INS_BITC4 = 19;;
let _TMS320C64X_INS_BNOP = 20;;
let _TMS320C64X_INS_BPOS = 21;;
let _TMS320C64X_INS_CLR = 22;;
let _TMS320C64X_INS_CMPEQ = 23;;
let _TMS320C64X_INS_CMPEQ2 = 24;;
let _TMS320C64X_INS_CMPEQ4 = 25;;
let _TMS320C64X_INS_CMPGT = 26;;
let _TMS320C64X_INS_CMPGT2 = 27;;
let _TMS320C64X_INS_CMPGTU4 = 28;;
let _TMS320C64X_INS_CMPLT = 29;;
let _TMS320C64X_INS_CMPLTU = 30;;
let _TMS320C64X_INS_DEAL = 31;;
let _TMS320C64X_INS_DOTP2 = 32;;
let _TMS320C64X_INS_DOTPN2 = 33;;
let _TMS320C64X_INS_DOTPNRSU2 = 34;;
let _TMS320C64X_INS_DOTPRSU2 = 35;;
let _TMS320C64X_INS_DOTPSU4 = 36;;
let _TMS320C64X_INS_DOTPU4 = 37;;
let _TMS320C64X_INS_EXT = 38;;
let _TMS320C64X_INS_EXTU = 39;;
let _TMS320C64X_INS_GMPGTU = 40;;
let _TMS320C64X_INS_GMPY4 = 41;;
let _TMS320C64X_INS_LDB = 42;;
let _TMS320C64X_INS_LDBU = 43;;
let _TMS320C64X_INS_LDDW = 44;;
let _TMS320C64X_INS_LDH = 45;;
let _TMS320C64X_INS_LDHU = 46;;
let _TMS320C64X_INS_LDNDW = 47;;
let _TMS320C64X_INS_LDNW = 48;;
let _TMS320C64X_INS_LDW = 49;;
let _TMS320C64X_INS_LMBD = 50;;
let _TMS320C64X_INS_MAX2 = 51;;
let _TMS320C64X_INS_MAXU4 = 52;;
let _TMS320C64X_INS_MIN2 = 53;;
let _TMS320C64X_INS_MINU4 = 54;;
let _TMS320C64X_INS_MPY = 55;;
let _TMS320C64X_INS_MPY2 = 56;;
let _TMS320C64X_INS_MPYH = 57;;
let _TMS320C64X_INS_MPYHI = 58;;
let _TMS320C64X_INS_MPYHIR = 59;;
let _TMS320C64X_INS_MPYHL = 60;;
let _TMS320C64X_INS_MPYHLU = 61;;
let _TMS320C64X_INS_MPYHSLU = 62;;
let _TMS320C64X_INS_MPYHSU = 63;;
let _TMS320C64X_INS_MPYHU = 64;;
let _TMS320C64X_INS_MPYHULS = 65;;
let _TMS320C64X_INS_MPYHUS = 66;;
let _TMS320C64X_INS_MPYLH = 67;;
let _TMS320C64X_INS_MPYLHU = 68;;
let _TMS320C64X_INS_MPYLI = 69;;
let _TMS320C64X_INS_MPYLIR = 70;;
let _TMS320C64X_INS_MPYLSHU = 71;;
let _TMS320C64X_INS_MPYLUHS = 72;;
let _TMS320C64X_INS_MPYSU = 73;;
let _TMS320C64X_INS_MPYSU4 = 74;;
let _TMS320C64X_INS_MPYU = 75;;
let _TMS320C64X_INS_MPYU4 = 76;;
let _TMS320C64X_INS_MPYUS = 77;;
let _TMS320C64X_INS_MVC = 78;;
let _TMS320C64X_INS_MVD = 79;;
let _TMS320C64X_INS_MVK = 80;;
let _TMS320C64X_INS_MVKL = 81;;
let _TMS320C64X_INS_MVKLH = 82;;
let _TMS320C64X_INS_NOP = 83;;
let _TMS320C64X_INS_NORM = 84;;
let _TMS320C64X_INS_OR = 85;;
let _TMS320C64X_INS_PACK2 = 86;;
let _TMS320C64X_INS_PACKH2 = 87;;
let _TMS320C64X_INS_PACKH4 = 88;;
let _TMS320C64X_INS_PACKHL2 = 89;;
let _TMS320C64X_INS_PACKL4 = 90;;
let _TMS320C64X_INS_PACKLH2 = 91;;
let _TMS320C64X_INS_ROTL = 92;;
let _TMS320C64X_INS_SADD = 93;;
let _TMS320C64X_INS_SADD2 = 94;;
let _TMS320C64X_INS_SADDU4 = 95;;
let _TMS320C64X_INS_SADDUS2 = 96;;
let _TMS320C64X_INS_SAT = 97;;
let _TMS320C64X_INS_SET = 98;;
let _TMS320C64X_INS_SHFL = 99;;
let _TMS320C64X_INS_SHL = 100;;
let _TMS320C64X_INS_SHLMB = 101;;
let _TMS320C64X_INS_SHR = 102;;
let _TMS320C64X_INS_SHR2 = 103;;
let _TMS320C64X_INS_SHRMB = 104;;
let _TMS320C64X_INS_SHRU = 105;;
let _TMS320C64X_INS_SHRU2 = 106;;
let _TMS320C64X_INS_SMPY = 107;;
let _TMS320C64X_INS_SMPY2 = 108;;
let _TMS320C64X_INS_SMPYH = 109;;
let _TMS320C64X_INS_SMPYHL = 110;;
let _TMS320C64X_INS_SMPYLH = 111;;
let _TMS320C64X_INS_SPACK2 = 112;;
let _TMS320C64X_INS_SPACKU4 = 113;;
let _TMS320C64X_INS_SSHL = 114;;
let _TMS320C64X_INS_SSHVL = 115;;
let _TMS320C64X_INS_SSHVR = 116;;
let _TMS320C64X_INS_SSUB = 117;;
let _TMS320C64X_INS_STB = 118;;
let _TMS320C64X_INS_STDW = 119;;
let _TMS320C64X_INS_STH = 120;;
let _TMS320C64X_INS_STNDW = 121;;
let _TMS320C64X_INS_STNW = 122;;
let _TMS320C64X_INS_STW = 123;;
let _TMS320C64X_INS_SUB = 124;;
let _TMS320C64X_INS_SUB2 = 125;;
let _TMS320C64X_INS_SUB4 = 126;;
let _TMS320C64X_INS_SUBAB = 127;;
let _TMS320C64X_INS_SUBABS4 = 128;;
let _TMS320C64X_INS_SUBAH = 129;;
let _TMS320C64X_INS_SUBAW = 130;;
let _TMS320C64X_INS_SUBC = 131;;
let _TMS320C64X_INS_SUBU = 132;;
let _TMS320C64X_INS_SWAP4 = 133;;
let _TMS320C64X_INS_UNPKHU4 = 134;;
let _TMS320C64X_INS_UNPKLU4 = 135;;
let _TMS320C64X_INS_XOR = 136;;
let _TMS320C64X_INS_XPND2 = 137;;
let _TMS320C64X_INS_XPND4 = 138;;
let _TMS320C64X_INS_IDLE = 139;;
let _TMS320C64X_INS_MV = 140;;
let _TMS320C64X_INS_NEG = 141;;
let _TMS320C64X_INS_NOT = 142;;
let _TMS320C64X_INS_SWAP2 = 143;;
let _TMS320C64X_INS_ZERO = 144;;
let _TMS320C64X_INS_ENDING = 145;;
let _TMS320C64X_GRP_INVALID = 0;;
let _TMS320C64X_GRP_JUMP = 1;;
let _TMS320C64X_GRP_FUNIT_D = 128;;
let _TMS320C64X_GRP_FUNIT_L = 129;;
let _TMS320C64X_GRP_FUNIT_M = 130;;
let _TMS320C64X_GRP_FUNIT_S = 131;;
let _TMS320C64X_GRP_FUNIT_NO = 132;;
let _TMS320C64X_GRP_ENDING = 133;;
let _TMS320C64X_FUNIT_INVALID = 0;;
let _TMS320C64X_FUNIT_D = 1;;
let _TMS320C64X_FUNIT_L = 2;;
let _TMS320C64X_FUNIT_M = 3;;
let _TMS320C64X_FUNIT_S = 4;;
let _TMS320C64X_FUNIT_NO = 5;;
external/capstone/bindings/ocaml/wasm_const.ml
Vendored
+190
View File
@@ -0,0 +1,190 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [wasm_const.ml] *)
let _WASM_OP_INVALID = _CS_OP_INVALID;;
let _WASM_OP_IMM = _CS_OP_IMM;;
let _WASM_OP_NONE = _CS_OP_SPECIAL+0;;
let _WASM_OP_INT7 = _CS_OP_SPECIAL+1;;
let _WASM_OP_VARUINT32 = _CS_OP_SPECIAL+2;;
let _WASM_OP_VARUINT64 = _CS_OP_SPECIAL+3;;
let _WASM_OP_UINT32 = _CS_OP_SPECIAL+4;;
let _WASM_OP_UINT64 = _CS_OP_SPECIAL+5;;
let _WASM_OP_BRTABLE = _CS_OP_SPECIAL+6;;
let _WASM_INS_UNREACHABLE = 0x0;;
let _WASM_INS_NOP = 0x1;;
let _WASM_INS_BLOCK = 0x2;;
let _WASM_INS_LOOP = 0x3;;
let _WASM_INS_IF = 0x4;;
let _WASM_INS_ELSE = 0x5;;
let _WASM_INS_END = 0xb;;
let _WASM_INS_BR = 0xc;;
let _WASM_INS_BR_IF = 0xd;;
let _WASM_INS_BR_TABLE = 0xe;;
let _WASM_INS_RETURN = 0xf;;
let _WASM_INS_CALL = 0x10;;
let _WASM_INS_CALL_INDIRECT = 0x11;;
let _WASM_INS_DROP = 0x1a;;
let _WASM_INS_SELECT = 0x1b;;
let _WASM_INS_GET_LOCAL = 0x20;;
let _WASM_INS_SET_LOCAL = 0x21;;
let _WASM_INS_TEE_LOCAL = 0x22;;
let _WASM_INS_GET_GLOBAL = 0x23;;
let _WASM_INS_SET_GLOBAL = 0x24;;
let _WASM_INS_I32_LOAD = 0x28;;
let _WASM_INS_I64_LOAD = 0x29;;
let _WASM_INS_F32_LOAD = 0x2a;;
let _WASM_INS_F64_LOAD = 0x2b;;
let _WASM_INS_I32_LOAD8_S = 0x2c;;
let _WASM_INS_I32_LOAD8_U = 0x2d;;
let _WASM_INS_I32_LOAD16_S = 0x2e;;
let _WASM_INS_I32_LOAD16_U = 0x2f;;
let _WASM_INS_I64_LOAD8_S = 0x30;;
let _WASM_INS_I64_LOAD8_U = 0x31;;
let _WASM_INS_I64_LOAD16_S = 0x32;;
let _WASM_INS_I64_LOAD16_U = 0x33;;
let _WASM_INS_I64_LOAD32_S = 0x34;;
let _WASM_INS_I64_LOAD32_U = 0x35;;
let _WASM_INS_I32_STORE = 0x36;;
let _WASM_INS_I64_STORE = 0x37;;
let _WASM_INS_F32_STORE = 0x38;;
let _WASM_INS_F64_STORE = 0x39;;
let _WASM_INS_I32_STORE8 = 0x3a;;
let _WASM_INS_I32_STORE16 = 0x3b;;
let _WASM_INS_I64_STORE8 = 0x3c;;
let _WASM_INS_I64_STORE16 = 0x3d;;
let _WASM_INS_I64_STORE32 = 0x3e;;
let _WASM_INS_CURRENT_MEMORY = 0x3f;;
let _WASM_INS_GROW_MEMORY = 0x40;;
let _WASM_INS_I32_CONST = 0x41;;
let _WASM_INS_I64_CONST = 0x42;;
let _WASM_INS_F32_CONST = 0x43;;
let _WASM_INS_F64_CONST = 0x44;;
let _WASM_INS_I32_EQZ = 0x45;;
let _WASM_INS_I32_EQ = 0x46;;
let _WASM_INS_I32_NE = 0x47;;
let _WASM_INS_I32_LT_S = 0x48;;
let _WASM_INS_I32_LT_U = 0x49;;
let _WASM_INS_I32_GT_S = 0x4a;;
let _WASM_INS_I32_GT_U = 0x4b;;
let _WASM_INS_I32_LE_S = 0x4c;;
let _WASM_INS_I32_LE_U = 0x4d;;
let _WASM_INS_I32_GE_S = 0x4e;;
let _WASM_INS_I32_GE_U = 0x4f;;
let _WASM_INS_I64_EQZ = 0x50;;
let _WASM_INS_I64_EQ = 0x51;;
let _WASM_INS_I64_NE = 0x52;;
let _WASM_INS_I64_LT_S = 0x53;;
let _WASM_INS_I64_LT_U = 0x54;;
let _WASM_INS_I64_GT_U = 0x56;;
let _WASM_INS_I64_LE_S = 0x57;;
let _WASM_INS_I64_LE_U = 0x58;;
let _WASM_INS_I64_GE_S = 0x59;;
let _WASM_INS_I64_GE_U = 0x5a;;
let _WASM_INS_F32_EQ = 0x5b;;
let _WASM_INS_F32_NE = 0x5c;;
let _WASM_INS_F32_LT = 0x5d;;
let _WASM_INS_F32_GT = 0x5e;;
let _WASM_INS_F32_LE = 0x5f;;
let _WASM_INS_F32_GE = 0x60;;
let _WASM_INS_F64_EQ = 0x61;;
let _WASM_INS_F64_NE = 0x62;;
let _WASM_INS_F64_LT = 0x63;;
let _WASM_INS_F64_GT = 0x64;;
let _WASM_INS_F64_LE = 0x65;;
let _WASM_INS_F64_GE = 0x66;;
let _WASM_INS_I32_CLZ = 0x67;;
let _WASM_INS_I32_CTZ = 0x68;;
let _WASM_INS_I32_POPCNT = 0x69;;
let _WASM_INS_I32_ADD = 0x6a;;
let _WASM_INS_I32_SUB = 0x6b;;
let _WASM_INS_I32_MUL = 0x6c;;
let _WASM_INS_I32_DIV_S = 0x6d;;
let _WASM_INS_I32_DIV_U = 0x6e;;
let _WASM_INS_I32_REM_S = 0x6f;;
let _WASM_INS_I32_REM_U = 0x70;;
let _WASM_INS_I32_AND = 0x71;;
let _WASM_INS_I32_OR = 0x72;;
let _WASM_INS_I32_XOR = 0x73;;
let _WASM_INS_I32_SHL = 0x74;;
let _WASM_INS_I32_SHR_S = 0x75;;
let _WASM_INS_I32_SHR_U = 0x76;;
let _WASM_INS_I32_ROTL = 0x77;;
let _WASM_INS_I32_ROTR = 0x78;;
let _WASM_INS_I64_CLZ = 0x79;;
let _WASM_INS_I64_CTZ = 0x7a;;
let _WASM_INS_I64_POPCNT = 0x7b;;
let _WASM_INS_I64_ADD = 0x7c;;
let _WASM_INS_I64_SUB = 0x7d;;
let _WASM_INS_I64_MUL = 0x7e;;
let _WASM_INS_I64_DIV_S = 0x7f;;
let _WASM_INS_I64_DIV_U = 0x80;;
let _WASM_INS_I64_REM_S = 0x81;;
let _WASM_INS_I64_REM_U = 0x82;;
let _WASM_INS_I64_AND = 0x83;;
let _WASM_INS_I64_OR = 0x84;;
let _WASM_INS_I64_XOR = 0x85;;
let _WASM_INS_I64_SHL = 0x86;;
let _WASM_INS_I64_SHR_S = 0x87;;
let _WASM_INS_I64_SHR_U = 0x88;;
let _WASM_INS_I64_ROTL = 0x89;;
let _WASM_INS_I64_ROTR = 0x8a;;
let _WASM_INS_F32_ABS = 0x8b;;
let _WASM_INS_F32_NEG = 0x8c;;
let _WASM_INS_F32_CEIL = 0x8d;;
let _WASM_INS_F32_FLOOR = 0x8e;;
let _WASM_INS_F32_TRUNC = 0x8f;;
let _WASM_INS_F32_NEAREST = 0x90;;
let _WASM_INS_F32_SQRT = 0x91;;
let _WASM_INS_F32_ADD = 0x92;;
let _WASM_INS_F32_SUB = 0x93;;
let _WASM_INS_F32_MUL = 0x94;;
let _WASM_INS_F32_DIV = 0x95;;
let _WASM_INS_F32_MIN = 0x96;;
let _WASM_INS_F32_MAX = 0x97;;
let _WASM_INS_F32_COPYSIGN = 0x98;;
let _WASM_INS_F64_ABS = 0x99;;
let _WASM_INS_F64_NEG = 0x9a;;
let _WASM_INS_F64_CEIL = 0x9b;;
let _WASM_INS_F64_FLOOR = 0x9c;;
let _WASM_INS_F64_TRUNC = 0x9d;;
let _WASM_INS_F64_NEAREST = 0x9e;;
let _WASM_INS_F64_SQRT = 0x9f;;
let _WASM_INS_F64_ADD = 0xa0;;
let _WASM_INS_F64_SUB = 0xa1;;
let _WASM_INS_F64_MUL = 0xa2;;
let _WASM_INS_F64_DIV = 0xa3;;
let _WASM_INS_F64_MIN = 0xa4;;
let _WASM_INS_F64_MAX = 0xa5;;
let _WASM_INS_F64_COPYSIGN = 0xa6;;
let _WASM_INS_I32_WARP_I64 = 0xa7;;
let _WASM_INS_I32_TRUNC_U_F32 = 0xa9;;
let _WASM_INS_I32_TRUNC_S_F64 = 0xaa;;
let _WASM_INS_I32_TRUNC_U_F64 = 0xab;;
let _WASM_INS_I64_EXTEND_S_I32 = 0xac;;
let _WASM_INS_I64_EXTEND_U_I32 = 0xad;;
let _WASM_INS_I64_TRUNC_S_F32 = 0xae;;
let _WASM_INS_I64_TRUNC_U_F32 = 0xaf;;
let _WASM_INS_I64_TRUNC_S_F64 = 0xb0;;
let _WASM_INS_I64_TRUNC_U_F64 = 0xb1;;
let _WASM_INS_F32_CONVERT_S_I32 = 0xb2;;
let _WASM_INS_F32_CONVERT_U_I32 = 0xb3;;
let _WASM_INS_F32_CONVERT_S_I64 = 0xb4;;
let _WASM_INS_F32_CONVERT_U_I64 = 0xb5;;
let _WASM_INS_F32_DEMOTE_F64 = 0xb6;;
let _WASM_INS_F64_CONVERT_S_I32 = 0xb7;;
let _WASM_INS_F64_CONVERT_U_I32 = 0xb8;;
let _WASM_INS_F64_CONVERT_S_I64 = 0xb9;;
let _WASM_INS_F64_CONVERT_U_I64 = 0xba;;
let _WASM_INS_F64_PROMOTE_F32 = 0xbb;;
let _WASM_INS_I32_REINTERPRET_F32 = 0xbc;;
let _WASM_INS_I64_REINTERPRET_F64 = 0xbd;;
let _WASM_INS_F32_REINTERPRET_I32 = 0xbe;;
let _WASM_INS_F64_REINTERPRET_I64 = 0xbf;;
let _WASM_INS_INVALID = 512;;
let _WASM_INS_ENDING = 513;;
let _WASM_GRP_INVALID = 0;;
let _WASM_GRP_NUMBERIC = 8;;
let _WASM_GRP_PARAMETRIC = 9;;
let _WASM_GRP_VARIABLE = 10;;
let _WASM_GRP_MEMORY = 11;;
let _WASM_GRP_CONTROL = 12;;
let _WASM_GRP_ENDING = 13;;
external/capstone/bindings/ocaml/x86.ml
Vendored
+47
View File
@@ -0,0 +1,47 @@
(* Capstone Disassembly Engine
* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 *)
open X86_const
(* architecture specific info of instruction *)
type x86_op_mem = {
segment: int;
base: int;
index: int;
scale: int;
disp: int;
}
type x86_op_value =
| X86_OP_INVALID of int
| X86_OP_REG of int
| X86_OP_IMM of int
| X86_OP_MEM of x86_op_mem
type x86_op = {
value: x86_op_value;
size: int;
access: int;
avx_bcast: int;
avx_zero_opmask: int;
}
type cs_x86 = {
prefix: int array;
opcode: int array;
rex: int;
addr_size: int;
modrm: int;
sib: int;
disp: int;
sib_index: int;
sib_scale: int;
sib_base: int;
xop_cc: int;
sse_cc: int;
avx_cc: int;
avx_sae: int;
avx_rm: int;
eflags: int;
operands: x86_op array;
}
external/capstone/bindings/ocaml/x86_const.ml
Vendored
+1989
View File
File diff suppressed because it is too large Load Diff
external/capstone/bindings/ocaml/xcore.ml
Vendored
+26
View File
@@ -0,0 +1,26 @@
(* Capstone Disassembly Engine
* By Guillaume Jeanne <guillaume.jeanne@ensimag.fr>, 2014> *)
open Xcore_const
type xcore_op_mem = {
base: int;
index: int;
disp: int;
direct: int;
}
type xcore_op_value =
| XCORE_OP_INVALID of int
| XCORE_OP_REG of int
| XCORE_OP_IMM of int
| XCORE_OP_MEM of xcore_op_mem
type xcore_op = {
value: xcore_op_value;
}
type cs_xcore = {
operands: xcore_op array;
}
external/capstone/bindings/ocaml/xcore_const.ml
Vendored
+160
View File
@@ -0,0 +1,160 @@
(* For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.ml] *)
let _XCORE_OP_INVALID = _CS_OP_INVALID;;
let _XCORE_OP_REG = _CS_OP_REG;;
let _XCORE_OP_IMM = _CS_OP_IMM;;
let _XCORE_OP_MEM = _CS_OP_MEM;;
let _XCORE_REG_INVALID = 0;;
let _XCORE_REG_CP = 1;;
let _XCORE_REG_DP = 2;;
let _XCORE_REG_LR = 3;;
let _XCORE_REG_SP = 4;;
let _XCORE_REG_R0 = 5;;
let _XCORE_REG_R1 = 6;;
let _XCORE_REG_R2 = 7;;
let _XCORE_REG_R3 = 8;;
let _XCORE_REG_R4 = 9;;
let _XCORE_REG_R5 = 10;;
let _XCORE_REG_R6 = 11;;
let _XCORE_REG_R7 = 12;;
let _XCORE_REG_R8 = 13;;
let _XCORE_REG_R9 = 14;;
let _XCORE_REG_R10 = 15;;
let _XCORE_REG_R11 = 16;;
let _XCORE_REG_PC = 17;;
let _XCORE_REG_SCP = 18;;
let _XCORE_REG_SSR = 19;;
let _XCORE_REG_ET = 20;;
let _XCORE_REG_ED = 21;;
let _XCORE_REG_SED = 22;;
let _XCORE_REG_KEP = 23;;
let _XCORE_REG_KSP = 24;;
let _XCORE_REG_ID = 25;;
let _XCORE_REG_ENDING = 26;;
let _XCORE_INS_INVALID = 0;;
let _XCORE_INS_ADD = 1;;
let _XCORE_INS_ANDNOT = 2;;
let _XCORE_INS_AND = 3;;
let _XCORE_INS_ASHR = 4;;
let _XCORE_INS_BAU = 5;;
let _XCORE_INS_BITREV = 6;;
let _XCORE_INS_BLA = 7;;
let _XCORE_INS_BLAT = 8;;
let _XCORE_INS_BL = 9;;
let _XCORE_INS_BF = 10;;
let _XCORE_INS_BT = 11;;
let _XCORE_INS_BU = 12;;
let _XCORE_INS_BRU = 13;;
let _XCORE_INS_BYTEREV = 14;;
let _XCORE_INS_CHKCT = 15;;
let _XCORE_INS_CLRE = 16;;
let _XCORE_INS_CLRPT = 17;;
let _XCORE_INS_CLRSR = 18;;
let _XCORE_INS_CLZ = 19;;
let _XCORE_INS_CRC8 = 20;;
let _XCORE_INS_CRC32 = 21;;
let _XCORE_INS_DCALL = 22;;
let _XCORE_INS_DENTSP = 23;;
let _XCORE_INS_DGETREG = 24;;
let _XCORE_INS_DIVS = 25;;
let _XCORE_INS_DIVU = 26;;
let _XCORE_INS_DRESTSP = 27;;
let _XCORE_INS_DRET = 28;;
let _XCORE_INS_ECALLF = 29;;
let _XCORE_INS_ECALLT = 30;;
let _XCORE_INS_EDU = 31;;
let _XCORE_INS_EEF = 32;;
let _XCORE_INS_EET = 33;;
let _XCORE_INS_EEU = 34;;
let _XCORE_INS_ENDIN = 35;;
let _XCORE_INS_ENTSP = 36;;
let _XCORE_INS_EQ = 37;;
let _XCORE_INS_EXTDP = 38;;
let _XCORE_INS_EXTSP = 39;;
let _XCORE_INS_FREER = 40;;
let _XCORE_INS_FREET = 41;;
let _XCORE_INS_GETD = 42;;
let _XCORE_INS_GET = 43;;
let _XCORE_INS_GETN = 44;;
let _XCORE_INS_GETR = 45;;
let _XCORE_INS_GETSR = 46;;
let _XCORE_INS_GETST = 47;;
let _XCORE_INS_GETTS = 48;;
let _XCORE_INS_INCT = 49;;
let _XCORE_INS_INIT = 50;;
let _XCORE_INS_INPW = 51;;
let _XCORE_INS_INSHR = 52;;
let _XCORE_INS_INT = 53;;
let _XCORE_INS_IN = 54;;
let _XCORE_INS_KCALL = 55;;
let _XCORE_INS_KENTSP = 56;;
let _XCORE_INS_KRESTSP = 57;;
let _XCORE_INS_KRET = 58;;
let _XCORE_INS_LADD = 59;;
let _XCORE_INS_LD16S = 60;;
let _XCORE_INS_LD8U = 61;;
let _XCORE_INS_LDA16 = 62;;
let _XCORE_INS_LDAP = 63;;
let _XCORE_INS_LDAW = 64;;
let _XCORE_INS_LDC = 65;;
let _XCORE_INS_LDW = 66;;
let _XCORE_INS_LDIVU = 67;;
let _XCORE_INS_LMUL = 68;;
let _XCORE_INS_LSS = 69;;
let _XCORE_INS_LSUB = 70;;
let _XCORE_INS_LSU = 71;;
let _XCORE_INS_MACCS = 72;;
let _XCORE_INS_MACCU = 73;;
let _XCORE_INS_MJOIN = 74;;
let _XCORE_INS_MKMSK = 75;;
let _XCORE_INS_MSYNC = 76;;
let _XCORE_INS_MUL = 77;;
let _XCORE_INS_NEG = 78;;
let _XCORE_INS_NOT = 79;;
let _XCORE_INS_OR = 80;;
let _XCORE_INS_OUTCT = 81;;
let _XCORE_INS_OUTPW = 82;;
let _XCORE_INS_OUTSHR = 83;;
let _XCORE_INS_OUTT = 84;;
let _XCORE_INS_OUT = 85;;
let _XCORE_INS_PEEK = 86;;
let _XCORE_INS_REMS = 87;;
let _XCORE_INS_REMU = 88;;
let _XCORE_INS_RETSP = 89;;
let _XCORE_INS_SETCLK = 90;;
let _XCORE_INS_SET = 91;;
let _XCORE_INS_SETC = 92;;
let _XCORE_INS_SETD = 93;;
let _XCORE_INS_SETEV = 94;;
let _XCORE_INS_SETN = 95;;
let _XCORE_INS_SETPSC = 96;;
let _XCORE_INS_SETPT = 97;;
let _XCORE_INS_SETRDY = 98;;
let _XCORE_INS_SETSR = 99;;
let _XCORE_INS_SETTW = 100;;
let _XCORE_INS_SETV = 101;;
let _XCORE_INS_SEXT = 102;;
let _XCORE_INS_SHL = 103;;
let _XCORE_INS_SHR = 104;;
let _XCORE_INS_SSYNC = 105;;
let _XCORE_INS_ST16 = 106;;
let _XCORE_INS_ST8 = 107;;
let _XCORE_INS_STW = 108;;
let _XCORE_INS_SUB = 109;;
let _XCORE_INS_SYNCR = 110;;
let _XCORE_INS_TESTCT = 111;;
let _XCORE_INS_TESTLCL = 112;;
let _XCORE_INS_TESTWCT = 113;;
let _XCORE_INS_TSETMR = 114;;
let _XCORE_INS_START = 115;;
let _XCORE_INS_WAITEF = 116;;
let _XCORE_INS_WAITET = 117;;
let _XCORE_INS_WAITEU = 118;;
let _XCORE_INS_XOR = 119;;
let _XCORE_INS_ZEXT = 120;;
let _XCORE_INS_ENDING = 121;;
let _XCORE_GRP_INVALID = 0;;
let _XCORE_GRP_JUMP = 1;;
let _XCORE_GRP_ENDING = 2;;