first optimization

This commit is contained in:
SimoneN64
2023-12-25 21:59:47 +01:00
parent 1f84b96909
commit 360d7a7ccd
3 changed files with 51 additions and 5 deletions

View File

@@ -81,6 +81,7 @@ _epilogue:
//ready();
//return getCode<Fn>();
ir.optimize();
ir.print();
exit(1);
return nullptr;
}

View File

@@ -151,18 +151,20 @@ template <> struct fmt::formatter<Entry> : formatter<string_view> {
std::string op1 = fmt::format("R{}", e.op1.index_or_imm.value());
if(put_comma) {
op += ", ";
} else {
put_comma = true;
}
op += op1;
put_comma = true;
}
} else {
if (e.op1.index_or_imm.has_value()) {
std::string op1 = fmt::format("0x{:0X}", e.op1.index_or_imm.value());
if(put_comma) {
op += ", ";
} else {
put_comma = true;
}
op += op1;
put_comma = true;
}
}
@@ -171,18 +173,20 @@ template <> struct fmt::formatter<Entry> : formatter<string_view> {
std::string op2 = fmt::format("R{}", e.op2.index_or_imm.value());
if(put_comma) {
op += ", ";
} else {
put_comma = true;
}
op += op2;
put_comma = true;
}
} else {
if (e.op2.index_or_imm.has_value()) {
std::string op2 = fmt::format("0x{:0X}", e.op2.index_or_imm.value());
if(put_comma) {
op += ", ";
} else {
put_comma = true;
}
op += op2;
put_comma = true;
}
}
@@ -211,6 +215,37 @@ void IR::push(const Entry& e) {
}
void IR::optimize() {
std::vector<Entry> optimized{};
for(const auto& i : code) {
bool isOp1Reg = i.op1.isReg();
bool isOp2Reg = i.op2.isReg();
bool isDstReg = i.dst.isReg();
if(isDstReg) {
if(isOp1Reg) {
if(i.op1.index_or_imm == i.dst.index_or_imm
&& i.zeroRendersItUseless()) continue;
}
if(isOp2Reg) {
if(i.op2.index_or_imm == i.dst.index_or_imm
&& i.zeroRendersItUseless()) continue;
}
}
optimized.push_back(i);
}
if(optimized.size() == code.size()) {
return;
}
code = optimized;
optimize();
}
void IR::print() {
for(auto e : code) {
fmt::print("{}", e);
}

View File

@@ -38,11 +38,16 @@ struct Entry {
LO, HI
} type = NONE;
bool isReg() {
bool isReg() const {
return type == REG_S64 || type == REG_F32 || type == REG_F64 || type == REG_S32
|| type == REG_U64 || type == REG_U32 || type == REG_U5;
}
bool isImm() const {
return type == IMM_S64 || type == IMM_F32 || type == IMM_F64 || type == IMM_S32
|| type == IMM_U64 || type == IMM_U32 || type == IMM_U5;
}
std::optional<u64> index_or_imm = std::nullopt;
Operand() = default;
@@ -50,6 +55,10 @@ struct Entry {
: type(t), index_or_imm(imm) {}
} dst, op1, op2;
bool zeroRendersItUseless() const {
return op == ADD || op == OR || op == SRL || op == SLL || op == SRA;
}
[[nodiscard]] const Operand& GetDst() const { return dst; }
enum BranchCond {
@@ -71,6 +80,7 @@ struct IR {
void push(const Entry&);
auto begin();
auto end();
void print();
void optimize();
private:
std::vector<Entry> code{};